Abstract:
A semiconductor light emitting device may include: a first conductivity-type semiconductor layer; an active layer disposed on the first conductivity-type semiconductor layer and including a plurality of quantum barrier layers and a plurality of quantum well layers which are alternately stacked; and a second conductivity-type semiconductor layer disposed on the active layer. A quantum barrier layer closest to the second conductivity-type semiconductor layer, among the plurality of quantum barrier layers, may include a first undoped region and a first doped region disposed on the first undoped region and having a thickness greater than or equal to that of the first undoped region. Each of the first undoped region and the first doped region may include a plurality of first unit layers having different energy band gaps, and at least one hole accumulation region.
Abstract:
A method for manufacturing a semiconductor device includes generating a layout including a first conductive pattern region and a second conductive pattern region. A first interlayer insulating film is formed on a substrate, the first interlayer insulating film including a first region corresponding to the first conductive pattern region, a second region corresponding to the second conductive pattern region, and a third region spaced apart from the first and second regions and disposed between the first and second regions. First, second and third lower metal wirings are formed to respectively fill the first, second and third recesses of the first interlayer insulating film. A second interlayer insulating film is formed on the first interlayer insulating film. A first dummy via hole is formed in the second interlayer insulating film to expose the third lower metal wiring. The third lower metal wiring is electrically isolated.
Abstract:
A mobile terminal and an interface method thereof for connecting external devices, such as an adapter, a Universal Serial Bus (USB) cable, a docking station, an accessory, and the like, to the mobile terminal are provided. The mobile terminal includes a battery, a connector including a pin for data communication and first and second power pins for charging the battery, a memory for storing a reference voltage indicating a dedicated adapter of the battery, and a controller for receiving a voltage input from the first and second power pins, for recognizing an external device connected with the connector as the dedicated adapter when a voltage input from the pin for data communication is the reference voltage, and for charging the battery with power input to the first and second power pins.
Abstract:
A chemical vapor deposition apparatus can include a reaction chamber having a reaction space therein; a wafer boat disposed in the reaction space, the wafer boat arranged and structured to support a plurality of wafers; and a gas supplying part disposed in the reaction chamber to supply two or more reaction gases to the plurality of wafers. The gas supplying part can include a plurality of gas pipes disposed in the reaction chamber to supply the two or more reaction gases from outside to the reaction space; and a plurality of supplying pipes disposed around the wafer boat, wherein each of the supplying pipes is connected to two or more corresponding gas pipes, and wherein each supplying pipe is configured to supply the two or more reaction gases supplied by the two or more corresponding gas pipes to a corresponding one of the wafers.
Abstract:
A semiconductor device includes circuit active fin lines and circuit gate lines intersecting each other in a circuit active region, dummy active fin lines and dummy gate lines intersecting each other in a dummy active region, the active fin lines and the dummy active fin lines having same width and pitch, and the circuit gate lines and the dummy gate lines having same width and pitch, wherein at least some of the dummy active fin lines are aligned with and collinear with respective circuit active fin lines, and at least some of the dummy gate lines are aligned with and collinear with respective circuit gate lines.
Abstract:
There is provided a semiconductor light emitting device. The device includes an n-type semiconductor layer, and a p-type semiconductor layer. The p-type semiconductor layer includes a plurality of first layers and second layers, each containing a p-type impurity and are alternately stacked. The impurity concentrations of the plurality of first layers increase in a direction away from the n-type semiconductor layer. An active layer is disposed between the n-type semiconductor layer and the p-type semiconductor layer.
Abstract:
A method of producing a p-type nitride semiconductor includes growing a first nitride semiconductor layer doped with a first concentration of a p-type impurity. The first nitride semiconductor layer is annealed to activate the p-type impurity. A second nitride semiconductor layer doped with a second concentration of a p-type impurity is grown on the first nitride semiconductor layer. The second concentration is higher than the first concentration.
Abstract:
A nitride semiconductor light emitting device includes first and second type nitride semiconductor layers. An active layer is disposed between the first and second type nitride semiconductor layers. A current spreading layer is disposed between the second type nitride semiconductor layer and the active layer. The current spreading layer includes first nitride thin films and second nitride thin films which are alternately laminated. The first nitride thin films have band gaps larger than those of the second nitride thin films. A first plurality of first nitride thin films are positioned at outer first and second sides of the current spreading layer. The first plurality of first nitride thin films have a thickness greater than that of a second plurality of first nitride thin films positioned between the first plurality of first nitride thin films.
Abstract:
There is provided a semiconductor light emitting device having a zinc oxide-based transparent conductive thin film in which a Group III element is doped to have waveforms having a plurality of periods in a thickness direction.
Abstract:
A semiconductor device includes circuit active fin lines and circuit gate lines intersecting each other in a circuit active region, dummy active fin lines and dummy gate lines intersecting each other in a dummy active region, the active fin lines and the dummy active fin lines having same width and pitch, and the circuit gate lines and the dummy gate lines having same width and pitch, wherein at least some of the dummy active fin lines are aligned with and collinear with respective circuit active fin lines, and at least some of the dummy gate lines are aligned with and collinear with respective circuit gate lines.