公开(公告)号：US12132470B2

公开(公告)日：2024-10-29

申请号：US17548765

申请日：2021-12-13

申请人： Tagore Technology, Inc.

发明人： Pramit Sarkar ,  Manish Shah

IPC分类号： H03K17/0812 ,  H01L23/62 ,  H01L29/20

CPC分类号： H03K17/08122 ,  H01L23/62 ,  H01L29/2003

摘要： An integrated circuit includes a substrate, a GaN FET power switch disposed on the substrate, and a totally-GaN-based driver disposed on the substrate and coupled to the GaN FET power switch. The totally-GaN-based driver has an input terminal for receiving a supply voltage and includes an under-voltage detector having an output terminal. The under-voltage detector outputs a UVLO signal when the supply voltage is below a low-to-high threshold value, and does not output the UVLO signal when the supply voltage is above the low-to-high threshold value. The totally-GaN-based driver includes a pulse stretcher having an input terminal coupled to the output terminal of the under-voltage detector, and an output terminal for outputting a stretched_UVLO signal for a predetermined amount of time after the supply voltage first rises above the low-to-high threshold value.

公开(公告)号：US12068742B2

公开(公告)日：2024-08-20

申请号：US17864430

申请日：2022-07-14

申请人： LEAP Semiconductor Corp.

发明人： Wei-Fan Chen ,  Kuo-Chi Tsai

IPC分类号： H02H7/00 ,  H01L23/62 ,  H03K17/0814 ,  H03K17/082 ,  H01L29/16

CPC分类号： H03K17/0822 ,  H01L23/62 ,  H03K17/08142 ,  H01L29/1608

摘要： A short-circuit protection circuitry is adapted for a power transistor. The short-circuit protection circuitry includes a first diode, a first resistor, a voltage dividing circuit, a gate voltage generator, a pull-down circuit, and a control signal generator. The first diode is coupled to a drain of the power transistor. The first resistor is coupled between the first diode and the power transistor. The voltage dividing circuit is coupled between a gate and a source of the power transistor to generate a dividing voltage. The gate voltage generator provides a gate voltage to the gate of the power transistor according to a first driving signal and a second driving signal. The pull-down circuit pulls down the gate voltage according to a control signal. The control signal generator generates the control signal according to the first driving signal, a voltage on the anode of the first diode and the dividing voltage.

公开(公告)号：US20240274568A1

公开(公告)日：2024-08-15

申请号：US18496612

申请日：2023-10-27

申请人： Renesas Electronics America Inc.

发明人： Edgardo LABER ,  James Edwin VINSON

IPC分类号： H01L23/00 ,  H01L23/62 ,  H02J7/00

CPC分类号： H01L24/48 ,  H01L23/62 ,  H01L24/45 ,  H02J7/0029 ,  H01L23/498 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247

摘要： A package for use with an integrated circuit having a contact pad is provided. The package includes an enclosure portion; a package pin for external connection; and a protective element coupled between the contact pad and the package pin. The protective element is operable in a first state or a second state. In the first state the protective element passes a current between the contact pad and the package pin. When the current is above a threshold value the protective element changes from the first state to the second state to prevent the current from flowing between the contact pad and the package pin.

公开(公告)号：US20240266306A1

公开(公告)日：2024-08-08

申请号：US18610050

申请日：2024-03-19

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Enis Tuncer

IPC分类号： H01L23/62 ,  H01L21/56 ,  H01L23/00 ,  H01L23/24 ,  H01L23/29 ,  H01L23/31 ,  H01L23/495 ,  H01L23/532 ,  H02H7/00

CPC分类号： H01L23/62 ,  H01L21/56 ,  H01L23/24 ,  H01L23/3135 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H02H7/008 ,  H01L23/293 ,  H01L23/296 ,  H01L23/49513 ,  H01L23/53295 ,  H01L2224/32245 ,  H01L2224/48245 ,  H01L2224/73265

摘要： A semiconductor package includes a metallic pad and leads, a semiconductor die including a semiconductor substrate attached to the metallic pad, and a conductor including a sacrificial fuse element above the semiconductor substrate, the sacrificial fuse element being electrically coupled between one of the leads and at least one terminal of the semiconductor die, a shock-absorbing material over a profile of the sacrificial fuse element, and mold compound covering the semiconductor die, the conductor, and the shock-absorbing material, and partially covering the metallic pad and leads, with the metallic pad and the leads exposed on an outer surface of the semiconductor package. Either a glass transition temperature of the shock-absorbing material or a melting point of the shock-absorbing material is lower than a melting point of the conductor.

公开(公告)号：USRE50035E1

公开(公告)日：2024-07-09

申请号：US17688267

申请日：2022-03-07

申请人： Sony Group Corporation

发明人： Hideki Mori ,  Hirokazu Ejiri ,  Kenji Azami ,  Terukazu Ohno ,  Nobuyuki Yoshitake

IPC分类号： H01L23/62 ,  H01L23/525

CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/0002 ,  H01L2924/00

摘要： By stably separating a melting location of a fuse (3) from conductive layers (5A, 5B), reliable melting of the fuse (3) is enabled. A fuse (3) including a fuse body (3A) and two pads (3Ba, 3Bb) connected by this and two conductive layers (5A, 5B) individually connected to the two pads (3Ba, 3Bb) are formed in a multilayer structure on a semiconductor substrate (1). A length of the fuse body (3A) is defined so that the melting location of the fuse (3) becomes positioned in the fuse body (3A) away from the region overlapped on the conductive layer (5A or 5B) when an electrical stress is applied between two conductive layers (5A, 5B) and the fuse (3) is melted.

公开(公告)号：US20240222373A1

公开(公告)日：2024-07-04

申请号：US18231187

申请日：2023-08-07

申请人： TESSERA LLC

发明人： Marc A. Bergendahl ,  Andrew M. Greene ,  Rajasekhar Venigalla

IPC分类号： H01L27/088 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/8238 ,  H01L23/528 ,  H01L23/532 ,  H01L23/62 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L27/0886 ,  H01L21/02181 ,  H01L21/31144 ,  H01L21/32133 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823475 ,  H01L21/823821 ,  H01L23/5286 ,  H01L23/5329 ,  H01L23/62 ,  H01L27/0924 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

摘要： A method of forming a power rail to semiconductor devices comprising removing a portion of the gate structure forming a gate cut trench separating a first active region of fin structures from a second active region of fin structures. A conformal etch stop layer is formed in the gate cut trench. A fill material is formed on the conformal etch stop layer filling at least a portion of the gate cut trench. The fill material has a composition that is etched selectively to the conformal etch stop layer. A power rail is formed in the gate cut trench. The conformal etch stop layer obstructs lateral etching during forming the power rail to substantially eliminate power rail to gate structure shorting.

公开(公告)号：US12020884B2

公开(公告)日：2024-06-25

申请号：US18233885

申请日：2023-08-15

申请人： SKYWORKS SOLUTIONS, INC.

发明人： Bo Zhou

IPC分类号： H01H85/46 ,  H01H85/00 ,  H01H85/02 ,  H01H85/143 ,  H01L23/62 ,  H01L23/66 ,  H04B1/16 ,  H04B1/3827

CPC分类号： H01H85/46 ,  H01H85/0095 ,  H01H85/0241 ,  H01H85/143 ,  H01L23/62 ,  H01L23/66 ,  H04B1/1607 ,  H04B1/3833 ,  H01H2085/0283 ,  H01L2223/6677

摘要： Fuse programming circuits, devices and methods. In some embodiments, a fuse circuit can include a fuse pad configured to receive a voltage, a fuse having a first end coupled to the fuse pad and a second end coupled to a switching element configured to enable a current to pass from the fuse pad to a ground potential.

公开(公告)号：US20240186313A1

公开(公告)日：2024-06-06

申请号：US18439676

申请日：2024-02-12

申请人： Lodestar Licensing Group LLC

发明人： Vladimir Mikhalev ,  Michael P. Violette

IPC分类号： H01L27/02 ,  G11C7/24 ,  G11C16/04 ,  G11C16/30 ,  H01L23/60 ,  H01L23/62 ,  H01L29/45 ,  H01L29/866 ,  H10B41/20 ,  H10B41/40 ,  H10B43/20 ,  H10B43/40

CPC分类号： H01L27/0248 ,  G11C7/24 ,  G11C16/0483 ,  G11C16/30 ,  H01L23/60 ,  H01L23/62 ,  H01L27/0292 ,  H01L28/60 ,  H01L29/456 ,  H01L29/866 ,  H10B41/20 ,  H10B41/40 ,  H10B43/20 ,  H10B43/40

摘要： A capacitor structure comprises a first conductive region having a first conductivity type and a second conductive region having a second conductivity type different than the first conductivity type. The first conductive region comprises a first protrusion portion and a second protrusion portion. The second conductive region comprises a protrusion portion. The capacitor structure further comprises a first dielectric overlying the first protrusion portion of the first conductive region, and a first conductor overlying the first dielectric. Additionally, the capacitor structure comprises a terminal of a diode overlying the second protrusion portion of the first conductive region and the protrusion portion of the second conductive region. The terminal of the diode comprises a second conductor isolated from the first conductor.

公开(公告)号：US20240178675A1

公开(公告)日：2024-05-30

申请号：US18537620

申请日：2023-12-12

申请人： Navitas Semiconductor Limited

发明人： Daniel M. Kinzer ,  Santosh Sharma ,  Ju Jason Zhang

IPC分类号： H02J7/00 ,  H01L23/495 ,  H01L23/528 ,  H01L23/62 ,  H01L25/07 ,  H01L27/02 ,  H01L27/088 ,  H01L29/10 ,  H01L29/20 ,  H01L29/40 ,  H01L29/417 ,  H02M1/00 ,  H02M1/088 ,  H02M3/155 ,  H02M3/157 ,  H02M3/158 ,  H03K3/012 ,  H03K3/356 ,  H03K17/10 ,  H03K19/0185

CPC分类号： H02J7/00 ,  H01L23/49503 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/528 ,  H01L23/62 ,  H01L25/072 ,  H01L27/0248 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/1033 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/41758 ,  H02M1/088 ,  H02M3/157 ,  H02M3/1584 ,  H02M3/1588 ,  H03K3/012 ,  H03K3/356017 ,  H03K17/102 ,  H03K19/018507 ,  H01L2924/00 ,  H01L2924/0002 ,  H02M1/0048 ,  H02M3/155 ,  Y02B40/00 ,  Y02B70/10

摘要： GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.

公开(公告)号：US20240178216A1

公开(公告)日：2024-05-30

申请号：US18435938

申请日：2024-02-07

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Po-Lin PENG ,  Li-Wei CHU ,  Ming-Fu TSAI ,  Jam-Wem LEE ,  Yu-Ti SU

IPC分类号： H01L27/02 ,  H01L23/60 ,  H01L23/62 ,  H01L27/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/747 ,  H01L29/861 ,  H01L29/87

CPC分类号： H01L27/0262 ,  H01L27/0207 ,  H01L27/0255 ,  H01L29/87 ,  H01L23/60 ,  H01L23/62 ,  H01L27/0248 ,  H01L27/0652 ,  H01L27/0658 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/747 ,  H01L29/8611 ,  H01L2924/13034 ,  H01L2924/13035

摘要： A semiconductor device is provided, including a first doped region of a first conductivity type configured as a first terminal of a first diode, a second doped region of a second conductivity type configured as a second terminal of the first diode, wherein the first and second doped regions are coupled to a first voltage terminal; a first well of the first conductivity type surrounding the first and second doped regions in a layout view; a third doped region of the first conductivity type configured as a first terminal, coupled to an input/output pad, of a second diode; and a second well of the second conductivity type surrounding the third doped region in the layout view. The second and third doped regions, the first well, and the second well are configured as a first electrostatic discharge path between the I/O pad and the first voltage terminal.