Methods for enhancing light absorption during PV applications
    91.
    发明授权
    Methods for enhancing light absorption during PV applications 有权
    在PV应用中增强光吸收的方法

    公开(公告)号:US08822259B2

    公开(公告)日:2014-09-02

    申请号:US13087823

    申请日:2011-04-15

    摘要: Embodiments of the invention generally relate to solar cell devices and methods for manufacturing such solar cell devices. In one embodiment, a method for forming a solar cell device includes depositing a conversion layer over a first surface of a substrate, depositing a first transparent conductive oxide layer over a second surface of the substrate that is opposite the first surface, depositing a first p-doped silicon layer over the first transparent conductive oxide layer, depositing a first intrinsic silicon layer over the first p-doped silicon layer, and depositing a first n-doped silicon layer over the first intrinsic silicon layer. The method further includes depositing a second transparent conductive oxide layer over the first n-doped silicon layer, and depositing an electrically conductive contact layer over the second transparent conductive oxide layer.

    摘要翻译: 本发明的实施例一般涉及用于制造这种太阳能电池装置的太阳能电池装置和方法。 在一个实施例中,一种用于形成太阳能电池器件的方法包括在衬底的第一表面上沉积转换层,在衬底的与第一表面相对的第二表面上沉积第一透明导电氧化物层,沉积第一p 在第一透明导电氧化物层之上的掺杂硅层,在第一p掺杂硅层上沉积第一本征硅层,以及在第一本征硅层上沉积第一n掺杂硅层。 该方法还包括在第一n掺杂硅层上沉积第二透明导电氧化物层,以及在第二透明导电氧化物层上沉积导电接触层。

    Fast axis beam profile shaping for high power laser diode based annealing system
    92.
    发明授权
    Fast axis beam profile shaping for high power laser diode based annealing system 有权
    基于高功率激光二极管的退火系统的快轴光束轮廓成形

    公开(公告)号:US08288683B2

    公开(公告)日:2012-10-16

    申请号:US12291002

    申请日:2008-11-04

    IPC分类号: B23K26/00

    摘要: A dynamic surface anneal apparatus for annealing a semiconductor workpiece has a workpiece support for supporting a workpiece, an optical source and scanning apparatus for scanning the optical source and the workpiece support relative to one another along a fast axis. The optical source includes an array of laser emitters arranged generally in successive rows of the emitters, the rows being transverse to the fast axis. Plural collimating lenslets overlie respective ones of the rows of emitters and provide collimation along the fast axis. The selected lenslets have one or a succession of optical deflection angles corresponding to beam deflections along the fast axis for respective rows of emitters. Optics focus light from the array of laser emitters onto a surface of the workpiece to form a succession of line beams transverse to the fast axis spaced along the fast axis in accordance with the succession of deflection angles.

    摘要翻译: 用于退火半导体工件的动态表面退火装置具有用于支撑工件的工件支撑件,用于沿着快轴相对于彼此扫描光源和工件支撑件的光源和扫描装置。 光源包括大致以发射器的连续行布置的激光发射器的阵列,该列横向于快轴。 多个准直的小透镜叠加在发射器排中的相应行上,并沿着快轴提供准直。 所选择的小透镜具有对应于沿着快轴的光束偏转的相应行发射器的一个或一系列光学偏转角。 将来自激光发射器阵列的光聚焦到工件的表面上,以根据偏转角的顺序形成一系列沿着快轴间隔开的快轴的线束。

    Approach to avoid buckling in BPSG by using an intermediate barrier layer
    94.
    发明授权
    Approach to avoid buckling in BPSG by using an intermediate barrier layer 失效
    通过使用中间阻挡层避免BPSG屈曲的方法

    公开(公告)号:US07485961B2

    公开(公告)日:2009-02-03

    申请号:US10774762

    申请日:2004-02-09

    IPC分类号: H01L23/48

    CPC分类号: H01L21/321 H01L21/31051

    摘要: A method is disclosed for reducing the effects of buckling, also referred to as cracking or wrinkling in multilayer heterostructures. The present method involves forming a planarization layer superjacent a semiconductor substrate. A barrier film having a structural integrity is formed superjacent the planarization layer. A second layer is formed superjacent the barrier film. The substrate is heated sufficiently to cause the planarization layer to expand according to a first thermal coefficient of expansion, the second layer to expand according to a second thermal coefficient of expansion, and the structural integrity of the barrier film to be maintained. This results in the barrier film isolating the planarization layer from the second layer, thereby preventing the planarization layer and the second layer from interacting during the heating step.

    摘要翻译: 公开了一种减少翘曲效应的方法,也称为多层异质结构中的开裂或起皱。 本方法包括在半导体衬底之上形成平坦化层。 具有结构完整性的阻挡膜形成在平坦化层的上方。 在阻挡膜的上方形成第二层。 将基板充分加热以使平坦化层根据第一热膨胀系数膨胀,第二层根据第二热膨胀系数膨胀,并保持所述阻挡膜的结构完整性。 这导致阻挡膜将平坦化层与第二层隔离,从而防止平面化层和第二层在加热步骤期间相互作用。

    Methods for forming a high dielectric film
    95.
    发明授权
    Methods for forming a high dielectric film 失效
    形成高介电膜的方法

    公开(公告)号:US07192889B2

    公开(公告)日:2007-03-20

    申请号:US10213812

    申请日:2002-08-07

    IPC分类号: H01L21/469

    摘要: A method of forming a high dielectric oxide film conventionally formed using a post formation oxygen anneal to reduce the leakage current of such film includes forming a high dielectric oxide film on a surface. The high dielectric oxide film has a dielectric constant greater than about 4 and includes a plurality of oxygen vacancies present during the formation of the film. The high dielectric oxide film is exposed during the formation thereof to an amount of atomic oxygen sufficient for reducing the number of oxygen vacancies and eliminating the post formation oxygen anneal of the high dielectric oxide film. Further, the amount of atomic oxygen used in the formation method may be controlled as a function of the amount of oxygen incorporated into the high dielectric oxide film during the formation thereof or be controlled as a function of the concentration of atomic oxygen in a process chamber in which the high dielectric oxide film is being formed. An apparatus for forming the high dielectric oxide film is also described.

    摘要翻译: 使用后形成氧退火形成常规形成的高电介质氧化膜以减少这种膜的漏电流的方法包括在表面上形成高介电氧化物膜。 高电介质氧化物膜具有大于约4的介电常数,并且在膜的形成期间包括存在的多个氧空位。 高电介质氧化物膜在其形成期间暴露于足以减少氧空位数并且消除高电介质氧化物膜的后形成氧退火的原子氧量。 另外,形成方法中使用的原子氧的量可以作为在形成高电介质氧化膜期间掺入的氧的量的函数而被控制,或者作为处理室中的原子氧浓度的函数来控制 其中形成高电介质氧化膜。 还描述了用于形成高电介质氧化物膜的装置。

    High pressure anneals of integrated circuit structures
    97.
    发明授权
    High pressure anneals of integrated circuit structures 失效
    集成电路结构的高压退火

    公开(公告)号:US06974773B2

    公开(公告)日:2005-12-13

    申请号:US09761355

    申请日:2001-01-16

    摘要: According to one embodiment of the invention, a high pressure anneal is utilized to form titanium silicide at the bottom of a contact hole, at a pressure of at least approximately 1.1 atmospheres, from a reaction between deposited titanium and underlying silicon. When such high pressures are used, temperatures of less than approximately 700 degrees Celsius are utilized. According to another embodiment of the invention, a conductive plug fill material is deposited within a contact hole such that the plug structure is relatively free of voids. Either during deposition of the conductive plug fill material or after such deposition, the conductive plug fill material is subjected to a high pressure force-fill, at a pressure of at least approximately 1.1 atmospheres. When such high pressures are used, temperatures of less than approximately 700 degrees Celsius are utilized for the force-fill. Aluminum can be used for the conductive plug fill material when using this embodiment of the invention. In further embodiments, dielectrics deposited between conductive layers are reflowed at high pressure and low temperature. Still further, multiple metalized layers are connected by vias filled with conductive material using high pressure and low temperature.

    摘要翻译: 根据本发明的一个实施例,利用高压退火在接触孔的底部,在沉积的钛和下面的硅之间的反应压力至少约1.1个大气压下形成硅化钛。 当使用这样的高压时,使用小于约700摄氏度的温度。 根据本发明的另一个实施例,导电插塞填充材料沉积在接触孔内,使得插塞结构相对没有空隙。 在沉积导电插塞填充材料期间或在这种沉积之后,导电插塞填充材料在至少约1.1个大气压的压力下经受高压力填充。 当使用这种高压时,小于约700摄氏度的温度被用于强制填充。 当使用本发明的该实施例时,铝可用于导电塞填充材料。 在另外的实施例中,沉积在导电层之间的电介质在高压和低温下回流。 此外,多个金属化层通过使用高压和低温填充导电材料的通孔连接。

    Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures
    99.
    发明授权
    Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures 有权
    用于形成字线,晶体管栅极和导电互连以及字线,晶体管栅极和导电互连结构的方法

    公开(公告)号:US06908803B2

    公开(公告)日:2005-06-21

    申请号:US10744931

    申请日:2003-12-22

    摘要: The invention encompasses stacked semiconductor devices including gate stacks, wordlines, PROMs, conductive interconnecting lines, and methods for forming such structures. The invention also includes a method of forming a transistor gate comprising: a) forming gate dielectric layer; b) forming a polysilicon gate layer against the gate dielectric layer; and c) doping the polysilicon gate layer with a conductivity-enhancing dopant, the dopant being provided in a concentration gradient within the polysilicon layer, the concentration gradient increasing in a direction toward the gate dielectric layer. The invention also includes a wordline comprising: a) a polysilicon line; a substantially fluorine impervious barrier layer over the polysilicon line; and a b) layer of metal-silicide over the substantially fluorine impervious barrier layer.

    摘要翻译: 本发明包括堆叠的半导体器件,包括栅极堆叠,字线,PROM,导电互连线以及用于形成这种结构的方法。 本发明还包括一种形成晶体管栅极的方法,包括:a)形成栅极介电层; b)在所述栅极介电层上形成多晶硅栅极层; 以及c)用导电性增强掺杂剂掺杂多晶硅栅极层,所述掺杂剂以所述多晶硅层内的浓度梯度提供,所述浓度梯度在朝向所述栅极介电层的方向上增加。 本发明还包括字线,包括:a)多晶硅线; 多晶硅线上的基本上不透氟的阻挡层; 以及b)基本上不透氟化阻挡层上的金属硅化物层。

    Pulse precursor deposition process for forming layers in semiconductor devices
    100.
    发明授权
    Pulse precursor deposition process for forming layers in semiconductor devices 有权
    用于在半导体器件中形成层的脉冲前体沉积工艺

    公开(公告)号:US06808758B1

    公开(公告)日:2004-10-26

    申请号:US09590464

    申请日:2000-06-09

    IPC分类号: C23C16455

    摘要: A process for producing thin layers in electronic devices such as integrated circuit chips, is provided. The process includes the steps of injecting a precursor fluid into a thermal processing chamber containing a substrate, such as a semiconductor wafer. The precursor fluid is converted into a solid which forms a layer on the substrate. In accordance with the present invention, the precursor fluid is pulsed into the process chamber in a manner such that the fluid is completly exhausted or removed from the chamber in between each pulse. Light energy can be used in forming the solid layers.

    摘要翻译: 提供了一种用于在诸如集成电路芯片的电子设备中制造薄层的工艺。 该方法包括以下步骤:将前体流体注入含有诸如半导体晶片的衬底的热处理室中。 将前体流体转化成在基底上形成一层的固体。 根据本发明,前体流体以使得流体在每个脉冲之间完全排出或从室中移除的方式脉冲进入处理室。 光能可用于形成固体层。