公开(公告)号：US20110076800A1

公开(公告)日：2011-03-31

申请号：US12834937

申请日：2010-07-13

Applicant: Tatsuya HIRAI ,  Tomoaki HASHIMOTO ,  Takashi KIKUCHI ,  Masatoshi YASUNAGA ,  Michiaki SUGIYAMA

Inventor： Tatsuya HIRAI ,  Tomoaki HASHIMOTO ,  Takashi KIKUCHI ,  Masatoshi YASUNAGA ,  Michiaki SUGIYAMA

IPC: H01L21/60

CPC classification number: H01L25/50 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/05553 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012

Abstract: The reliability of a semiconductor device is improved. A sealing resin (sealed body) is formed between a sub-substrate (first base member) and a base substrate (second base member) that are provided individually and distinctly to be integrated therewith, and then, the sub-substrate is electrically coupled to the second base member. As a means for electrically coupling the sub-substrate to the base substrate, lands (first lands) formed on the sub-substrate and lands (second lands) formed on the base substrate are disposed such that the respective positions thereof are aligned. After through holes are formed from the lands of the sub-substrate toward the lands of the base substrate, a solder member (conductive member) is formed in each of the through holes.

Abstract translation: 提高了半导体器件的可靠性。 在单独且明显地与其一体化设置的子基板（第一基底构件）和基底基板（第二基底构件）之间形成密封树脂（密封体），然后，将辅助基板电耦合到 第二个基础成员。 作为将基板与基板电连接的装置，在基板上形成的焊盘（第一焊盘）和基板上形成的焊盘（第二焊盘）配置成使其各自的位置对齐。 在从底基板的台阶朝向基板的焊盘形成通孔之后，在每个通孔中形成焊料部件（导电部件）。

公开(公告)号：US20110073162A1

公开(公告)日：2011-03-31

申请号：US12993467

申请日：2009-05-15

Applicant: Takashi Kikuchi ,  Toshiaki Sasaki

Inventor： Takashi Kikuchi ,  Toshiaki Sasaki

IPC: H01L31/052 ,  H01L31/18 ,  H01L31/0232

CPC classification number: H01L31/02168 ,  H01L31/03921 ,  H01L31/046 ,  H01L31/0463 ,  H01L31/076 ,  H01L31/1804 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

Abstract: Provided is a substrate for a thin-film photoelectric conversion device which makes it possible to produce the device having improved characteristics at low cost and high productivity. The substrate includes a transparent base member, with a transparent underlying layer and a transparent electrode layer successively stacked on one main surface of the transparent base member. The underlying layer includes transparent insulating fine particles and transparent binder, and the particles are dispersed to cover the one main surface with a coverage factor of particles—ranging from 30% or more to less than 80%. An antireflection layer is provided on the other main surface of the transparent base. The antireflection layer includes transparent insulating fine particles and transparent binder, and the particles are dispersed to cover the other main surface with a coverage factor greater than the underlying layer. The transparent electrode layer contains zinc oxide deposited by low-pressure CVD method.

Abstract translation: 本发明提供一种薄膜光电转换装置用基板，能够以低成本，高生产率制造具有改善特性的装置。 基板包括透明基底构件，透明基底层和依次层叠在透明基底构件的一个主表面上的透明电极层。 下层包括透明绝缘细颗粒和透明粘合剂，并且颗粒被分散以覆盖一个主表面，其颗粒的覆盖因子范围为30％以上至小于80％。 在透明基材的另一个主表面上设置防反射层。 抗反射层包括透明绝缘细颗粒和透明粘合剂，并且颗粒被分散以覆盖另一个主表面，覆盖因子大于下层。 透明电极层含有通过低压CVD法沉积的氧化锌。

公开(公告)号：US20100311205A1

公开(公告)日：2010-12-09

申请号：US12846616

申请日：2010-07-29

Applicant: Takashi KIKUCHI ,  Koichi KANEMOTO ,  Chuichi MIYAZAKI ,  Toshihiro SHIOTSUKI

Inventor： Takashi KIKUCHI ,  Koichi KANEMOTO ,  Chuichi MIYAZAKI ,  Toshihiro SHIOTSUKI

IPC: H01L21/70 ,  H01L21/60

CPC classification number: H01L24/83 ,  H01L23/3128 ,  H01L23/49575 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L24/85 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/274 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48175 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/49113 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/49174 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/85181 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/0001 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/3511 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2924/01028 ,  H01L2224/29099 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: The reliability of the semiconductor device which has the structure which stores a plurality of semiconductor chips with which plane sizes differ in the same sealing body in the state where they are accumulated via the insulating film which has adhesive property is improved.In the semiconductor device which has the structure which stores a plurality of semiconductor chips with which plane sizes differ in the same sealing body in the state where they are accumulated via DAF, thickness of DAF of the back surface of the uppermost semiconductor chip with which the control circuit was formed was made thicker than each of DAF of the back surface of the lower layer semiconductor chip with which the memory circuit was formed. Hereby, the defect that the bonding wire which connects the uppermost semiconductor chip and a wiring substrate contacts the main surface corner part of a lower layer semiconductor chip can be reduced.

Abstract translation: 通过经由具有粘合性的绝缘膜积聚的状态，具有存储在同一密封体中平面尺寸不同的多个半导体芯片的结构的半导体器件的可靠性得到改善。 在具有这样的结构的半导体器件中，其结构是在通过DAF积聚的状态下，在相同的密封体中存储有多个平面尺寸不同的半导体芯片的半导体器件，最上半导体芯片的背面的DAF的厚度与 控制电路的形成比形成有存储电路的下层半导体芯片的背面的DAF的厚度大。 因此，可以减少连接最上半导体芯片和布线基板的接合线与下层半导体芯片的主表面角部接触的缺陷。

公开(公告)号：US20090213664A1

公开(公告)日：2009-08-27

申请号：US12037414

申请日：2008-02-26

Applicant: Takashi KIKUCHI ,  Kenji NODA

Inventor： Takashi KIKUCHI ,  Kenji NODA

IPC: G11C7/00

CPC classification number: G11C7/1045 ,  G11C7/1006 ,  G11C7/12 ,  G11C14/00 ,  G11C14/0063

Abstract: A nonvolatile semiconductor memory device includes a latch circuit having two nodes, a nonvolatile memory cell including two MIS transistors, a bit swapping unit configured to provide straight connections between the two nodes and the two MIS transistors during a first operation mode and to provide cross connections between the two nodes and the two MIS transistors during a second operation mode, and a control circuit configured to cause, in one of the first and second operation modes, the nonvolatile memory cell to store the data latched in the latch circuit as an irreversible change of transistor characteristics occurring in a selected one of the two MIS transistors, and further configured to cause, in another one of the first and second operation modes, the latch circuit to detect the data stored in the nonvolatile memory cell.

Abstract translation: 非易失性半导体存储器件包括具有两个节点的锁存电路，包括两个MIS晶体管的非易失性存储器单元，配置成在第一操作模式期间在两个节点和两个MIS晶体管之间提供直连接并提供交叉连接 在第二操作模式期间在两个节点和两个MIS晶体管之间，以及控制电路，被配置为在第一和第二操作模式之一中使得非易失性存储单元将锁存在锁存电路中的数据存储为不可逆变化 的晶体管特性出现在所述两个MIS晶体管中的所选择的一个中，并且还被配置为在所述第一和第二操作模式中的另一个中引起所述锁存电路来检测存储在所述非易失性存储单元中的数据。

公开(公告)号：US07511999B1

公开(公告)日：2009-03-31

申请号：US11935458

申请日：2007-11-06

Applicant: Takashi Kikuchi

Inventor： Takashi Kikuchi

IPC: G11C14/00

CPC classification number: G11C14/00

Abstract: A nonvolatile semiconductor memory device includes a nonvolatile memory cell including an odd number of MIS transistor pairs, each of which stores one-bit data by creating an irreversible change of transistor characteristics in one of the two paired MIS transistors, latches equal in number to the odd number of MIS transistor pairs to store the odd number of one-bit data recalled from the MIS transistor pairs, the recalling of the one-bit data of a given MIS transistor pair being performed by sensing a difference in the transistor characteristics between the two paired MIS transistors of the given MIS transistor pair, and a majority decision circuit configured to make a majority decision based on the odd number of one-bit data to determine a bit value of the nonvolatile memory cell.

Abstract translation: 非易失性半导体存储器件包括非易失性存储器单元，其包括奇数个MIS晶体管对，其中的每一个通过在两个成对的MIS晶体管中的一个中产生晶体管特性的不可逆变化来存储一位数据，数量等于 奇数个MIS晶体管对以存储从MIS晶体管对调用的奇数个1位数据，通过检测两个晶体管特性之间的差异来执行给定MIS晶体管对的一位数据的调用 给定MIS晶体管对的成对的MIS晶体管，以及被配置为基于奇数个1位数据做出多数决定以确定非易失性存储单元的位值的多数决定电路。

公开(公告)号：US20090060434A1

公开(公告)日：2009-03-05

申请号：US12054620

申请日：2008-03-25

Applicant: Takashi KIKUCHI ,  Roshan Thapliya ,  Shigetoshi Nakamura

Inventor： Takashi KIKUCHI ,  Roshan Thapliya ,  Shigetoshi Nakamura

IPC: G02B6/02

CPC classification number: G02F1/065 ,  G02F2201/12

Abstract: A waveguide device includes a substrate and a first electrode, a first cladding layer, a waveguide, a second cladding layer, and a second electrode sequentially provided on the substrate. At least one of the first cladding layer, the waveguide, and second cladding layer includes a ligand compound which is capable of coordinating to a metal or metal ion.

Abstract translation: 波导装置包括基板和顺序地设置在基板上的第一电极，第一包层，波导，第二包层和第二电极。 第一包覆层，波导管和第二覆层中的至少一个包括能够配合金属或金属离子的配体化合物。

公开(公告)号：US20090011223A1

公开(公告)日：2009-01-08

申请号：US12087935

申请日：2007-01-04

Applicant: Hisayasu Kaneshiro ,  Takashi Kikuchi ,  Shogo Fujimoto

Inventor： Hisayasu Kaneshiro ,  Takashi Kikuchi ,  Shogo Fujimoto

IPC: B32B27/20

CPC classification number: C08J5/18 ,  C08J2379/08 ,  H05K1/0346 ,  H05K1/0373 ,  H05K2201/0154 ,  H05K2201/0209 ,  H05K2203/0759 ,  Y10T428/254

Abstract: Disclosed is a polyimide film which is free from coarse particles caused by aggregation of a filler, therefore, can avoid abnormal electrical discharge during a discharge treatment, repelling during application of an adhesive, and the like. Also disclosed is a method for production of the polyimide film. The method for production of the polyimide film is characterized by using an organic solvent solution containing an inorganic filling material and a first polyamic acid, wherein the organic solvent solution containing the first polyamic acid is prepared by a process comprising the steps of: 1) preparing a dispersion solution which contains the inorganic filling material and a second polyamic acid and has a viscosity of 50 to 500 poises; 2) filtering the dispersion solution; 3) mixing a prepolymer solution containing the first polyamic acid in the process of being polymerized and having a viscosity of 100 poises or lower with the filtered dispersion solution; and 4) increasing the viscosity of the mixed solution to a level ranging from 1000 to 6000 poises.

Abstract translation: 公开了一种聚酰亚胺膜，其不含由填料聚集引起的粗颗粒，因此可以避免在放电处理期间的异常放电，在施加粘合剂期间的排斥等。 还公开了一种聚酰亚胺薄膜的制造方法。 聚酰亚胺薄膜的制造方法的特征在于，使用含有无机填充材料和第一聚酰胺酸的有机溶剂溶液，其中含有第一聚酰胺酸的有机溶剂溶液是通过以下步骤制备的：1）制备 包含无机填充材料和第二聚酰胺酸并具有50至500泊的粘度的分散溶液; 2）过滤分散液; 3）在聚合过程中混合含有第一聚酰胺酸的预聚物溶液，并用过滤的分散液混合粘度为100泊或更低; 和4）将混合溶液的粘度提高至1000至6000泊。

公开(公告)号：US07460400B1

公开(公告)日：2008-12-02

申请号：US11843190

申请日：2007-08-22

Applicant: Takashi Kikuchi

Inventor： Takashi Kikuchi

IPC: G11C16/04

CPC classification number: G11C11/419

Abstract: A nonvolatile semiconductor memory device includes a plurality of control lines, a control circuit configured to assert selected ones of the control lines, and a plurality of memory cell arranged in rows and columns and including respective latch circuits and respective nonvolatile memory cells, wherein the memory cell units are configured to perform a write operation in which the latch circuits of the memory cell units on a selected row store respective bits of the input data, and are further configured to perform a store operation in which the respective bits of the input data are transferred from the latch circuits to the nonvolatile memory cells for storage therein in response to assertion of respective control lines by the control circuit, so that only one or more selective bits of the input data selected by the control circuit are stored in the nonvolatile memory cells.

Abstract translation: 非易失性半导体存储器件包括多个控制线，控制电路，其被配置为断言所选择的控制线，以及布置成行和列的多个存储单元，并且包括各自的锁存电路和各个非易失性存储单元，其中所述存储器 单元单元被配置为执行写操作，其中所选行上的存储单元单元的锁存电路存储输入数据的各个比特，并且还被配置为执行存储操作，其中输入数据的各个比特是 响应于控制电路对各个控制线的断言，从锁存电路传送到非易失性存储单元以存储在其中，使得仅由控制电路选择的输入数据的一个或多个选择位被存储在非易失性存储单元 。

公开(公告)号：US20080287642A1

公开(公告)日：2008-11-20

申请号：US11663674

申请日：2005-09-20

Applicant: Hisayasu Kaneshiro ,  Takashi Kikuchi

Inventor： Hisayasu Kaneshiro ,  Takashi Kikuchi

IPC: C08G73/10

CPC classification number: C08J5/18 ,  C08G73/101 ,  C08G73/1028 ,  C08G73/1042 ,  C08G73/1046 ,  C08G73/105 ,  C08G73/1071 ,  C08J2379/08 ,  H05K1/0346 ,  H05K1/0393 ,  H05K2201/0154 ,  Y10T428/2826 ,  Y10T428/31681

Abstract: A process for the production of non-thermoplastic polyimide film whose precursor solution has high storage stability and which exhibits high adhesiveness even without expensive surface treatment, more specifically, a process fro the production of non-thermoplastic polyimide film made of a non-thermoplastic polyimide containing a block resulting from a thermoplastic polyimide which comprises (A) the step of forming a prepolymer having amino or an acid anhydride group at the end in an organic polar solvent (B) the step of synthesizing a polyimide precursor solution by using the obtained prepolymer, an acid anhydride, and a diamine in such a way as to become substantially equimolar over the whole step, and (C) the step of casting a film-forming dope containing the polyimide precursor solution and subjecting the resultant dope to chemical and/or thermal imidization, wherein the diamine and acid anhydride used in the step (A) are selected so that the reaction of both with each other in equimolar amounts can give a thermoplastic polyimide, and the polyimide precursor obtained in the step (B) is a precursor of a non-thermoplastic polyimide.

Abstract translation: 一种生产非热塑性聚酰亚胺膜的方法，其前体溶液具有高储存稳定性，即使没有昂贵的表面处理也显示出高粘附性，更具体地说，涉及一种由非热塑性聚酰亚胺制成的非热塑性聚酰亚胺膜的方法 含有由热塑性聚酰亚胺产生的嵌段，其包含（A）在有机极性溶剂（B）中形成末端具有氨基或酸酐基的预聚物的步骤，通过使用所得预聚物合成聚酰亚胺前体溶液的步骤 ，酸酐和二胺，以使其在整个步骤中变得基本上等摩尔，（C）将含有聚酰亚胺前体溶液的成膜原液浇铸并将所得的涂料进行化学和/或 其中在步骤（A）中使用的二胺和酸酐被选择为使得两者彼此的反应在等 摩尔量可以得到热塑性聚酰亚胺，并且在步骤（B）中获得的聚酰亚胺前体是非热塑性聚酰亚胺的前体。

公开(公告)号：US07451642B2

公开(公告)日：2008-11-18

申请号：US11662663

申请日：2005-09-12

Applicant: Yuki Hara ,  Takashi Kikuchi ,  Junichi Kase

Inventor： Yuki Hara ,  Takashi Kikuchi ,  Junichi Kase

IPC: G01M17/02

CPC classification number: G07C5/085 ,  G07C5/008 ,  G08G1/205

Abstract: There is provided a system and method for quantitative analysis of a cause of tire trouble capable of quantitatively analyzing whether the tire trouble is caused by the tire itself or in a matter of harshness of a tire using condition in light of not only a force acting on a tire mounted on a running vehicle but also harshness of a tire using condition such as a traveling speed of the vehicle, level difference of a road surface, a curve and gradient information. The method for quantitative analysis of a cause of tire trouble according to the present invention is characterized by comprising the steps of receiving positional data of a running vehicle from the GPS, simultaneously measuring triaxial accelerations which are accelerations acting on the running vehicle in back-and-forward, right-and-left and up-and-down directions while time synchronizing with the received data, quantitatively analyzing harshness of a tire using condition from the received positional data and the triaxial acceleration data, and displaying an analysis result.

Abstract translation: 提供了一种用于轮胎故障原因的定量分析的系统和方法，能够定量分析轮胎本身是否引起轮胎故障，或者轮胎使用条件的严酷性，不仅仅是作用于轮胎的力 使用车辆的行驶速度，路面的水平差，曲线和坡度信息等条件，安装在行驶车辆上的轮胎，而且轮胎的粗糙度。 根据本发明的用于定量分析轮胎故障的原因的方法的特征在于包括以下步骤：从GPS接收行驶车辆的位置数据，同时测量三轴加速度，其是作用在行驶车辆上的加速度， 同时与所接收的数据同步，根据接收到的位置数据和三轴加速度数据定量分析轮胎的粗糙度，并显示分析结果。