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公开(公告)号:US09935015B1
公开(公告)日:2018-04-03
申请号:US15478822
申请日:2017-04-04
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Zhenxing Bi , Donald F. Canaperi , Thamarai S. Devarajan , Sivananda K. Kanakasabapathy , Fee Li Lie , Peng Xu
IPC: H01L21/31 , H01L21/76 , H01L21/311 , H01L21/762 , H01L29/66 , H01L29/06 , H01L29/78 , H01L21/8234
CPC classification number: H01L21/823481 , H01L21/0206 , H01L21/31111 , H01L21/31116 , H01L21/31138 , H01L21/76224 , H01L21/76229 , H01L21/823431 , H01L29/0649 , H01L29/0653 , H01L29/66795 , H01L29/7851
Abstract: A method for uniform fin reveal depth for semiconductor devices includes dry etching a dielectric material to reveal semiconductor fins by a quasi-atomic layer etching (quasi-ALE) process to achieve depth uniformity across different fin pitches. A lateral bias induced by the quasi-ALE process is compensated for by isotropically etching the dielectric material.
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公开(公告)号:US20180053844A1
公开(公告)日:2018-02-22
申请号:US15241795
申请日:2016-08-19
Applicant: International Business Machines Corporation
Inventor: Zhenxing Bi , Kangguo Cheng , Juntao Li , Peng Xu
IPC: H01L29/78 , H01L29/66 , H01L21/308 , H01L21/02
Abstract: A method of forming a semiconductor device and resulting structures having an etch-resistant interlayer dielectric (ILD) that maintains height during a top epitaxy clean by forming a dielectric layer on a semiconductor structure; wherein the dielectric layer includes a first dielectric material; converting at least a portion of the dielectric layer to a second dielectric material; and exposing the portion of the dielectric layer to an etch material; wherein the etch material includes a first etch characteristic defining a first rate at which the etch material etches the first dielectric material; and wherein the etch material further includes a second etch characteristic defining a second rate at which the etch material etches the portion of the dielectric layer; wherein the first rate is different than the second rate.
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公开(公告)号:US20170372973A1
公开(公告)日:2017-12-28
申请号:US15191828
申请日:2016-06-24
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Zhenxing Bi , Kangguo Cheng , Juntao Li , Xin Miao
IPC: H01L21/84 , H01L29/40 , H01L29/66 , H01L21/28 , H01L21/033 , H01L27/12 , H01L21/8234
CPC classification number: H01L21/845 , H01L21/0332 , H01L21/0337 , H01L21/28123 , H01L21/823425 , H01L21/823456 , H01L27/1211 , H01L29/401 , H01L29/66545
Abstract: A semiconductor device comprises a source/drain region arranged on a substrate and a first gate stack having a first length arranged on a first channel region of the substrate. A second gate stack having a second length is arranged on a second channel region of the substrate. The first length is greater than the second length.
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公开(公告)号:US09837408B1
公开(公告)日:2017-12-05
申请号:US15278420
申请日:2016-09-28
Applicant: International Business Machines Corporation
Inventor: Zhenxing Bi , Kangguo Cheng , Peng Xu , Zheng Xu
IPC: H01L27/088 , H01L21/8234 , H01L21/02 , H01L21/306 , H01L29/16 , H01L29/78
CPC classification number: H01L27/0886 , H01L21/02381 , H01L21/02532 , H01L21/30604 , H01L21/3086 , H01L21/823431 , H01L21/823437 , H01L21/823807 , H01L21/823821 , H01L27/0924 , H01L29/1054 , H01L29/16 , H01L29/66795 , H01L29/7849 , H01L29/7851
Abstract: Embodiments are directed to a method of forming features of a semiconductor device. The method includes forming a first feature including a first type of semiconductor material, which can be tensile or can have compressive strain. The method further includes forming an enclosure structure including a second type of semiconductor material, wherein the first feature includes first feature sidewall surfaces extending around a circumference of the first feature. The enclosure structure is adjacent at least a portion of the first feature sidewall surfaces and extends around the circumference of the first feature.
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105.
公开(公告)号:US09824934B1
公开(公告)日:2017-11-21
申请号:US15282378
申请日:2016-09-30
Applicant: International Business Machines Corporation
Inventor: Zhenxing Bi , Kangguo Cheng , Bruce Miao , Xin Miao
IPC: H01L21/8234 , H01L21/762 , H01L27/088
CPC classification number: H01L27/088 , H01L21/0217 , H01L21/0274 , H01L21/31116 , H01L21/31144 , H01L21/76224 , H01L21/76229 , H01L21/823481 , H01L21/823487 , H01L29/0649 , H01L29/66666 , H01L29/7827
Abstract: A semiconductor device includes structures formed in first and second regions of a semiconductor substrate. The structures in the first region are spaced with a pitch P. The first and second regions are separated by an isolation region with spacing S, wherein S is greater than P. A first insulating layer is deposited and recessed to a target depth in the first region, and to a second depth in the isolation region. The second depth is lower than the target depth. A first etch stop layer is formed over the recessed first insulating layer, and a second insulating layer is formed over the first etch stop layer to increase a level of insulating material in the isolation region to the same target depth in the first device region. The recessed first insulating layer, first etch stop layer, and second insulating layer form a uniform thickness shallow trench isolation layer.
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公开(公告)号:US09761450B1
公开(公告)日:2017-09-12
申请号:US15275999
申请日:2016-09-26
Applicant: International Business Machines Corporation
Inventor: Zhenxing Bi , Kangguo Cheng , Juntao Li , Peng Xu
IPC: H01L21/76 , H01L21/033 , H01L21/8234 , H01L21/311 , H01L29/66 , H01L21/3105 , H01L29/78 , H01L29/165
CPC classification number: H01L21/0332 , H01L21/3083 , H01L21/3086 , H01L21/823431 , H01L29/165 , H01L29/6653 , H01L29/66545 , H01L29/66795 , H01L29/7851
Abstract: A method of fabricating a hard mask structure is provided. According to the method, a hard mask layer is disposed over a substrate. The hard mask layer includes a lower hard mask layer disposed over the substrate and an upper hard mask layer disposed over the lower hard mask layer. The hard mask layer is patterned and the upper hard mask layer is removed by selectively etching the upper hard mask layer until reaching the lower hard mask layer to form a top portion of the hard mask structure having a first dimension. A spacer material is disposed on a sidewall of the top portion of the hard mask structure. The lower hard mask layer is removed by selectively etching the lower mask layer until reaching the substrate to form a bottom portion of the hard mask structure having a second dimension.
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公开(公告)号:US09754798B1
公开(公告)日:2017-09-05
申请号:US15278747
申请日:2016-09-28
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Zhenxing Bi , Donald F. Canaperi , Thamarai S. Devarajan , Sivananda K. Kanakasabapathy , Fee Li Lie , Peng Xu
IPC: H01L21/31 , H01L21/76 , H01L29/66 , H01L29/06 , H01L21/311 , H01L21/762 , H01L29/78
CPC classification number: H01L21/823481 , H01L21/0206 , H01L21/31111 , H01L21/31116 , H01L21/31138 , H01L21/76224 , H01L21/76229 , H01L21/823431 , H01L29/0649 , H01L29/0653 , H01L29/66795 , H01L29/7851
Abstract: A method for uniform fin reveal depth for semiconductor devices includes dry etching a dielectric material to reveal semiconductor fins by a quasi-atomic layer etching (quasi-ALE) process to achieve depth uniformity across different fin pitches. A lateral bias induced by the quasi-ALE process is compensated for by isotropically etching the dielectric material.
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108.
公开(公告)号:US09691765B1
公开(公告)日:2017-06-27
申请号:US15063735
申请日:2016-03-08
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
IPC: H01L27/088 , H01L21/8234 , H01L21/02 , H01L21/311 , H01L29/06 , H01L27/02
CPC classification number: H01L21/823431 , H01L21/02274 , H01L21/31111 , H01L21/76229 , H01L21/823412 , H01L21/823481 , H01L21/823821 , H01L21/823878 , H01L27/0207 , H01L27/0886 , H01L27/0924 , H01L29/0649
Abstract: A semiconductor device that includes a first plurality of fin structures in a first device region and a second plurality of fin structures in a second device region. The first plurality of fin structures includes adjacent fin structures separated by a lesser pitch than the adjacent fin structures in the second plurality of fin structures. At least one layer of dielectric material between adjacent fin structures, wherein a portion of the first plurality of fin structures extending above the at least one layer of dielectric material in the first device region is substantially equal to the portion of the second plurality of fin structures extending above the at least one layer of dielectric material in the second device region. Source and drain regions are present on opposing sides of a gate structure that is present on the fin structures.
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公开(公告)号:US11302205B2
公开(公告)日:2022-04-12
申请号:US17131256
申请日:2020-12-22
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Mahmoud Amin , Zhenxing Bi , Lawrence A. Clevenger , Leigh Anne H. Clevenger , Christopher J. Penny , Krishna R. Tunga , Loma Vaishnav
Abstract: A computer-implemented method, a computer program product, and an incremental learning system are provided for language learning and speech enhancement. The method includes transforming acoustic utterances uttered by an individual into textual representations thereof, by a voice-to-language processor configured to perform speech recognition. The method further includes accelerating speech development in the individual, by an incremental learning system that includes the voice-to-language processor and that processes the acoustic utterances using natural language processing and analytics to determine and incrementally provide new material to the individual for learning. Responsive to the individual being a baby, the voice-to-language processor discretizes baby babbling to consonants, letters, and words.
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公开(公告)号:US20220032000A1
公开(公告)日:2022-02-03
申请号:US17503829
申请日:2021-10-18
Applicant: International Business Machines Corporation
Inventor: Mahmoud Amin , Krishna R. Tunga , Lawrence A. Clevenger , Zhenxing Bi , Leigh Anne H. Clevenger
Abstract: Systems, computer-implemented methods and/or computer program products that facilitate real-time response to defined symptoms are provided. In one embodiment, a computer-implemented method comprises: monitoring, by a system operatively coupled to a processor, a state of an entity; detecting, by the system, defined symptoms of the entity by analyzing the state of the entity; and transmitting, by the system, a signal that causes audio response or a haptic response to be provided to the entity, wherein transmission of the signal that causes the audio response or the haptic response is based on detection of the defined symptoms.
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