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    Heat dissipation package structure and method for fabricating the same
    111.
    发明授权
    Heat dissipation package structure and method for fabricating the same 有权
    散热封装结构及其制造方法

    公开(公告)号：US08013436B2

    公开(公告)日：2011-09-06

    申请号：US12157831

    申请日：2008-06-13

    申请人： Min-Shun Hung ,  Yo-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    发明人： Min-Shun Hung ,  Yo-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/34

    CPC分类号： H01L23/4334 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2224/0401 ,  H01L2224/45099

    摘要： A heat dissipation package structure and method for fabricating the same are disclosed, which includes mounting and electrically connecting a semiconductor chip to a chip carrier through its active surface; mounting a heat dissipation member having a heat dissipation section and a supporting section on the chip carrier such that the semiconductor chip can be received in the space formed by the heat dissipation section and the supporting section, wherein the heat dissipation section has an opening formed corresponding to the semiconductor chip; forming an encapsulant to encapsulate the semiconductor chip and the heat dissipation member; and thinning the encapsulant to remove the encapsulant formed on the semiconductor chip to expose inactive surface of the semiconductor chip and the top surface of the heat dissipation section from the encapsulant. Therefore, the heat dissipation package structure is fabricated through simplified fabrication steps at low cost, and also the problem that the chip is easily damaged in a package molding process of the prior art is overcome.

    摘要翻译： 公开了一种散热封装结构及其制造方法，其包括通过其有源表面安装和电连接半导体芯片到芯片载体; 将具有散热部和支撑部的散热部件安装在所述芯片载体上，使得所述半导体芯片能够容纳在由所述散热部和所述支撑部形成的空间中，其中，所述散热部具有相应形成的开口 到半导体芯片; 形成密封剂以封装半导体芯片和散热构件; 并且使所述密封剂变薄以除去形成在所述半导体芯片上的所述密封剂，以从所述密封剂暴露所述半导体芯片的无效表面和所述散热部分的顶表面。 因此，通过以低成本的简化的制造步骤制造散热封装结构，并且克服了在现有技术的封装成型工艺中芯片容易损坏的问题。

    Method for fabricating flip-chip semiconductor package with lead frame as chip carrier
    114.
    发明授权
    Method for fabricating flip-chip semiconductor package with lead frame as chip carrier 有权
    制造具有引线框架作为芯片载体的倒装芯片半导体封装的方法

    公开(公告)号：US07781264B2

    公开(公告)日：2010-08-24

    申请号：US11891926

    申请日：2007-08-14

    申请人： Chi-Chuan Wu ,  Chien-Ping Huang ,  Han-Ping Pu

    发明人： Chi-Chuan Wu ,  Chien-Ping Huang ,  Han-Ping Pu

    IPC分类号： H01L21/44 ,  H01L21/48

    CPC分类号： H01L24/16 ,  H01L23/4951 ,  H01L23/49558 ,  H01L23/49575 ,  H01L2224/13099 ,  H01L2224/16245 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/351 ,  H01L2924/00

    摘要： A flip-ship semiconductor package with a lead frame as a chip carrier is provided, wherein a plurality of leads of the lead frame are each formed with at least a dam member thereon. When a chip is mounted on the lead frame by means of solder bumps, each of the solder bumps is attached to the corresponding one of the leads at a position between the dam member and an inner end of the lead. During a reflow-soldering process for wetting the solder bumps to the leads, the dam members would help control collapse height of the solder bumps, so as to enhance resistance of the solder bumps to thermal stress generated by CTE (coefficient of thermal expansion) mismatch between the chip and the leads, thereby preventing incomplete electrical connection between the chip and the leads.

    摘要翻译： 提供一种具有引线框架作为芯片载体的翻转半导体封装，其中引线框架的多个引线至少形成有至少一个阻挡构件。 当通过焊料凸块将芯片安装在引线框架上时，每个焊料凸块在引线的阻挡件和引线的内端之间的位置附接到相应的一个引线。 在用于将焊料凸点润湿到引线的回流焊接过程中，阻挡构件将有助于控制焊料凸块的塌陷高度，从而增强焊料凸块对CTE产生的热应力的阻力（热膨胀系数）不匹配 在芯片和引线之间，从而防止芯片和引线之间的不完全的电连接。

    Heat dissipation semiconductor package
    115.
    发明授权
    Heat dissipation semiconductor package 有权
    散热半导体封装

    公开(公告)号：US07608915B2

    公开(公告)日：2009-10-27

    申请号：US12151902

    申请日：2008-05-08

    申请人： Chun-Ming Liao ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

    发明人： Chun-Ming Liao ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/495 ,  H01J23/10

    CPC分类号： H01L23/4334 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

    摘要： A heat dissipation semiconductor package includes a chip carrier, a semiconductor chip, a heat conductive adhesive, a heat dissipation member, and an encapsulant. The semiconductor chip is flip-chip mounted on the chip carrier and defined with a heat conductive adhesive mounting area. Periphery of the heat adhesive mounting area is spaced apart from edge of the semiconductor chip. The heat dissipation member is mounted on the heat conductive adhesive formed in the heat conductive adhesive mounting area. The encapsulant formed between the chip carrier and the heat dissipation member encapsulates the semiconductor chip and the heat conductive adhesive, and embeds edges of the active surface and non-active surface and side edge of the semiconductor chip, thereby increasing bonding area between the encapsulant and the semiconductor chip. The side edges of the heat conductive adhesive and the semiconductor chip are not flush with each other, thereby preventing propagation of delamination.

    摘要翻译： 散热半导体封装包括芯片载体，半导体芯片，导热粘合剂，散热构件和密封剂。 半导体芯片倒装芯片安装在芯片载体上，并用导热粘合剂安装区域限定。 热粘合剂安装区域的周边与半导体芯片的边缘间隔开。 散热构件安装在形成在导热粘合剂安装区域中的导热粘合剂上。 形成在芯片载体和散热构件之间的密封剂封装半导体芯片和导热粘合剂，并且嵌入半导体芯片的有源表面和非有源表面和侧边缘的边缘，从而增加密封剂和 半导体芯片。 导热粘合剂和半导体芯片的侧边缘彼此不齐平，从而防止分层的蔓延。

    Sensor package and method for fabricating the same
    116.
    发明申请
    Sensor package and method for fabricating the same 审中-公开
    传感器封装及其制造方法

    公开(公告)号：US20080303111A1

    公开(公告)日：2008-12-11

    申请号：US12156901

    申请日：2008-06-05

    申请人： Chang-Yueh Chan ,  Chien-Ping Huang ,  Tse-Wen Chang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

    发明人： Chang-Yueh Chan ,  Chien-Ping Huang ,  Tse-Wen Chang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L31/0203 ,  H01L31/18

    CPC分类号： H01L31/0203 ,  H01L23/24 ,  H01L31/18 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/00

    摘要： The invention discloses a sensor package and a method for fabricating the same. The sensor package includes: a substrate with an opening; a sensor chip disposed in the opening and electrically connected to the substrate; an encapsulant filling spacing between the sensor chip and the opening so as to secure the sensor chip to the substrate; and a transparent cover attached to the substrate via an adhesive layer, wherein the adhesive layer covers the sensor chip and bonding wires and is formed with an opening for exposing sensor region of the sensor chip. Securing the sensor chip in the opening of the substrate reduces the height of the sensor package, and meanwhile the process cost is reduced by eliminating the need of formation of conductive bumps on the sensor chip or the transparent cover and eliminating the need of specially designed substrate.

    摘要翻译： 本发明公开了一种传感器封装及其制造方法。 传感器封装包括：具有开口的基板; 传感器芯片，其布置在所述开口中并电连接到所述基板; 传感器芯片和开口之间的密封剂填充间隔，以将传感器芯片固定到基板上; 以及通过粘合剂层附着到基板的透明盖，其中粘合剂层覆盖传感器芯片和接合线，并且形成有用于暴露传感器芯片的传感器区域的开口。 将传感器芯片固定在基板的开口中，降低传感器封装的高度，同时通过消除在传感器芯片或透明盖上形成导电凸块的需要降低工艺成本，并且不需要特别设计的基板 。

    Stackable semiconductor device and manufacturing method thereof
    119.
    发明申请
    Stackable semiconductor device and manufacturing method thereof 审中-公开
    可堆叠半导体器件及其制造方法

    公开(公告)号：US20080251937A1

    公开(公告)日：2008-10-16

    申请号：US12082724

    申请日：2008-04-11

    申请人： Chin-Huang Chang ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

    发明人： Chin-Huang Chang ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/52 ,  H01L21/00

    CPC分类号： H01L21/76898 ,  H01L25/0657 ,  H01L2224/48091 ,  H01L2225/06513 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2924/00014

    摘要： A stackable semiconductor device and a manufacturing method thereof are disclosed. The method includes providing a wafer comprised of a plurality of chips, wherein a plurality of solder pads are formed on the active surface of each chip, and a plurality of grooves are formed between the solder pads of any two adjacent ones of the chips; forming a dielectric layer on regions between the solder pads of any two adjacent ones of the chips ; forming a metal layer on the dielectric layer electrically connected to the solder pads and forming a connective layer on the metal layer, wherein the width of the connective layer is smaller than that of the metal layer; cutting along the grooves to break off the electrical connection between adjacent chips; thinning the non-active surface of the wafer to the extent that the metal layer is exposed from the wafer; and separating the chips to form a plurality of stackable semiconductor devices. Accordingly, a multi-chip stack structure can be obtained by stacking and electrically connecting a plurality of semiconductor devices through the electrical connection between the connective layer of a semiconductor device and the metal layer of another semiconductor device, thereby effectively integrating more chips without having to increase the stacking area, and further the problems of poor electrical connection, complicated manufacturing processes and high costs known in the prior art can be avoided.

    摘要翻译： 公开了一种可堆叠半导体器件及其制造方法。 该方法包括提供由多个芯片组成的晶片，其中在每个芯片的有源表面上形成多个焊盘，并且在任何两个相邻芯片的焊盘之间形成多个沟槽; 在任何两个相邻芯片的焊盘之间的区域上形成电介质层; 在与所述焊料焊盘电连接的所述电介质层上形成金属层，并在所述金属层上形成连接层，其中所述连接层的宽度小于所述金属层的宽度; 沿着凹槽切割以破坏相邻芯片之间的电连接; 使晶片的非活性表面变薄至金属层从晶片露出的程度; 并分离所述芯片以形成多个可堆叠半导体器件。 因此，通过半导体器件的连接层与另一半导体器件的金属层之间的电连接层叠并电连接多个半导体器件，可以获得多芯片堆叠结构，从而有效地集成更多的芯片，而不必 增加堆积面积，进一步避免了现有技术中已知的电连接不良，制造工艺复杂，成本高的问题。

    Sensor semiconductor device and manufacturing method thereof
    120.
    发明申请
    Sensor semiconductor device and manufacturing method thereof 审中-公开
    传感器半导体器件及其制造方法

    公开(公告)号：US20080197438A1

    公开(公告)日：2008-08-21

    申请号：US12070003

    申请日：2008-02-14

    申请人： Chang-Yueh Chan ,  Chien-Ping Huang ,  Tse-Wen Chang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

    发明人： Chang-Yueh Chan ,  Chien-Ping Huang ,  Tse-Wen Chang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L31/0203 ,  H01L31/18

    CPC分类号： H01L31/0203 ,  H01L21/78 ,  H01L27/14618 ,  H01L27/14687 ,  H01L2224/94

    摘要： This invention discloses a sensor semiconductor device and a manufacturing method thereof, including: providing a wafer having a plurality of sensor chips, forming a plurality of grooves between bond pads on active surfaces of the adjacent sensor chips; forming conductive traces in the grooves for electrically connecting the bond pads; mounting a transparent medium on the wafer for covering sensing areas of the sensor chips; thinning the sensor chips from the non-active surfaces down to the grooves, thereby exposing the conductive traces; cutting the wafer to separate the sensor chips; mounting the sensor chips on a substrate module having a plurality of substrates, electrically connecting the conductive traces to the substrates; providing an insulation material on the substrate module and between the sensor chips so as to encapsulate the sensor chips but expose the transparent medium; and cutting the substrate module to separate a plurality of resultant sensor semiconductor devices.

    摘要翻译： 本发明公开了一种传感器半导体器件及其制造方法，包括：提供具有多个传感器芯片的晶片，在相邻传感器芯片的有源表面上的接合焊盘之间形成多个沟槽; 在沟槽中形成导电迹线以电连接接合焊盘; 在所述晶片上安装透明介质以覆盖所述传感器芯片的感测区域; 将传感器芯片从非活性表面减薄到凹槽，从而暴露导电迹线; 切割晶片以分离传感器芯片; 将传感器芯片安装在具有多个基板的基板模块上，将导电迹线电连接到基板; 在衬底模块上和传感器芯片之间提供绝缘材料，以封装传感器芯片，但暴露透明介质; 以及切割所述基板模块以分离多个所得传感器半导体器件。