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    SEMICONDUCTOR DEVICE AND ALARM DEVICE
    122.
    发明申请
    SEMICONDUCTOR DEVICE AND ALARM DEVICE 有权
    半导体器件和报警器件

    公开(公告)号：US20130326244A1

    公开(公告)日：2013-12-05

    申请号：US13904391

    申请日：2013-05-29

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Jun Koyama ,  Shunpei Yamazaki

    IPC: G06F1/26

    CPC classification number: G06F1/26 ,  G06F1/3203 ,  G06F1/3234 ,  G06F1/3287 ,  G06F11/1456 ,  G06F11/1458 ,  G08B17/107 ,  G11C5/148

    Abstract: In the microcomputer in the alarm device, supply of power to a sensor portion or a CPU in a sensor is allowed or stopped by a power gate controlled by a power gate controller. In addition, a volatile memory portion and a nonvolatile memory portion are provided in the CPU, data of the volatile memory portion is stored in the nonvolatile memory portion before supply of power to the CPU is stopped, and the data of the nonvolatile memory portion is restored to the volatile memory portion after the supply of power to the CPU is resumed. Thus, during an interval between measurement periods, supply of power to the sensor portion and the CPU can be stopped, so that low power consumption can be achieved compared with the case where power is continuously supplied.

    Abstract translation: 在报警装置的微型计算机中，通过由电力门控制器控制的电力门允许或停止对传感器的传感器部分或CPU的供电。 此外，在CPU中提供易失性存储器部分和非易失性存储器部分，在停止向CPU供电之前，将易失性存储器部分的数据存储在非易失性存储器部分中，并且非易失性存储器部分的数据是 在恢复向CPU的供电之后恢复到易失性存储器部分。 因此，在测量周期之间的间隔期间，可以停止向传感器部分和CPU供电，从而与连续供电的情况相比，可以实现低功耗。

    Semiconductor device
    123.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08587999B2

    公开(公告)日：2013-11-19

    申请号：US13672973

    申请日：2012-11-09

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Kiyoshi Kato

    IPC: G11C16/04 ,  G11C11/24

    CPC classification number: H01L27/10805 ,  G11C5/063 ,  G11C11/403 ,  G11C11/405 ,  G11C16/02 ,  H01L27/11521 ,  H01L27/1156 ,  H01L27/1207 ,  H01L27/1225 ,  H01L28/60

    Abstract: An object is to provide a semiconductor device with a novel structure in which stored data can be retained even when power is not supplied, and does not have a limitation on the number of times of writing operations. A semiconductor device includes a source-bit line, a first signal line, a second signal line, a word line, and a memory cell connected between the source-bit lines. The memory cell includes a first transistor, a second transistor, and a capacitor. The second transistor is formed including an oxide semiconductor material. A gate electrode of the first transistor, one of a source and drain electrodes, and one of electrodes of the capacitor are electrically connected to one another. The source-bit line and a source electrode of the first transistor are electrically connected to each other. Another source-bit line adjacent to the above source-bit line and a drain electrode of the first transistor are electrically connected to each other.

    Abstract translation: 目的是提供一种具有新颖结构的半导体器件，其中即使在未提供电力的情况下也可以保留存储的数据，并且对写入操作的次数没有限制。 半导体器件包括源极线，第一信号线，第二信号线，字线和连接在源极线之间的存储单元。 存储单元包括第一晶体管，第二晶体管和电容器。 形成包括氧化物半导体材料的第二晶体管。 第一晶体管的栅极，源极和漏极之一以及电容器的电极中的一个彼此电连接。 第一晶体管的源极线和源电极彼此电连接。 与上述源极线相邻的另一个源极线和第一晶体管的漏极彼此电连接。

    Semiconductor Device
    125.
    发明申请
    Semiconductor Device 有权
    半导体器件

    公开(公告)号：US20130288619A1

    公开(公告)日：2013-10-31

    申请号：US13916666

    申请日：2013-06-13

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Kiyoshi Kato ,  Jun Koyama

    IPC: H04B1/40

    CPC classification number: H01L29/78696 ,  G06K19/07749 ,  G06K19/07773 ,  H01L23/66 ,  H01L27/0688 ,  H01L27/1225 ,  H01L29/1033 ,  H01L29/7869 ,  H01L2223/6677 ,  H04B1/40 ,  Y02D70/00

    Abstract: An object is to achieve low power consumption and a long lifetime of a semiconductor device having a wireless communication function. The object can be achieved in such a manner that a battery serving as a power supply source and a specific circuit are electrically connected to each other through a transistor in which a channel formation region is formed using an oxide semiconductor. The hydrogen concentration of the oxide semiconductor is lower than or equal to 5×1019 (atoms/cm3). Therefore, leakage current of the transistor can be reduced. As a result, power consumption of the semiconductor device in a standby state can be reduced. Further, the semiconductor device can have a long lifetime.

    Abstract translation: 目的是实现具有无线通信功能的半导体器件的低功耗和长寿命。 可以通过使用氧化物半导体形成沟道形成区域的晶体管将用作电源和特定电路的电池彼此电连接的方式实现目的。 氧化物半导体的氢浓度低于或等于5×1019（原子/ cm3）。 因此，可以减小晶体管的漏电流。 结果，可以降低处于待机状态的半导体器件的功耗。 此外，半导体器件可以具有长的寿命。

    Nonvolatile Latch Circuit And Logic Circuit, And Semiconductor Device Using The Same
    126.
    发明申请
    Nonvolatile Latch Circuit And Logic Circuit, And Semiconductor Device Using The Same 有权
    非易失性锁存电路和逻辑电路及其使用的半导体器件

    公开(公告)号：US20130222033A1

    公开(公告)日：2013-08-29

    申请号：US13854176

    申请日：2013-04-01

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Kiyoshi Kato ,  Jun Koyama

    IPC: H03K3/286

    CPC classification number: H03K3/356104 ,  G11C7/04 ,  G11C14/0063 ,  G11C16/045 ,  G11C2211/4016 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/28202 ,  H01L21/28211 ,  H01L27/105 ,  H01L27/1203 ,  H01L27/1225 ,  H01L29/6659 ,  H03K3/0375 ,  H03K3/286 ,  H03K3/356 ,  H03K3/356121 ,  H03K3/356173

    Abstract: To provide a novel nonvolatile latch circuit and a semiconductor device using the nonvolatile latch circuit, a nonvolatile latch circuit includes a latch portion having a loop structure where an output of a first element is electrically connected to an input of a second element, and an output of the second element is electrically connected to an input of the first element; and a data holding portion for holding data of the latch portion. In the data holding portion, a transistor using an oxide semiconductor as a semiconductor material for forming a channel formation region is used as a switching element. In addition, an inverter electrically connected to a source electrode or a drain electrode of the transistor is included. With the transistor, data held in the latch portion can be written into a gate capacitor of the inverter or a capacitor which is separately provided.

    Abstract translation: 为了提供使用非易失性锁存电路的新型非易失性锁存电路和半导体器件，非易失性锁存电路包括具有环形结构的锁存部分，其中第一元件的输出电连接到第二元件的输入端，输出端 的第二元件电连接到第一元件的输入端; 以及用于保持锁存部分的数据的数据保持部分。 在数据保持部分中，使用使用氧化物半导体作为形成沟道形成区域的半导体材料的晶体管作为开关元件。 此外，还包括与晶体管的源电极或漏电极电连接的反相器。 利用晶体管，保持在锁存部分中的数据可以写入逆变器的栅极电容器或单独提供的电容器。

    SEMICONDUCTOR DEVICE
    128.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20130191673A1

    公开(公告)日：2013-07-25

    申请号：US13744561

    申请日：2013-01-18

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Jun Koyama ,  Shunpei Yamazaki

    IPC: G06F1/26 ,  G06F1/32

    CPC classification number: G06F1/26 ,  G06F1/3287 ,  Y02D10/171

    Abstract: To individually control supply of the power supply voltage to circuits, a semiconductor device includes a CPU, a memory that reads and writes data used in arithmetic operation of the CPU, a signal processing circuit that generates an output signal by converting a data signal generated by the arithmetic operation of the CPU, a first power supply control switch that controls supply of the power supply voltage to the CPU, a second power supply control switch that controls supply of the power supply voltage to the memory, a third power supply control switch that controls supply of the power supply voltage to the signal processing circuit, and a controller that at least has a function of controlling the first to third power supply control switches individually in accordance with an input signal and instruction signals input from the CPU and the signal processing circuit.

    Abstract translation: 为了单独控制对电路的电源电压供应，半导体器件包括CPU，读取和写入CPU的算术运算中使用的数据的存储器，信号处理电路，通过转换由 CPU的算术运算，控制向CPU提供电源电压的第一电源控制开关，控制对存储器的电源电压的供给的第二电源控制开关，第三电源控制开关， 控制对信号处理电路的电源电压的供给，至少具有根据从CPU输入的输入信号和指示信号以及信号处理单独地控制第一至第三电源控制开关的功能的控制器 电路。

    Semiconductor Device, and Manufacturing Method Thereof
    129.
    发明申请
    Semiconductor Device, and Manufacturing Method Thereof 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20130187165A1

    公开(公告)日：2013-07-25

    申请号：US13792381

    申请日：2013-03-11

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Hideaki Kuwabara ,  Saishi Fujikawa

    IPC: H01L29/66 ,  H01L27/15

    CPC classification number: H01L27/1222 ,  G02F1/13454 ,  G02F1/13458 ,  H01L27/124 ,  H01L27/156 ,  H01L29/6675 ,  H01L29/66765

    Abstract: In a display device such as a liquid crystal display device, a large-sized display screen is realized under low power consumption. A surface of a source wiring line of a pixel portion employed in an active matrix type liquid crystal display device is processed by way of a plating process operation so as to lower a resistance value of this source wiring line. The source wiring line of the pixel portion is manufactured at a step different from a step for manufacturing a source wiring line of a drive circuit portion. Further, electrodes of a terminal portion are processed by a plating process operation so as to reduce a resistance value thereof.

    Abstract translation: 在诸如液晶显示装置的显示装置中，在低功耗下实现大尺寸显示屏。 在有源矩阵型液晶显示装置中采用的像素部分的源极布线的表面通过电镀处理操作进行处理，以降低该源极布线的电阻值。 像素部的源极配线与制造驱动电路部的源极配线的工序不同， 此外，通过电镀处理操作来处理端子部分的电极，以便降低其电阻值。

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