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    High performance class AB operational amplifier
    185.
    发明授权
    High performance class AB operational amplifier 有权
    高性能AB类运算放大器

    公开(公告)号：US09231540B2

    公开(公告)日：2016-01-05

    申请号：US14304589

    申请日：2014-06-13

    Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics, S.r.l.

    Inventor： MarcoOrazio Cavallaro ,  Serge Ramet ,  Tiziano Chiarillo

    IPC: H03F3/45 ,  H03F1/30 ,  H03F3/30

    CPC classification number: H03F3/45179 ,  H03F1/308 ,  H03F3/3013 ,  H03F3/45183 ,  H03F2203/45054

    Abstract: A class AB operational amplifier includes an input stage, an output stage and a level shifter stage to control the quiescent current of the output stage and to transfer the signal from the input stage to the output stage, and a control circuit of the level shifter stage. The control circuit includes a transistor differential pair having a differential input terminals and the differential voltage at the differential terminals of the differential pair controls the level shifter stage.

    Abstract translation: AB类运算放大器包括输入级，输出级和电平移位级，以控制输出级的静态电流并将信号从输入级传送到输出级，以及电平转换级的控制电路 。 控制电路包括具有差分输入端的晶体管差分对，差分对的差分端的差分电压控制电平转换级。

    Method for localizing an object
    186.
    发明授权
    Method for localizing an object 有权
    本地化对象的方法

    公开(公告)号：US09182474B2

    公开(公告)日：2015-11-10

    申请号：US13768707

    申请日：2013-02-15

    Applicant: STMicroelectronics SA ,  STMicroelectronics (Grenoble 2) SAS

    Inventor： Thierry Michel ,  Bruno Paille

    IPC: G01S1/24 ,  G01S5/14 ,  G01S5/02 ,  G01S5/06 ,  H04B1/707

    CPC classification number: G01S5/14 ,  G01S5/0221 ,  G01S5/06 ,  H04B1/707

    Abstract: A method for localizing an object, including the acts of: transmission of a first signal by a first transmitter assigned to the object and of a second signal by at least one second transmitter; reception of the first and of the second signal by at least three receivers; in each receiver and for the first and the second signal: a) generation of a first and of a second reference signal; b) correlation between the first signal and the first reference signal and between the second signal and the second reference signal; c) interpolation of samples resulting from the correlation; d) deduction of the propagation time of the first and of the second signal; e) calculation of the difference between the propagation times of the first and of the second signal; and, by triangulation, deduction of the position of the object.

    Abstract translation: 一种用于定位对象的方法，包括以下动作：由分配给对象的第一发射机传输第一信号，以及由至少一个第二发射机传输第二信号; 由至少三个接收器接收第一和第二信号; 在每个接收机中以及对于第一和第二信号：a）产生第一和第二参考信号; b）第一信号和第一参考信号之间以及第二信号和第二参考信号之间的相关; c）由相关产生的样本的插值; d）扣除第一和第二信号的传播时间; e）计算第一和第二信号的传播时间之差; 并通过三角测量来扣除物体的位置。

    TAG-BASED IMPLEMENTATIONS ENABLING HIGH SPEED DATA CAPTURE AND TRANSPARENT PRE-FETCH FROM A NOR FLASH
    187.
    发明申请
    TAG-BASED IMPLEMENTATIONS ENABLING HIGH SPEED DATA CAPTURE AND TRANSPARENT PRE-FETCH FROM A NOR FLASH 有权
    基于标签的实现，从NOR闪存启用高速数据捕获和透明预备

    公开(公告)号：US20150318049A1

    公开(公告)日：2015-11-05

    申请号：US14266010

    申请日：2014-04-30

    Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS ,  STMICROELECTRONICS INTERNATIONAL N.V.

    Inventor： Ankur Behl ,  Gregory Poivre

    IPC: G11C16/32 ,  G11C7/22 ,  G06F9/44 ,  G11C7/10

    CPC classification number: G06F9/44 ,  G06F1/08 ,  G06F1/10 ,  G06F9/4401 ,  G06F9/4403 ,  G11C7/1072 ,  G11C7/222 ,  G11C16/0416 ,  G11C16/32

    Abstract: Embodiments disclosed herein generally relate for efficiently retrieving boot code for a processor from serial NOR flash memory. When a boot code request is received, a request handler in data capture logic tags successive address read requests to indicate whether the requests indicate contiguous addresses in the NOR flash memory for the boot code. Different circuitry in the data capture logic operates on different mesochronous clock signals. One clock signal drives the capture of boot code from NOR flash, and the other controls synchronized tagging, storing, pre-fetching, and transmitting of the captured boot code data.

    Abstract translation: 本文公开的实施例通常涉及从串行NOR闪速存储器有效地检索处理器的引导代码。 当接收到引导代码请求时，数据捕获逻辑中的请求处理器标记连续的地址读取请求，以指示请求是否指示用于引导代码的NOR闪存中的连续地址。 数据采集​​逻辑中的不同电路在不同的同步时钟信号上运行。 一个时钟信号驱动从NOR闪存捕获引导代码，另一个控制器同步标记，存储，预取和发送捕获的引导代码数据。

    RESOURCE ACCESS CONTROL IN A SYSTEM-ON-CHIP
    190.
    发明申请
    RESOURCE ACCESS CONTROL IN A SYSTEM-ON-CHIP 有权
    系统中的资源访问控制

    公开(公告)号：US20150254189A1

    公开(公告)日：2015-09-10

    申请号：US14629613

    申请日：2015-02-24

    Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS ,  Technological Educational Institute of Crete

    Inventor： Antonio-Marcello Coppola ,  Georgios Kornaros ,  Miltos Grammatikakis

    IPC: G06F12/14 ,  G06F9/455

    CPC classification number: G06F12/145 ,  G06F9/45533 ,  G06F12/1441 ,  G06F2009/45587 ,  G06F2212/1052

    Abstract: A method for controlling access of a processor to a resource, wherein the processor has an instruction set including a virtualization extension, may include executing a resource access instruction by the processor using the virtualization extension, whereby the resource access instruction conveys a virtual address (VA) and a virtual machine identifier. The method may also include translating the virtual address to a physical address based on the virtual machine identifier, and looking-up an access control rule table using the physical address as a search key. Each entry of the rule table includes a virtual machine identifier. The method further includes controlling access to the resource based on the output of the rule table and a match between the virtual machine identifier returned by the table and the virtual machine identifier conveyed in the resource access instruction.

    Abstract translation: 一种用于控制处理器对资源的访问的方法，其中所述处理器具有包括虚拟化扩展的指令集，可以包括由所述处理器使用所述虚拟化扩展执行资源访问指令，由此所述资源访问指令传达虚拟地址（VA ）和虚拟机标识符。 该方法还可以包括基于虚拟机标识符将虚拟地址转换为物理地址，并且使用该物理地址作为搜索关键字来查找访问控制规则表。 规则表的每个条目都包括虚拟机标识符。 该方法还包括基于规则表的输出以及该表返回的虚拟机标识符与资源访问指令中传送的虚拟机标识符之间的匹配来控制对资源的访问。

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