公开(公告)号：US06770164B1

公开(公告)日：2004-08-03

申请号：US09649827

申请日：2000-08-29

Applicant: Edward A. Schrock ,  Tongbi Jiang

Inventor： Edward A. Schrock ,  Tongbi Jiang

IPC: H01L2158

CPC classification number: H01L24/83 ,  H01L23/4951 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2224/92147 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01058 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An improved method of attaching a semiconductor die to an organic substrate and an improved semiconductor package are herein disclosed. The die package comprises a die secured to a printed circuit board (PCB) with an adhesive tape. The adhesive tape may be of ingle or multi-layer construction. In one embodiment, a tri-layer tape is disclosed having a carrier layer sandwiched between two identical adhesive layers. In one embodiment, a method is disclosed utilizing a pressure sensitive, thermoset adhesive tape. In another embodiment, a method is disclosed utilizing a B-stageable thermoset adhesive. In yet another embodiment, a method using a pressure sensitive adhesive is disclosed. In still yet another embodiment, a method is disclosed wherein the adhesive is a hybrid material having both thermoset and thermoplastic components.

Abstract translation: 本文公开了将半导体管芯附接到有机衬底和改进的半导体封装的改进方法。 模具包装包括用粘合带固定到印刷电路板（PCB）的模具。 胶带可以是单层或多层结构。 在一个实施例中，公开了三层带，其中夹层有两层相同的粘合剂层。 在一个实施例中，公开了利用压敏热固性胶带的方法。 在另一个实施方案中，公开了一种利用B级热固性粘合剂的方法。 在另一个实施方案中，公开了使用压敏粘合剂的方法。 在另一个实施方案中，公开了一种方法，其中粘合剂是具有热固性和热塑性组分两者的混合材料。

公开(公告)号：US06750070B2

公开(公告)日：2004-06-15

申请号：US10282604

申请日：2002-10-29

Applicant: Chad A. Cobbley ,  John VanNortwick ,  Bret K. Street ,  Tongbi Jiang

Inventor： Chad A. Cobbley ,  John VanNortwick ,  Bret K. Street ,  Tongbi Jiang

IPC: G01R3126

CPC classification number: G01R1/0483 ,  Y10T29/4913 ,  Y10T29/49144

Abstract: Flip-chip semiconductor assemblies, each including integrated circuit (IC) dice and an associated substrate, are electrically tested before encapsulation using an in-line or in-situ test socket or probes at a die-attach station. Those assemblies using “wet” quick-cure epoxies for die-attachment may be tested prior to the epoxy being cured by pressing the integrated circuit (IC) dice against interconnection bumps on the substrate for electrical connection, while those assemblies using “dry” epoxies may be cured prior to testing. In either case, any failures in the dice or in the interconnections between the dice and the substrates can be easily fixed, and the need for the use of “known good dice” (KGD) rework procedures during repair is eliminated.

Abstract translation: 每个包括集成电路（IC）裸片和相关衬底的倒装芯片半导体组件在封装之前使用在线或原位测试插座或芯片附接站的探针进行电测试。 在通过将集成电路（IC）芯片压在基板上的互连凸块以进行电连接的环氧树脂固化之前，可以测试使用“湿”快速固化环氧树脂进行芯片附着的那些组件，而使用“干”环氧树脂 可以在测试之前治愈。 在任一情况下，骰子或骰子与基板之间的互连中的任何故障都可以很容易地固定，并且在修理期间需要使用“已知的好的骰子”（KGD）返工程序。

公开(公告)号：US06700183B2

公开(公告)日：2004-03-02

申请号：US10003260

申请日：2001-12-06

Applicant: Tongbi Jiang

Inventor： Tongbi Jiang

IPC: H01L23495

CPC classification number: H01L24/83 ,  C09J5/00 ,  C09J5/06 ,  C09J11/00 ,  H01L24/29 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/83194 ,  H01L2224/8385 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10T428/249921 ,  Y10T428/3167 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An apparatus and method is provided for forming a board-on-chip (BOC) package. An adhesive material including a carrier and microcapsules distributed in the carrier is used to bond a semiconductor component to a mounting surface in a BOC package. The microcapsules contain a hardener and/or a catalyst that, when combined with the carrier, initiate a bonding reaction. The contents of the microcapsules are released via application of an external influence, such as pressure or heat, when the bonding reaction is desired to begin. The use of microcapsules permits the formulation of adhesive blends with a substantially increased pot life, increased stability and reliability at high temperatures, and favorable low temperature reaction and bonding characteristics.

Abstract translation: 提供了用于形成片上片（BOC）封装的装置和方法。 使用包含分散在载体中的载体和微胶囊的粘合剂材料将半导体组分粘合到BOC封装中的安装表面。 微胶囊含有固化剂和/或催化剂，当与载体组合时，引发粘合反应。 当期望接合反应时，微胶囊的内容物通过外部影响如压力或热量释放。 使用微胶囊允许制备具有显着增加的适用期的粘合剂共混物，在高温下提高稳定性和可靠性，以及有利的低温反应和粘合特性。

公开(公告)号：US06685083B2

公开(公告)日：2004-02-03

申请号：US10020107

申请日：2001-12-07

Applicant: Tongbi Jiang ,  Zhiqiang Wu

Inventor： Tongbi Jiang ,  Zhiqiang Wu

IPC: B23K106

CPC classification number: H01L24/85 ,  B23K20/004 ,  B23K2101/38 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L2224/05624 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/78301 ,  H01L2224/78347 ,  H01L2224/78822 ,  H01L2224/85045 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85206 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/20303 ,  H01L2924/20305 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00015

Abstract: A method and apparatus for creating second order vibrational modes. The apparatus includes a signal generator, a piezoelectric transducer, a plurality of wave propagating beams and reflecting boards. An electric field applied by the signal generator to the piezoelectric transducer induces a unidirectional vibration of the transducer. The vibration is propagated through the beams and reflected by the reflecting boards in a closed polygonal loop. The final reflection direction is perpendicular to the original vibration. A circular or elliptical vibration of the apparatus results. The circular or elliptical vibrational energy can be imparted to the wire bond of an integrated circuit to add strength to the connection.

Abstract translation: 一种用于产生二阶振动模式的方法和装置。 该装置包括信号发生器，压电换能器，多个波传播光束和反射板。 由信号发生器施加到压电换能器的电场引起换能器的单向振动。 振动通过光束传播并被反射板以闭合的多边形回路反射。 最终反射方向与原始振动垂直。 该装置产生圆形或椭圆形的振动。 可以将圆形或椭圆形振动能量赋予集成电路的引线键合，以增加连接的强度。

公开(公告)号：US06669781B2

公开(公告)日：2003-12-30

申请号：US08935745

申请日：1997-09-23

Applicant: Tongbi Jiang ,  Chad A. Cobbley ,  John VanNortwick

Inventor： Tongbi Jiang ,  Chad A. Cobbley ,  John VanNortwick

IPC: B05C1111

CPC classification number: B41C1/14 ,  B41N1/242 ,  H01L2224/4826 ,  H05K3/1225 ,  Y10S438/945

Abstract: A method and apparatus for improved stencil/screen print quality is disclosed. The stencil or screen assists in application of a printable material onto a substrate, such as an adhesive to a semiconductor die of a semiconductor wafer during a lead-on-chip (LOC) packaging process. In one embodiment, the stencil includes a coating applied to at least one surface of a pattern of the stencil or screen to retard running of the printable material onto the surface. In another embodiment, the stencil or screen includes a second coating applied to at least one other surface of the pattern to promote spreading of the printable material onto the substrate.

Abstract translation: 公开了一种用于改进模板/丝网印刷质量的方法和装置。 在片上（LOC）包装过程中，模板或屏幕有助于将可印刷材料施加到基底上，例如对半导体晶片的半导体管芯的粘合剂。 在一个实施例中，模板包括施加到模板或筛网的图案的至少一个表面上的涂层，以阻止可印刷材料运动到表面上。 在另一个实施例中，模板或丝网包括施加到图案的至少一个其他表面的第二涂层，以促进可印刷材料在基底上的铺展。

公开(公告)号：US06616864B1

公开(公告)日：2003-09-09

申请号：US09651629

申请日：2000-08-30

Applicant: Tongbi Jiang ,  Edward A. Schrock

Inventor： Tongbi Jiang ,  Edward A. Schrock

IPC: H01B102

CPC classification number: H01L24/83 ,  H01L24/31 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K1/095 ,  H05K3/1216 ,  H05K3/4007 ,  H05K2201/035 ,  H05K2201/0367 ,  H05K2201/09745 ,  H05K2203/167 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49181 ,  Y10T29/49204 ,  H01L2924/00

Abstract: A Z-axis electrical contact may be formed using a resinous deposit containing conductive particles which may align along surface regions to form an electrical conduction path over the resinous material. If the resinous material is thermoplastic, the material may be heated to mechanically bond to contact surfaces. Advantageously, the resinous material may be formed by forcing a resinous matrix containing conductive particles through an annular opening in a stencil. The resulting member allows surfaces to be contacted which may be irregular or may be covered by native oxide layers.

Abstract translation: 可以使用含有导电颗粒的树脂沉积物形成Z轴电接触，所述导电颗粒可以沿着表面区域排列以在树脂材料上形成电传导路径。 如果树脂材料是热塑性的，则材料可以被加热以机械地结合到接触表面。 有利地，树脂材料可以通过强制含有导电颗粒的树脂基质通过模板中的环形开口形成。 所得到的构件允许接触表面，其可以是不规则的或可以被天然氧化物层覆盖。

公开(公告)号：US06586277B2

公开(公告)日：2003-07-01

申请号：US09681839

申请日：2001-07-26

Applicant: Tongbi Jiang

Inventor： Tongbi Jiang

IPC: H01L2144

CPC classification number: H01L24/16 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/13099 ,  H01L2224/16237 ,  H01L2224/29013 ,  H01L2224/29036 ,  H01L2224/2919 ,  H01L2224/30131 ,  H01L2224/32014 ,  H01L2224/48 ,  H01L2224/73203 ,  H01L2224/81136 ,  H01L2224/81192 ,  H01L2224/81903 ,  H01L2224/83194 ,  H01L2224/8385 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01045 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2224/45099

Abstract: A semiconductor package structure for a ball grid array type package using a plurality of pieces of adhesive elastomer film to attach a semiconductor die to a substrate having conductive traces in order to alleviate thermal mismatch stress between the semiconductor die and the printed circuit board to which the packaged device is soldered, while maintaining the reliability of the packaged device itself.

公开(公告)号：US06562277B1

公开(公告)日：2003-05-13

申请号：US09652225

申请日：2000-08-29

Applicant: Ed Schrock ,  Tongbi Jiang

Inventor： Ed Schrock ,  Tongbi Jiang

IPC: B29C1700

CPC classification number: H01L24/83 ,  C09J5/06 ,  H01L23/49513 ,  H01L24/31 ,  H01L24/48 ,  H01L24/49 ,  H01L24/75 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/05599 ,  H01L2224/2919 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/83048 ,  H01L2224/83097 ,  H01L2224/8319 ,  H01L2224/83855 ,  H01L2224/85048 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01021 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: A method for attaching a workpiece, for example a semiconductor die, to a workpiece holder, for example a lead frame die support, comprises the steps of interposing an uncured adhesive between the semiconductor die and the die support and preheating the adhesive from an ambient temperature to a preheat temperature of between about 150° C. and about 160° C. over a period of about 1.5 seconds. Next, the preheat temperature is maintained for about 1.5 seconds, then the adhesive is further heated to a temperature of between about 190° C. and about 200° C. over a period of about 1.0 second. The inventive method quickly cures the adhesive to secure the die to the support with acceptably low levels of voiding. An apparatus which can be adapted to perform the inventive method is further described.

Abstract translation: 用于将工件（例如半导体管芯）附接到工件保持器（例如引线框模具支撑件）上的方法包括以下步骤：在半导体管芯和管芯支撑件之间插入未固化的粘合剂，并从环境温度预热粘合剂 在约1.5秒的时间段内达到约150℃至约160℃的预热温度。 接下来，将预热温度保持约1.5秒，然后在约1.0秒的时间内将粘合剂进一步加热至约190℃至约200℃的温度。 本发明的方法快速固化粘合剂以将模具固定到具有可接受的低水平的空隙的支撑体上。 进一步描述可适于执行本发明方法的装置。

公开(公告)号：US06544820B2

公开(公告)日：2003-04-08

申请号：US09921535

申请日：2001-08-03

Applicant: Tongbi Jiang ,  Jerrold L. King

Inventor： Tongbi Jiang ,  Jerrold L. King

IPC: H01L2144

CPC classification number: H01L21/4821 ,  H01L23/49579 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49175 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/10162 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/3426 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A conductive plastic lead frame and method of manufacturing the same suitable for use in IC packaging. In a preferred embodiment, the lead frame is constructed of a plastic or polymer based lead frame structure with an intrinsic conductive polymer coating. In a second embodiment the lead frame is a composite plastic or polymeric material intermixed with an intrinsic conductive polymer coating.

公开(公告)号：US06538898B1

公开(公告)日：2003-03-25

申请号：US09562380

申请日：2000-05-01

Applicant: Casey L. Prindivill ,  Tongbi Jiang

Inventor： Casey L. Prindivill ,  Tongbi Jiang

IPC: H05K702

CPC classification number: H01L24/32 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/49548 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/4824 ,  H01L2224/8114 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49171 ,  H01L2924/3512 ,  H01L2924/00

Abstract: A method and apparatus for attaching an integrated circuit die to a substrate. Specifically, substrates which are used for BOC/COB or F/C surface, mounting comprise protrusions on the surface of the substrate. The protrusions are configured to form barriers to hold an adhesive paste within the barriers. An integrated circuit die is disposed on the top of the barriers and coupled to the substrate by the adhesive paste.

Abstract translation: 一种用于将集成电路管芯附接到衬底的方法和装置。 具体地，用于BOC / COB或F / C表面的基板安装在基板的表面上包括突起。 突起被构造成形成障碍物以将粘合剂糊保持在障碍物内。 集成电路芯片设置在屏障的顶部，并通过粘合剂浆料与基板相连。