公开(公告)号：US08451655B2

公开(公告)日：2013-05-28

申请号：US13364955

申请日：2012-02-02

Applicant: Shine Chung ,  Hung-Sen Wang ,  Tao-Wen Chung ,  Chun-Jung Lin ,  Yu-Jen Wang

Inventor： Shine Chung ,  Hung-Sen Wang ,  Tao-Wen Chung ,  Chun-Jung Lin ,  Yu-Jen Wang

IPC: G11C11/00

CPC classification number: G11C11/1677 ,  G11C11/1675

Abstract: A circuit includes magneto-resistive random access memory (MRAM) cell and a control circuit. The control circuit is electrically coupled to the MRAM cell, and includes a current source configured to provide a first writing pulse to write a value into the MRAM cell, and a read circuit configured to measure a status of the MRAM cell. The control circuit is further configured to verify whether a successful writing is achieved through the first writing pulse.

Abstract translation: 电路包括磁阻随机存取存储器（MRAM）单元和控制电路。 控制电路电耦合到MRAM单元，并且包括被配置为提供第一写入脉冲以将值写入MRAM单元的电流源和被配置为测量MRAM单元的状态的读取电路。 控制电路还被配置为验证通过第一写入脉冲是否实现了成功写入。

公开(公告)号：US20120299134A1

公开(公告)日：2012-11-29

申请号：US13561201

申请日：2012-07-30

Applicant: Guenole Jan ,  Ru-Ying Tong ,  Yu-Jen Wang

Inventor： Guenole Jan ,  Ru-Ying Tong ,  Yu-Jen Wang

IPC: H01L29/82 ,  H01L21/46

CPC classification number: H01L43/12 ,  G11C11/161 ,  H01F10/30 ,  H01F10/3254 ,  H01F10/3286 ,  H01F41/307 ,  H01L29/66007 ,  H01L29/66984 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

Abstract: A MTJ for a spintronic device is disclosed and includes a thin seed layer that enhances perpendicular magnetic anisotropy (PMA) in an overlying laminated layer with a (Co/X)n or (CoX)n composition where n is from 2 to 30, X is one of V, Rh, Ir, Os, Ru, Au, Cr, Mo, Cu, Ti, Re, Mg, or Si, and CoX is a disordered alloy. A CoFeB layer may be formed between the laminated layer and a tunnel barrier layer to serve as a transitional layer between a (111) laminate and (100) MgO tunnel barrier. The laminated layer may be used as a reference layer, dipole layer, or free layer in a MTJ. Annealing between 300° C. and 400° C. may be used to further enhance PMA in the laminated layer.

Abstract translation: 公开了一种用于自旋电子器件的MTJ，并且包括薄层种子层，其通过（Co / X）n或（CoX）n组合物（其中n为2至30）X覆盖层叠层中的垂直磁各向异性（PMA） 是V，Rh，Ir，Os，Ru，Au，Cr，Mo，Cu，Ti，Re，Mg或Si中的一种，CoX是无序合金。 可以在层压层和隧道势垒层之间形成CoFeB层，以用作（111）层压体和（100）MgO隧道势垒之间的过渡层。 叠层可以用作MTJ中的参考层，偶极子层或自由层。 在300℃和400℃之间的退火可用于进一步增强层压层中的PMA。

公开(公告)号：US08270207B2

公开(公告)日：2012-09-18

申请号：US12687720

申请日：2010-01-14

Applicant: Shine Chung ,  Tao-Wen Chung ,  Chun-Jung Lin ,  Yu-Jen Wang

Inventor： Shine Chung ,  Tao-Wen Chung ,  Chun-Jung Lin ,  Yu-Jen Wang

IPC: G11C11/00

CPC classification number: G11C11/1675 ,  G11C11/1659 ,  G11C11/1673

Abstract: A method of operating magneto-resistive random access memory (MRAM) cells includes providing an MRAM cell, which includes a magnetic tunneling junction (MTJ) device and a word line selector having a source-drain path serially coupled to the MTJ device. A negative substrate bias voltage is connected to a body of the word line selector to increase the drive current of the word line selector. The threshold voltage of the word line selector is also reduced.

Abstract translation: 操作磁阻随机存取存储器（MRAM）单元的方法包括提供包括磁隧道结（MTJ）器件的MRAM单元和具有串联耦合到MTJ器件的源极 - 漏极路径的字线选择器。 负极衬底偏置电压连接到字线选择器的主体以增加字线选择器的驱动电流。 字线选择器的阈值电压也减小。

公开(公告)号：US20120170358A1

公开(公告)日：2012-07-05

申请号：US13308065

申请日：2011-11-30

Applicant: Jhon Jhy Liaw ,  Yu-Jen Wang ,  Chia-Shiung Tsai

Inventor： Jhon Jhy Liaw ,  Yu-Jen Wang ,  Chia-Shiung Tsai

IPC: G11C11/16 ,  H01L29/82 ,  H01L21/8246

CPC classification number: H01L43/12 ,  B82Y10/00 ,  G11C11/1655 ,  G11C11/1657 ,  G11C11/1659 ,  H01L27/228 ,  H01L43/08

Abstract: Disclosed herein is an improved memory device, and related methods of manufacturing, wherein the area occupied by a conventional landing pad is significantly reduced to around 50% to 10% of the area occupied by conventional landing pads. This is accomplished by removing the landing pad from the cell structure, and instead forming a conductive via structure that provides the electrical connection from the memory stack or device in the structure to an under-metal layer. By forming only this via structure, rather than separate vias formed on either side of a landing pad, the overall width occupied by the connective via structure from the memory stack to an under-metal layer is substantially reduced, and thus the via structure and under-metal layer may be formed closer to the memory stack (or conductors associated with the stack) so as to reduce the overall width of the cell structure.

Abstract translation: 这里公开了一种改进的存储器件和相关的制造方法，其中传统的着陆焊盘占据的面积显着地减少到传统的着陆焊盘占据的面积的大约50％到10％。 这是通过从电池结构中移除着陆焊盘而实现的，而是形成导电通孔结构，其提供从结构中的存储器堆或器件到下金属层的电连接。 通过仅形成该通孔结构，而不是形成在着陆焊盘的任一侧上的分离的通孔，结构通孔结构从存储器堆叠到下金属层占据的总宽度大大减小，因此通孔结构和下面 金属层可以形成为更靠近存储器堆叠（或与堆叠相关联的导体），以便减小电池结构的整体宽度。

公开(公告)号：US08166810B2

公开(公告)日：2012-05-01

申请号：US12420166

申请日：2009-04-08

Applicant: Chung-De Chen ,  Yu-Jen Wang ,  Chien Li ,  Shih-Hao Wang ,  Pin Chang

Inventor： Chung-De Chen ,  Yu-Jen Wang ,  Chien Li ,  Shih-Hao Wang ,  Pin Chang

IPC: B60C23/02

CPC classification number: H02K35/02

Abstract: A swinging apparatus comprising an energy provider and a swinging mechanism disposed thereon. By means of adjusting the size and shape of the swinging mechanism and adjusting a distance between the swinging mechanism and the energy provider so as to control the ratio of the distance between the swinging mechanism and the energy provider to a characteristic value corresponding to the swing mechanism in a range between 4 and 0.25, the swinging frequency of the swinging mechanism may be adjusted automatically to comply with the variation of the motion frequency of the energy provider. The present invention further provides an energy harvester to work with the swinging apparatus and a coil to generate an induced current for power generation during the swing of the swing mechanism. In the present invention, the natural frequency of the swing mechanism may be adjusted according to the rotational velocity of the energy provider.

Abstract translation: 一种摆动装置，包括能量供应器和设置在其上的摆动机构。 通过调节摆动机构的尺寸和形状并调节摆动机构与能量提供者之间的距离，以便控制摆动机构与能量提供者之间的距离与对应于摆动机构的特性值的比率 在4和0.25之间的范围内，可以自动调节摆动机构的摆动频率以符合能量提供者的运动频率的变化。 本发明还提供一种与摆动装置一起工作的能量收集器和一个线圈，用于在摆动机构摆动期间产生用于发电的感应电流。 在本发明中，摆动机构的固有频率可以根据能量提供者的旋转速度进行调节。

公开(公告)号：US08143683B2

公开(公告)日：2012-03-27

申请号：US12756743

申请日：2010-04-08

Applicant: Yung-Hung Wang ,  Yu-Jen Wang ,  Mark Juang ,  Chia-Shiung Tsai

Inventor： Yung-Hung Wang ,  Yu-Jen Wang ,  Mark Juang ,  Chia-Shiung Tsai

IPC: H01L29/82

CPC classification number: H01L27/228 ,  G11C11/161 ,  G11C11/1657 ,  G11C11/1659 ,  H01L43/08 ,  H01L43/12

Abstract: A method of forming an integrated circuit includes forming magnetic tunnel junction (MTJ) layers; etching the MTJ layers to form a MTJ cell; and forming a dielectric capping layer on sidewalls of the MTJ cell, wherein the step of forming the dielectric capping layer is in-situ performed with the step of etching the MTJ layers.

Abstract translation: 形成集成电路的方法包括形成磁隧道结（MTJ）层; 蚀刻MTJ层以形成MTJ电池; 以及在MTJ电池的侧壁上形成电介质覆盖层，其中形成电介质覆盖层的步骤是用蚀刻MTJ层的步骤进行的。

公开(公告)号：US08110881B2

公开(公告)日：2012-02-07

申请号：US11863130

申请日：2007-09-27

Applicant: Ya-Chen Kao ,  Chun-Jung Lin ,  Yu-Jen Wang ,  Hsu-Chen Cheng ,  Feng-Jia Shiu ,  Yung-Tao Lin

Inventor： Ya-Chen Kao ,  Chun-Jung Lin ,  Yu-Jen Wang ,  Hsu-Chen Cheng ,  Feng-Jia Shiu ,  Yung-Tao Lin

IPC: H01L29/82

CPC classification number: H01L43/12 ,  B82Y10/00 ,  B82Y25/00 ,  G11C11/16 ,  H01L43/08

Abstract: A MRAM cell structure includes a bottom electrode; a magnetic tunnel junction unit disposed on the bottom electrode; a top electrode disposed on the magnetic tunnel junction unit; and a blocking layer disposed on the top electrode, wherein the blocking layer is wider than the magnetic tunnel junction unit for preventing against formation of a short circuit between a contact and the magnetic tunnel junction unit.

Abstract translation: MRAM单元结构包括底电极; 设置在所述底部电极上的磁性隧道结单元; 设置在磁隧道结单元上的顶电极; 以及设置在所述顶部电极上的阻挡层，其中所述阻挡层比所述磁性隧道结单元宽，以防止在触点和所述磁性隧道结单元之间形成短路。

公开(公告)号：US07989948B2

公开(公告)日：2011-08-02

申请号：US12472359

申请日：2009-05-26

Applicant: Jui-Ching Hsieh ,  Pin Chang ,  Chung-De Chen ,  Li-Chi Pan ,  Yu-Jen Wang ,  Chin-Horng Wang

Inventor： Jui-Ching Hsieh ,  Pin Chang ,  Chung-De Chen ,  Li-Chi Pan ,  Yu-Jen Wang ,  Chin-Horng Wang

IPC: H01L21/50

CPC classification number: H01L23/3672 ,  H01L23/42 ,  H01L31/052 ,  H01L33/62 ,  H01L33/641 ,  H01L33/642 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05568 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/16 ,  Y02E10/50 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2924/013

Abstract: A chip package structure including a heat dissipation substrate, a chip and a heterojunction heat conduction buffer layer is provided. The chip is disposed on the heat dissipation substrate. The heterojunction heat conduction buffer layer is disposed between the heat dissipation substrate and the chip. The heterojunction heat conduction buffer layer includes a plurality of pillars perpendicular to the heat dissipation substrate. The aspect ratio of each pillar is between about 3:1 and 50:1.

Abstract translation: 提供了包括散热基板，芯片和异质结导热缓冲层的芯片封装结构。 芯片设置在散热基板上。 异质结导热缓冲层设置在散热基板和芯片之间。 异质结导热缓冲层包括垂直于散热基板的多个支柱。 每个柱的纵横比在约3:1至50:1之间。

公开(公告)号：US20110001201A1

公开(公告)日：2011-01-06

申请号：US12828593

申请日：2010-07-01

Applicant: Yu-Jen WANG ,  Ya-Chen KAO ,  Chun-Jung LIN

Inventor： Yu-Jen WANG ,  Ya-Chen KAO ,  Chun-Jung LIN

IPC: H01L29/82 ,  H01L21/02

CPC classification number: H01L43/12 ,  H01L43/08

Abstract: A magnetic tunnel junction (MTJ) etching process uses a sacrifice layer. An MTJ cell structure includes an MTJ stack with a first magnetic layer, a second magnetic layer, and a tunnel barrier layer in between the first magnetic layer and the second magnetic layer, and a sacrifice layer adjacent to the second magnetic layer, where the sacrifice layer protects the second magnetic layer in the MTJ stack from oxidation during an ashing process. The sacrifice layer does not increase a resistance of the MTJ stack. The sacrifice layer can be made of Mg, Cr, V, Mn, Ti, Zr, Zn, or any alloy combination thereof, or any other suitable material. The sacrifice layer can be multi-layered and/or have a thickness ranging from 5 Å to 400 Å. The MTJ cell structure can have a top conducting layer over the sacrifice layer.

Abstract translation: 磁隧道结（MTJ）蚀刻工艺使用牺牲层。 MTJ单元结构包括在第一磁性层和第二磁性层之间的具有第一磁性层，第二磁性层和隧道势垒层的MTJ堆叠以及与第二磁性层相邻的牺牲层，其中牺牲 层在灰化过程中保护MTJ堆叠中的第二磁性层免受氧化。 牺牲层不会增加MTJ堆叠的电阻。 牺牲层可以由Mg，Cr，V，Mn，Ti，Zr，Zn或其任何合金组合或任何其它合适的材料制成。 牺牲层可以是多层的和/或具有从5到400的厚度。 MTJ单元结构可以在牺牲层上方具有顶部导电层。

公开(公告)号：US07834410B2

公开(公告)日：2010-11-16

申请号：US12422579

申请日：2009-04-13

Applicant: Yu-Jen Wang ,  Ya-Chen Kao ,  Chun-Jung Lin

Inventor： Yu-Jen Wang ,  Ya-Chen Kao ,  Chun-Jung Lin

IPC: H01L29/82 ,  G11C11/02

CPC classification number: H01L43/08 ,  G11C11/161 ,  H01L27/228 ,  H01L43/12

Abstract: The present disclosure provides a semiconductor memory device. The device includes a bottom electrode over a semiconductor substrate; an anti-ferromagnetic layer disposed over the bottom electrode; a pinned layer disposed over the anti-ferromagnetic layer; a barrier layer disposed over the pinned layer; a first ferromagnetic layer disposed over the barrier layer; a buffer layer disposed over the first ferromagnetic layer, the buffer layer including tantalum; a second ferromagnetic layer disposed over the buffer layer; and a top electrode disposed over the second ferromagnetic layer.

Abstract translation: 本公开提供一种半导体存储器件。 该器件包括在半导体衬底上的底部电极; 设置在底部电极上的反铁磁层; 设置在反铁磁层上的钉扎层; 设置在被钉扎层上的阻挡层; 设置在阻挡层上的第一铁磁层; 设置在所述第一铁磁层上的缓冲层，所述缓冲层包括钽; 设置在所述缓冲层上的第二铁磁层; 以及设置在第二铁磁层上的顶电极。