公开(公告)号：US08042724B2

公开(公告)日：2011-10-25

申请号：US11882824

申请日：2007-08-06

Applicant: Andreas Ostmann ,  Alexander Neumann ,  Dionysios Manessis ,  Rainer Patzelt

Inventor： Andreas Ostmann ,  Alexander Neumann ,  Dionysios Manessis ,  Rainer Patzelt

IPC: B23K31/00 ,  H01L21/44

CPC classification number: H05K1/188 ,  H01L24/24 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1132 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13193 ,  H01L2224/2402 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/83 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0358 ,  H05K2201/10674 ,  H05K2203/1189 ,  H01L2224/13099 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method is provided for making an electrical connection with a microelectronic component arranged on or embedded within a surface of a circuit board layer or a substrate. The microelectronic component has an electrical contact face that is accessible on a surface of the microelectronic component. An electrically conducting bump is applied to the electrical contact face of the microelectronic component. A metal foil or metal coat is applied via a coating of an insulating binder to the surface of the circuit board under an action of pressure and/or heat so that the electrically conducting bump penetrates the coating of the insulating binder to make the electrical connection between the metal foil or metal coat and the electrical contact face.

Abstract translation: 提供了一种用于与布置在电路板层或衬底的表面上或嵌入电路板层或衬底的表面中的微电子组件进行电连接的方法。 微电子部件具有可在微电子部件的表面上接近的电接触面。 将导电凸起施加到微电子部件的电接触面。 金属箔或金属涂层通过绝缘粘合剂的涂层在压力和/或热的作用下施加到电路板的表面，使得导电凸块穿透绝缘粘合剂的涂层，以使电连接 金属箔或金属涂层和电接触面。

公开(公告)号：US20080061115A1

公开(公告)日：2008-03-13

申请号：US11882824

申请日：2007-08-06

Applicant: Andreas Ostmann ,  Alexander Neumann ,  Dionysios Manessis ,  Rainer Patzelt

Inventor： Andreas Ostmann ,  Alexander Neumann ,  Dionysios Manessis ,  Rainer Patzelt

IPC: B23K1/20 ,  B23K20/00

CPC classification number: H05K1/188 ,  H01L24/24 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1132 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13193 ,  H01L2224/2402 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/83 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0358 ,  H05K2201/10674 ,  H05K2203/1189 ,  H01L2224/13099 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method is provided for making an electrical connection with a microelectronic component arranged on or embedded within a surface of a circuit board layer or a substrate. The microelectronic component has an electrical contact face that is accessible on a surface of the microelectronic component. An electrically conducting bump is applied to the electrical contact face of the microelectronic component. A metal foil or metal coat is applied via a coating of an insulating binder to the surface of the circuit board under an action of pressure and/or heat so that the electrically conducting bump penetrates the coating of the insulating binder to make the electrical connection between the metal foil or metal coat and the electrical contact face.

Abstract translation: 提供了一种用于与布置在电路板层或衬底的表面上或嵌入电路板层或衬底的表面中的微电子组件进行电连接的方法。 微电子部件具有可在微电子部件的表面上接近的电接触面。 将导电凸起施加到微电子部件的电接触面。 金属箔或金属涂层通过绝缘粘合剂的涂层在压力和/或热的作用下施加到电路板的表面，使得导电凸块穿透绝缘粘合剂的涂层，以使电连接 金属箔或金属涂层和电接触面。

公开(公告)号：USD989184S1

公开(公告)日：2023-06-13

申请号：US29798104

申请日：2021-07-06

Applicant: Alexander Neumann

Designer： Alexander Neumann

Abstract: FIG. 1 is a top perspective view of the block stacking game;
FIG. 2 is a top perspective exploded view thereof;
FIG. 3 is a top view thereof;
FIG. 4 is a bottom view thereof;
FIG. 5 is a right side view thereof;
FIG. 6 is a left side view thereof;
FIG. 7 is a back view thereof; and,
FIG. 8 is a front view thereof.
The claim is directed to the collective appearance of the block stacking game set shown in the figures. The components of the set are arranged on the drawing sheet for the convenience of illustration, and the relative positioning of the block stacking game forms no part of the claimed design.

公开(公告)号：US09456500B2

公开(公告)日：2016-09-27

申请号：US13515012

申请日：2010-12-17

Applicant: Thomas Gottwald ,  Alexander Neumann

Inventor： Thomas Gottwald ,  Alexander Neumann

IPC: H05K3/30 ,  H05K1/18 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H05K3/20 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K1/186 ,  H01L21/4846 ,  H01L21/486 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2221/6835 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2224/1134 ,  H01L2224/12105 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/214 ,  H01L2224/2201 ,  H01L2224/221 ,  H01L2224/224 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/9202 ,  H01L2924/00011 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H05K1/189 ,  H05K3/205 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/462 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/10977 ,  H05K2203/063 ,  H05K2203/1469 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/83851

Abstract: The present invention relates to a method for producing a conductor structural element, comprising providing a rigid substrate, electrodepositing a copper coating on the rigid substrate, applying a conductor pattern structure to the copper coating, then possibly mounting components, laminating the substrate with at least one electrically insulating layer, detaching the rigid substrate, at least partially removing the remaining copper coating of the rigid substrate in such a way that the conductor pattern structure is exposed.

Abstract translation: 导体结构元件的制造方法技术领域本发明涉及一种导体结构元件的制造方法，其特征在于，提供刚性基板，在所述刚性基板上电沉积铜涂层，将铜导体图案结构施加到所述铜涂层上，然后可能安装部件，至少层叠所述基板 一个电绝缘层，分离刚性基板，至少部分地去除刚性基板的剩余的铜涂层，使得暴露导体图案结构。

公开(公告)号：US20130094077A1

公开(公告)日：2013-04-18

申请号：US13629598

申请日：2012-09-27

Applicant: Steven R.J. Brueck ,  Alexander Neumann ,  Yuliya Kuznetsova

Inventor： Steven R.J. Brueck ,  Alexander Neumann ,  Yuliya Kuznetsova

IPC: G02B21/06

CPC classification number: G02B21/06 ,  G01N2021/653 ,  G02B21/0056 ,  G02B21/365 ,  G06T3/4061

Abstract: In accordance with the aspects of the present disclosure, a method and apparatus is disclosed for imaging interferometric microscopy (IIM), which can use an immersion medium to enhance resolution up to a resolution of linear systems resolution limit of λ/4n, where λ is the wavelength in free space and n is the index of refraction of a transmission medium.

Abstract translation: 根据本公开的方面，公开了用于成像干涉显微镜（IIM）的方法和装置，其可以使用浸没介质来增强分辨率，直到λ/ 4n的线性系统分辨率极限的分辨率，其中λ是 自由空间中的波长和n是传输介质的折射率。

公开(公告)号：US08020288B2

公开(公告)日：2011-09-20

申请号：US12450998

申请日：2008-04-28

Applicant: Ulrich Schaaf ,  Andreas Kugler ,  Karl-Friederich Becker ,  Alexander Neumann ,  Jan Kostelnik

Inventor： Ulrich Schaaf ,  Andreas Kugler ,  Karl-Friederich Becker ,  Alexander Neumann ,  Jan Kostelnik

IPC: H05K7/00 ,  H05K3/00

CPC classification number: H01L23/5389 ,  H01L23/3121 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/24227 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/83132 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/1461 ,  H01L2924/181 ,  H05K1/0206 ,  H05K1/0207 ,  H05K1/188 ,  H05K3/4602 ,  H05K3/4641 ,  H05K2201/068 ,  H05K2201/10674 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49139 ,  H01L2924/00

Abstract: In a method for producing an electronic subassembly, at least one electronic component is fixed in place on an insulating layer of a conductive foil in a first step, the conductive foil with the electronic component is laminated onto a circuit board substrate, and a circuit track structure is then developed by structuring the conductive foil. The expansion coefficient of the insulating layer lies between the expansion coefficient of the circuit board substrate and the expansion coefficient of the circuit track structure, and/or electronic components that require small passages for contacting with the circuit track structure are pressed deeper into the insulating layer than electronic components that require larger passages in the insulating layer.

Abstract translation: 在一种电子组件的制造方法中，在第一步骤中，将至少一个电子部件固定在导电箔的绝缘层上的适当位置，将具有电子部件的导电箔层压到电路板基板上，并且将电路轨迹 然后通过构造导电箔来开发结构。 绝缘层的膨胀系数位于电路板基板的膨胀系数和电路轨道结构的膨胀系数之间，和/或需要与电路轨道结构接触的小通道的电子部件被更深地压入绝缘层 比在绝缘层中需要更大通道的电子部件。

公开(公告)号：US20110211253A1

公开(公告)日：2011-09-01

申请号：US13087297

申请日：2011-04-14

Applicant: Steven R. J. Brueck ,  Alexander Neumann ,  Yuliya V. Kuznetsova

Inventor： Steven R. J. Brueck ,  Alexander Neumann ,  Yuliya V. Kuznetsova

IPC: G02B21/06

CPC classification number: G02B21/18 ,  G02B21/06 ,  G02B21/367

Abstract: Exemplary embodiments provide an image interferometric microscope (IIM) and methods for image interferometric microscopy. The disclosed IIM can approach the linear systems limits of optical resolution by using a plurality of off-axis illuminations to access high spatial frequencies along with interferometric reintroduction of a zero-order reference beam on the low-NA side of the optical system. In some embodiments, a thin object can be placed normal to the optical axis and the frequency space limit can be extended to about [(1+NA)n/λ], where NA is the numerical-aperture of the objective lens used, n is the refraction index of the transmission medium and λ is an optical wavelength. In other embodiments, tilting the object plane can further allow collection of diffraction information up to the material transmission bandpass limited spatial frequency of about 2n/λ.

Abstract translation: 示例性实施例提供图像干涉显微镜（IIM）和用于图像干涉显微镜的方法。 所公开的IIM可以通过使用多个离轴照明来接近高分辨率的光学系统的光学分辨率的线性系统极限，以及在光学系统的低NA侧上的零级参考光束的干涉重新引入。 在一些实施例中，薄物体可以垂直于光轴放置，并且频率空间极限可以扩展到约[（1 + NA）n /λ]，其中NA是所用物镜的数值孔径，n 是传输介质的折射率，λ是光波长。 在其他实施例中，倾斜物平面可以进一步允许将衍射信息收集到材料透射带通限制空间频率约2n /λ。

公开(公告)号：US10969364B1

公开(公告)日：2021-04-06

申请号：US15896843

申请日：2018-02-14

Applicant: Steven R. J. Brueck ,  Jeremy Scott Edwards ,  Alexander Neumann ,  Yuliya Kuznetsova ,  Edgar A. Mendoza ,  C. Jeffrey Brinker

Inventor： Steven R. J. Brueck ,  Jeremy Scott Edwards ,  Alexander Neumann ,  Yuliya Kuznetsova ,  Edgar A. Mendoza ,  C. Jeffrey Brinker

IPC: G01N27/447 ,  B01L3/00 ,  C12Q1/6869

Abstract: Methods and apparatus for long read, label-free, optical nanopore long chain molecule sequencing. In general, the present disclosure describes a novel sequencing technology based on the integration of nanochannels to deliver single long-chain molecules with widely spaced (>wavelength), ˜1-nm aperture “tortuous” nanopores that slow translocation sufficiently to provide massively parallel, single base resolution using optical techniques. A novel, directed self-assembly nanofabrication scheme using simple colloidal nanoparticles is used to form the nanopore arrays atop nanochannels that unfold the long chain molecules. At the surface of the nanoparticle array, strongly localized electromagnetic fields in engineered plasmonic/polaritonic structures allow for single base resolution using optical techniques.

公开(公告)号：US09156004B2

公开(公告)日：2015-10-13

申请号：US13831537

申请日：2013-03-14

Applicant: Steven R. J. Brueck ,  Deying Xia ,  Yuliya Kuznetsova ,  Alexander Neumann

Inventor： Steven R. J. Brueck ,  Deying Xia ,  Yuliya Kuznetsova ,  Alexander Neumann

IPC: B01D69/04 ,  G03F7/20 ,  B81C1/00 ,  B82Y30/00

CPC classification number: B01D69/04 ,  B81C1/00071 ,  B82Y30/00 ,  G03F7/2051 ,  Y10S977/78 ,  Y10S977/84 ,  Y10T137/0324 ,  Y10T137/3006

Abstract: In accordance with the invention, there is a method of forming a nanochannel including depositing a photosensitive film stack over a substrate and forming a pattern on the film stack using interferometric lithography. The method can further include depositing a plurality of silica nanoparticles to form a structure over the pattern and removing the pattern while retaining the structure formed by the plurality of silica nanoparticles, wherein the structure comprises an enclosed nanochannel.

Abstract translation: 根据本发明，存在一种形成纳米通道的方法，其包括在衬底上沉积感光膜堆叠并且使用干涉光刻在膜堆上形成图案。 该方法可以进一步包括沉积多个二氧化硅纳米颗粒以在图案上形成结构并除去图案，同时保留由多个二氧化硅纳米颗粒形成的结构，其中该结构包括封闭的纳米通道。

公开(公告)号：US20130193065A1

公开(公告)日：2013-08-01

申请号：US13831537

申请日：2013-03-14

Applicant: Steven R.J. Brueck ,  Deying Xia ,  Yuliya Kuznetsova ,  Alexander Neumann

Inventor： Steven R.J. Brueck ,  Deying Xia ,  Yuliya Kuznetsova ,  Alexander Neumann

IPC: B01D69/04 ,  G03F7/20

CPC classification number: B01D69/04 ,  B81C1/00071 ,  B82Y30/00 ,  G03F7/2051 ,  Y10S977/78 ,  Y10S977/84 ,  Y10T137/0324 ,  Y10T137/3006

Abstract: In accordance with the invention, there is a method of forming a nanochannel including depositing a photosensitive film stack over a substrate and forming a pattern on the film stack using interferometric lithography. The method can further include depositing a plurality of silica nanoparticles to form a structure over the pattern and removing the pattern while retaining the structure formed by the plurality of silica nanoparticles, wherein the structure comprises an enclosed nanochannel.

Abstract translation: 根据本发明，存在一种形成纳米通道的方法，其包括在衬底上沉积感光膜堆叠并且使用干涉光刻在膜堆上形成图案。 该方法可以进一步包括沉积多个二氧化硅纳米颗粒以在图案上形成结构并除去图案，同时保留由多个二氧化硅纳米颗粒形成的结构，其中该结构包括封闭的纳米通道。