Abstract:
A bond pad structure and a method of fabricating such structure are disclosed in the invention. The bond pad structure is formed over a predetermined area defined on a semiconductor substrate. The bond pad structure includes at least two metal layers formed over the predetermined area and at least one sub-structure combination layer which each is formed over the predetermined area and formed between two corresponding first metal layers. Each sub-structure combination layer includes a dielectric layer formed over the predetermined area, formed-through via openings with special disposition on the dielectric layer, a first diffusion barrier layer formed over the dielectric layer and the sidewalls and bottom of the via openings, a metal material filled into the via openings to form via plugs, and a second diffusion barrier layer formed over the first diffusion barrier layer and via plugs. Due to special disposition of via plugs and well adhesion between metal layer and diffusion barrier layers, the bond pad structure, according to the invention, can prevent form damage possibly induced during subsequent probe test procedure and wire bonding process.
Abstract:
A tray is adapted to receive a plurality of ball grid array devices therein, and includes a base plate having a device-receiving portion and a peripheral portion around the device-receiving portion. The device-receiving portion has a top side formed with a device-receiving recess. The top side of the device-receiving portion is further formed with a partition unit in the device-receiving recess for dividing the device-receiving recess into a plurality of cavities adapted for receiving the ball grid array devices respectively therein. The device-receiving portion further has a bottom side formed with a plurality of openings. Each of the openings is aligned with a corresponding one of the cavities and is adapted to receive an array of ball contacts formed on a bottom side of the ball grid array device that is disposed in the corresponding one of the cavities therein. The openings are grouped into a set of first openings remote from the peripheral portion and a set of second openings surrounding the first openings and adjacent to the peripheral portion. Guard strips are formed on the bottom side of the device-receiving portion and are disposed solely and respectively in the second openings.
Abstract:
This disclosure presents a heat dissipation mechanism, which conducts generated heat of a thermal device to the housing of an electronic apparatus by a metal piece fastened between the thermal device and electronic apparatus, and then dissipates heat into the air through multiple holes opened over an apparatus shell. Besides, the presented mechanism is also suitable to mini-size, portable electronic apparatus to solve the thermal dissipation technique thereof.
Abstract:
A die paddle for receiving an integrated circuit die in a plastic substrate. The die paddle is defined by a copper film on the plastic substrate and comprises a plurality of via holes through the plastic substrate, a plurality of opening through the copper film, and a gold-containing ring formed on the peripheral portion of the copper film. The outermost openings (and/or the outermost via holes) and the gold-containing ring are separated by a distance of about 1 to about 20 mils.
Abstract:
An integrated circuit device. The substrate includes a signal connection point and two shielding connection points set at the two sides of the signal connection point. The chip is set on the substrate. There are a signal pad and two shielding pads set at the two sides of the signal pad on the edge of the chip. The signal wire bonding is coupled to the signal connection point and the signal pad. Two shielding wire bondings are coupled to the shielding connection points and the shielding pads and extend along both sides of the signal wire bonding. The signal trace line is set on the substrate and coupled to the signal connection point. The power ring circuit is set on the substrate and coupled to the shielding connection points. The power circuit includes two shielding lines extending along both sides of the signal trace line.
Abstract:
A bond pad structure and a method of fabricating such structure are disclosed in the invention. The bond pad structure is formed over a predetermined area defined on a semiconductor substrate. The bond pad structure includes at least two metal layers formed over the predetermined area and at least one sub-structure combination layer which each is formed over the predetermined area and formed between two corresponding first metal layers. Each sub-structure combination layer includes a dielectric layer formed over the predetermined area, formed-through via openings with special disposition on the dielectric layer, a first diffusion barrier layer formed over the dielectric layer and the sidewalls and bottom of the via openings, a metal material filled into the via openings to form via plugs, and a second diffusion barrier layer formed over the first diffusion barrier layer and via plugs. Due to special disposition of via plugs and well adhesion between metal layer and diffusion barrier layers, the bond pad structure, according to the invention, can prevent form damage possibly induced during subsequent probe test procedure and wire bonding process.
Abstract:
A handheld electronic apparatus including a casing, a cover, a motherboard, an in-cell touch display module, a light guide member, and a touch module is provided. The cover covers a casing opening, and constitutes an accommodation space with the casing. The cover has a first area and a second area having a light transmissive icon. The motherboard is electrically connected with the in-cell touch display module and the touch module. The in-cell touch display module has a display area disposed beneath the first area. The light guide member is disposed within the accommodation space, and capable of guiding a light generated from a light emitting element to the light transmissive icon. The light guide member has a sheet-shaped portion disposed beneath the second area by corresponding to the light transmissive icon. The touch module is disposed within the accommodation space and beneath the second area.
Abstract:
Layout methods for a substrate are disclosed. In one embodiment, the method includes: defining a first plating line on a non-conducting layer coupled to a first pad; and defining a second plating line on the first conducting layer coupled to a second pad. Along a direction away from the first pad and the second pad, a distance between the first plating line and the second plating line becomes longer. In another embodiment, the method includes: defining a plating line on a non-conducting layer, the plating line being coupled to a pad; and replacing a portion of at least a conducting layer with a non-conducting material, wherein the portion is directly under the plating line.
Abstract:
The present invention provides a heat sink device for the package device to improve the heat dissipating efficiency. The heat sink device includes a first heat sink assembly and a second heat sink assembly. The first heat sink assembly has a first heat dissipating structure, a second heat dissipating structure positioned above first the heat dissipating structure, at least two thermal supports on the backside of the first heat sink assembly and a thermal block on the backside of the first heat sink assembly. The second heat sink assembly has a protruding structure and at least the openings. The first heat sink assembly is fixed with the second heat sink assembly to form a heat sink device by the combination of the thermal supports and the openings. The first heat sink assembly and the second heat sink assembly are attached to the integrated circuit device separately by the thermal block and the protruding structure. This heat sink device provides several heat dissipating pathes by the second heat dissipating structure, the thermal supports, the thermal block, and protruding structure. Therefore, the heat dissipation efficiency of the heat sink device is improved.
Abstract:
The present invention relates to a thermal dissipating element of a chip to dissipate heat producing by operating the chip. The thermal dissipating element includes a top plate and a side plate, wherein the top plate curves and extends to be the side plate. The top plate includes a sink contacting with the chip.