公开(公告)号：US20140175644A1

公开(公告)日：2014-06-26

申请号：US13721329

申请日：2012-12-20

申请人： Sriram Srinivasan ,  Ram S. Viswanath ,  Paul R. Start ,  Rajen S. Sidhu ,  Rajasekaran Swaminathan

发明人： Sriram Srinivasan ,  Ram S. Viswanath ,  Paul R. Start ,  Rajen S. Sidhu ,  Rajasekaran Swaminathan

IPC分类号： H01L23/00 ,  H01L23/498

CPC分类号： H01L24/81 ,  H01L23/3675 ,  H01L23/42 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/81801 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01083 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/20105 ,  H01L2924/2064 ,  H01L2924/20643 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/00

摘要： Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include attaching a device to a patch substrate, wherein the assembled device and patch substrate comprise a warpage, attaching the assembled device and patch substrate to an interposer to form a package structure, and then reflowing the package structure at a temperature below about 200 degrees Celsius to form a substantially flat package structure.

摘要翻译： 描述了形成微电子封装结构的方法及由此形成的相关结构。 这些方法和结构可以包括将装置附接到贴片基板，其中组装的装置和贴片基板包括翘曲，将组装的装置和贴片基板附接到插入件以形成封装结构，然后在温度下回流封装结构 低于大约200摄氏度以形成基本平坦的包装结构。

公开(公告)号：US09613933B2

公开(公告)日：2017-04-04

申请号：US14198479

申请日：2014-03-05

申请人： Thomas J. De Bonis ,  Lilia May ,  Rajen S. Sidhu ,  Mukul P. Renavikar ,  Ashay A. Dani ,  Edward R. Prack ,  Carl L. Deppisch ,  Anna M. Prakash ,  James C. Matayabas, Jr. ,  Jason Jieping Zhang ,  Srinivasa R. Aravamudhan ,  Chang Lin

发明人： Thomas J. De Bonis ,  Lilia May ,  Rajen S. Sidhu ,  Mukul P. Renavikar ,  Ashay A. Dani ,  Edward R. Prack ,  Carl L. Deppisch ,  Anna M. Prakash ,  James C. Matayabas, Jr. ,  Jason Jieping Zhang ,  Srinivasa R. Aravamudhan ,  Chang Lin

IPC分类号： H01L23/12 ,  H01L25/065 ,  H01L25/10 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00

CPC分类号： H01L23/49816 ,  H01L21/4853 ,  H01L21/565 ,  H01L21/76802 ,  H01L23/3128 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/13023 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/37001 ,  H01L2924/00

摘要： An apparatus is described that includes a substrate and a mold compound disposed on the substrate. The semiconductor die is embedded within the mold compound and is electrically coupled to lands on the substrate. Solder balls are disposed around the semiconductor die on the substrate. Each of the solder balls have a solid coating thereon. The solid coating contains a cleaning agent to promote its solder ball's coalescence with another solder ball. Respective vias are formed in the mold compound that expose the solder balls and their respective solid coatings. In combined or alternate embodiments outer edges of the mold compound have smaller thickness than regions of the mold compound between the vias and the semiconductor die. In combined or alternate embodiments micro-channels exist between the solder balls and the mold compound.

公开(公告)号：US20140268534A1

公开(公告)日：2014-09-18

申请号：US13795042

申请日：2013-03-12

申请人： Rajen S. Sidhu ,  Mukul P. Renavikar ,  Sandeep B. Sane

发明人： Rajen S. Sidhu ,  Mukul P. Renavikar ,  Sandeep B. Sane

IPC分类号： H05K1/09 ,  C25D3/58 ,  H05K3/10

CPC分类号： C25D3/58 ,  C23C18/48 ,  C25D5/02 ,  H05K3/421 ,  H05K3/4644

摘要： Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include forming an opening in a dielectric material of a package substrate, and then plating a conductive interconnect structure in the opening utilizing a plating process. The plating process may comprises a conductive metal and a dopant comprising between about 0.05 and 10 percent weight, wherein the dopant comprises at least one of magnesium, zirconium and zinc.

摘要翻译： 描述了形成微电子封装结构的方法及由此形成的相关结构。 这些方法和结构可以包括在封装衬底的电介质材料中形成开口，然后使用电镀工艺在开口中镀覆导电互连结构。 电镀工艺可以包括导电金属和掺杂剂，其包含约0.05至10重量％的重量，其中掺杂剂包括镁，锆和锌中的至少一种。

公开(公告)号：US20150255415A1

公开(公告)日：2015-09-10

申请号：US14198479

申请日：2014-03-05

申请人： Thomas J. De Bonis ,  Lilia May ,  Rajen S. Sidhu ,  Mukul P. Renavikar ,  Ashay A. Dani ,  Edward R. Prack ,  Carl L. Deppisch ,  Anna M. Prakash ,  James C. Matayabas, JR. ,  Jason Jieping Zhang ,  Srinivasa R. Aravamudhan ,  Chang Lin

发明人： Thomas J. De Bonis ,  Lilia May ,  Rajen S. Sidhu ,  Mukul P. Renavikar ,  Ashay A. Dani ,  Edward R. Prack ,  Carl L. Deppisch ,  Anna M. Prakash ,  James C. Matayabas, JR. ,  Jason Jieping Zhang ,  Srinivasa R. Aravamudhan ,  Chang Lin

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  H01L21/768

CPC分类号： H01L23/49816 ,  H01L21/4853 ,  H01L21/565 ,  H01L21/76802 ,  H01L23/3128 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/13023 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/37001 ,  H01L2924/00

摘要： An apparatus is described that includes a substrate and a mold compound disposed on the substrate. The semiconductor die is embedded within the mold compound and is electrically coupled to lands on the substrate. Solder balls are disposed around the semiconductor die on the substrate. Each of the solder balls have a solid coating thereon. The solid coating contains a cleaning agent to promote its solder ball's coalescence with another solder ball. Respective vias are formed in the mold compound that expose the solder balls and their respective solid coatings. In combined or alternate embodiments outer edges of the mold compound have smaller thickness than regions of the mold compound between the vias and the semiconductor die. In combined or alternate embodiments micro-channels exist between the solder balls and the mold compound.

摘要翻译： 描述了一种包括设置在基板上的基板和模具化合物的装置。 半导体管芯被嵌入在模具化合物内并且电耦合到衬底上的焊盘。 焊球围绕半导体管芯设置在基板上。 每个焊球上都有一个固体涂层。 固体涂层含有一种清洁剂，以促进其焊球与另一种焊球的聚结。 在模具化合物中形成了暴露焊球及其各自固体涂层的通孔。 在组合或替代实施例中，模具化合物的外边缘具有比通孔和半导体管芯之间的模具化合物区域更小的厚度。 在组合或替代实施例中，焊料球与模具化合物之间存在微通道。

公开(公告)号：US20180005917A1

公开(公告)日：2018-01-04

申请号：US15197440

申请日：2016-06-29

申请人： Zhizhong Tang ,  Syadwad Jain ,  Wei Hu ,  Michael A. Schroeder ,  Rajen S. Sidhu ,  Carl L. Deppisch ,  Patrick Nardi ,  Kelly P. Lofgreen

发明人： Zhizhong Tang ,  Syadwad Jain ,  Wei Hu ,  Michael A. Schroeder ,  Rajen S. Sidhu ,  Carl L. Deppisch ,  Patrick Nardi ,  Kelly P. Lofgreen

IPC分类号： H01L23/373 ,  F28F21/08 ,  F28F21/02 ,  F28F21/04 ,  F28D15/02 ,  H01L23/498 ,  F28F13/00 ,  F28D21/00

CPC分类号： H01L23/3736 ,  F28D2021/0029 ,  F28F13/003 ,  F28F21/02 ,  F28F21/04 ,  F28F21/08 ,  F28F2013/001 ,  H01L23/3733 ,  H01L23/3737 ,  H01L23/42 ,  H01L23/49811 ,  H01L24/00 ,  H01L2224/73204 ,  H01L2224/73253

摘要： Devices and methods disclosed herein can include a conductive foam having pores disposed within the conductive foam. The conductive foam can be compressible between an uncompressed thickness and a compressed thickness. The compressed thickness can be ninety-five percent or less of the uncompressed thickness. In one example, a filler can be disposed in the pores of the conductive foam. The filler can include a first thermal conductivity. The first thermal conductivity can be greater than a thermal conductivity of air.

公开(公告)号：US20140264820A1

公开(公告)日：2014-09-18

申请号：US13801882

申请日：2013-03-13

申请人： Wei Hu ,  Zhizhong Tang ,  Syadwad Jain ,  Rajen S. Sidhu

发明人： Wei Hu ,  Zhizhong Tang ,  Syadwad Jain ,  Rajen S. Sidhu

IPC分类号： H01L23/373

CPC分类号： H01L23/3736 ,  H01L23/42 ,  H01L24/33 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2924/01322 ,  H01L2924/16251 ,  H01L2924/00

摘要： Embodiments of the present disclosure describe techniques and configurations for paste thermal interface materials (TIMs) and their use in integrated circuit (IC) packages. In some embodiments, an IC package includes an IC component, a heat spreader, and a paste TIM disposed between the die and the heat spreader. The paste TIM may include particles of a metal material distributed through a matrix material, and may have a bond line thickness, after curing, of between approximately 20 microns and approximately 100 microns. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例描述了用于糊状热界面材料（TIM）的技术和配置及其在集成电路（IC）封装中的应用。 在一些实施例中，IC封装包括设置在管芯和散热器之间的IC部件，散热器和粘合剂TIM。 糊料TIM可以包括通过基质材料分布的金属材料的颗粒，并且在固化后可以具有在约20微米和约100微米之间的粘合线厚度。 可以描述和/或要求保护其他实施例。

公开(公告)号：US08895365B2

公开(公告)日：2014-11-25

申请号：US13601788

申请日：2012-08-31

申请人： Suriyakala Ramalingam ,  Rajen S. Sidhu ,  Nisha Ananthakrishnan ,  Sivakumar Nagarajan ,  Wei Tan ,  Sandeep Razdan ,  Vipul V. Mehta

发明人： Suriyakala Ramalingam ,  Rajen S. Sidhu ,  Nisha Ananthakrishnan ,  Sivakumar Nagarajan ,  Wei Tan ,  Sandeep Razdan ,  Vipul V. Mehta

IPC分类号： H01L21/00

CPC分类号： H01L23/49816 ,  H01L21/563 ,  H01L23/49894 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2924/15311 ,  Y10T29/49146 ,  H01L2924/00012 ,  H01L2924/00

摘要： Embodiments of the present disclosure are directed towards techniques and configurations for surface treatment of an integrated circuit (IC) substrate. In one embodiment, an apparatus includes an integrated circuit substrate, an interconnect structure disposed on the integrated circuit substrate, the interconnect structure being configured to route electrical signals to or from the integrated circuit substrate and comprising a metal surface, and a protective layer disposed on the metal surface of the interconnect structure, the protective layer comprising a first functional group bonded with the metal surface and a second functional group bonded with the first functional group, wherein the second functional group is hydrophobic to inhibit contamination of the metal surface by hydrophilic materials and further inhibits oxidation of the metal surface. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例涉及用于集成电路（IC）衬底的表面处理的技术和配置。 在一个实施例中，一种装置包括集成电路基板，布置在集成电路基板上的互连结构，所述互连结构被配置为将电信号传送到集成电路基板或从集成电路基板引出并包括金属表面，以及保护层 所述互连结构的金属表面，所述保护层包含与所述金属表面接合的第一官能团和与所述第一官能团键合的第二官能团，其中所述第二官能团是疏水性的，以抑制由亲水材料污染所述金属表面 并进一步抑制金属表面的氧化。 可以描述和/或要求保护其他实施例。

公开(公告)号：US08701281B2

公开(公告)日：2014-04-22

申请号：US12641237

申请日：2009-12-17

申请人： Rajen S. Sidhu ,  Ashay A. Dani ,  Mukul P. Renavikar

发明人： Rajen S. Sidhu ,  Ashay A. Dani ,  Mukul P. Renavikar

IPC分类号： H05K3/00 ,  H05K3/34 ,  H05K1/03 ,  H05K1/00 ,  H05K1/16 ,  H05K7/10

CPC分类号： H05K3/3489 ,  H05K3/3436

摘要： Surface-active dopants are added to a portion of a circuit package before a reflow process to promote wetting and reduce the formation of solder bump bridges. The circuit package has a solder element that electrically connects the circuit package to a substrate. A reflow process is performed to attach the solder element to a pad on the circuit package. During the reflow process, the surface-active dopants diffuse to the surface of the solder element and form an oxide passivation layer on the surface of the solder element.

摘要翻译： 在回流过程之前，将表面活性掺杂剂添加到电路封装的一部分中以促进润湿并减少焊料凸块桥的形成。 电路封装具有将电路封装电连接到衬底的焊料元件。 执行回流处理以将焊料元件附接到电路封装上的焊盘。 在回流过程中，表面活性掺杂剂扩散到焊料元件的表面，并在焊料元件的表面上形成氧化物钝化层。

公开(公告)号：US20140061902A1

公开(公告)日：2014-03-06

申请号：US13601788

申请日：2012-08-31

申请人： Suriyakala Ramalingam ,  Rajen S. Sidhu ,  Nisha Ananthakrishnan ,  Sivakumar Nagarajan ,  Wei Tan ,  Sandeep Razdan ,  Vipul V. Mehta

发明人： Suriyakala Ramalingam ,  Rajen S. Sidhu ,  Nisha Ananthakrishnan ,  Sivakumar Nagarajan ,  Wei Tan ,  Sandeep Razdan ,  Vipul V. Mehta

IPC分类号： H01L23/498 ,  H01L21/28 ,  H01L21/50 ,  H01L23/48

CPC分类号： H01L23/49816 ,  H01L21/563 ,  H01L23/49894 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2924/15311 ,  Y10T29/49146 ,  H01L2924/00012 ,  H01L2924/00

摘要： Embodiments of the present disclosure are directed towards techniques and configurations for surface treatment of an integrated circuit (IC) substrate. In one embodiment, an apparatus includes an integrated circuit substrate, an interconnect structure disposed on the integrated circuit substrate, the interconnect structure being configured to route electrical signals to or from the integrated circuit substrate and comprising a metal surface, and a protective layer disposed on the metal surface of the interconnect structure, the protective layer comprising a first functional group bonded with the metal surface and a second functional group bonded with the first functional group, wherein the second functional group is hydrophobic to inhibit contamination of the metal surface by hydrophilic materials and further inhibits oxidation of the metal surface. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例涉及用于集成电路（IC）衬底的表面处理的技术和配置。 在一个实施例中，一种装置包括集成电路基板，布置在集成电路基板上的互连结构，所述互连结构被配置为将电信号传送到集成电路基板或从集成电路基板引出并包括金属表面，以及保护层 所述互连结构的金属表面，所述保护层包含与所述金属表面接合的第一官能团和与所述第一官能团键合的第二官能团，其中所述第二官能团是疏水性的，以抑制由亲水材料污染所述金属表面 并进一步抑制金属表面的氧化。 可以描述和/或要求保护其他实施例。

公开(公告)号：US20110147066A1

公开(公告)日：2011-06-23

申请号：US12641237

申请日：2009-12-17

申请人： Rajen S. Sidhu ,  Ashay A. Dani ,  Mukul P. Renavikar

发明人： Rajen S. Sidhu ,  Ashay A. Dani ,  Mukul P. Renavikar

IPC分类号： H05K1/11 ,  H01R9/00

CPC分类号： H05K3/3489 ,  H05K3/3436

摘要： Surface-active dopants are added to a portion of a circuit package before a reflow process to promote wetting and reduce the formation of solder bump bridges. The circuit package has a solder element that electrically connects the circuit package to a substrate. A reflow process is performed to attach the solder element to a pad on the circuit package. During the reflow process, the surface-active dopants diffuse to the surface of the solder element and form an oxide passivation layer on the surface of the solder element.

摘要翻译： 在回流过程之前，将表面活性掺杂剂添加到电路封装的一部分中以促进润湿并减少焊料凸块桥的形成。 电路封装具有将电路封装电连接到衬底的焊料元件。 执行回流处理以将焊料元件附接到电路封装上的焊盘。 在回流过程中，表面活性掺杂剂扩散到焊料元件的表面，并在焊料元件的表面上形成氧化物钝化层。