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    Wearable device with power state control
    13.
    发明授权
    Wearable device with power state control 有权

    公开(公告)号：US10013025B2

    公开(公告)日：2018-07-03

    申请号：US14567581

    申请日：2014-12-11

    Applicant: INTEL CORPORATION

    Inventor： Nicholas P. Cowley ,  Ruchir Saraswat ,  Richard Goldman ,  Ryan Palmer

    IPC: G06F1/16 ,  G06F3/041 ,  G06F1/26 ,  G06F1/32 ,  H01L41/113 ,  H02N2/18

    CPC classification number: G06F1/163 ,  G06F1/1635 ,  G06F1/26 ,  G06F1/3206 ,  G06F1/3215 ,  G06F3/0414 ,  H01L41/113 ,  H02N2/181

    Abstract: Embodiments of the present disclosure provide techniques and configurations for a wearable device with power state control. In one instance, the device a functional module to operate in a first power state or in a second power state that is different from the first power state; a power source coupled with the functional module to provide operational power to the functional module; and a power state control module coupled with the functional module, to cause the functional module to transition from the first power state to the second power state in response to an input. The power state control module may comprise a power generating device to generate power responsive to the input, independent of the power source, and in response to the generated power, cause the functional module to transition from the first power state to the second power state. Other embodiments may be described and/or claimed.

    DEVICE AND METHOD FOR MONITORING CONSUMER DINING EXPERIENCE
    16.
    发明申请
    DEVICE AND METHOD FOR MONITORING CONSUMER DINING EXPERIENCE 审中-公开
    用于监测消费者餐饮经验的设备和方法

    公开(公告)号：US20160066724A1

    公开(公告)日：2016-03-10

    申请号：US14483023

    申请日：2014-09-10

    Applicant: Intel Corporation

    Inventor： Nicholas P. Cowley ,  Ruchir Saraswat ,  Richard J. Goldman ,  Chi Man Kan ,  Matthew T. Aitken ,  Colin L. Perry

    IPC: A47G21/06 ,  G01P15/00 ,  G01C19/00 ,  G01K13/00

    CPC classification number: G01K13/00 ,  A47G21/02 ,  A47G2021/008 ,  A47G2200/186 ,  G01C19/00 ,  G01K2207/08 ,  G06Q30/016 ,  G06Q50/12

    Abstract: Embodiments described herein relate generally to monitoring a dining session using smart smallwares. A smart smallware may sense usage or non-usage associated with a dining session of a customer. Based on the sensed non-usage of the smart smallware, the smart smallware may detect a period of inactivity. In response to the detected period of inactivity, the smart smallware may transmit an indication of the detected period of inactivity. This transmitted indication may cause an external monitoring device to notify a waitperson that a customer associated with that smart smallware may require attention. Other embodiments may be described and/or claimed.

    Abstract translation: 本文所描述的实施例一般涉及使用智能小物件监视餐饮会话。 智能小型餐具可以感知与客户的餐饮会话相关联的使用或不使用。 基于感知到的智能小型软件的不使用，智能小型软件可以检测不活动的时间段。 响应于检测到的不活动时段，智能小型餐具可以发送检测到的不活动时段的指示。 该发送的指示可能导致外部监视设备通知等待人员，与该智能小型餐具相关联的客户可能需要注意。 可以描述和/或要求保护其他实施例。

    Methods and systems to stress-program an integrated circuit
    18.
    发明授权
    Methods and systems to stress-program an integrated circuit 有权
    压力编程集成电路的方法和系统

    公开(公告)号：US09018975B2

    公开(公告)日：2015-04-28

    申请号：US13768411

    申请日：2013-02-15

    Applicant: Intel Corporation

    Inventor： Nicholas P. Cowley ,  Ramnarayanan Muthukaruppan

    IPC: H03K19/173 ,  G11C17/18

    CPC classification number: H03K19/173 ,  G11C17/18

    Abstract: Methods and systems to stress-program a first integrated circuit (IC) block to output a pre-determined value upon activation/reset, such as to support time-zero compensation/trimming. To program, the first block is configured with first-block program parameters to cause the first block to output a pre-determined value. The first block is stressed while configured with the first-block program parameters, to cause the first block to output the pre-determined value without the first-block program parameters. The first block may include a latch designed as a fully balance circuit and may be asymmetrically stressed to alter a characteristic of one path relative to another. The pre-determined value may be selected to compensate for process corner variations and/or other random variations.

    Abstract translation: 压缩程序化第一集成电路（IC）块以在激活/复位时输出预定值的方法和系统，例如支持时间零补偿/修整。 为了编程，第一块被配置有第一块程序参数，以使第一块输出预定值。 第一个程序段被配置了第一个程序段的第一个程序参数，使第一个程序段输出预定义的值，而没有第一个程序参数。 第一块可以包括被设计为完全平衡电路的闩锁，并且可以是不对称应力以改变相对于另一路径的一个路径的特性。 可以选择预定值以补偿过程角变化和/或其他随机变化。

    SYSTEM FOR ANALOG TO DIGITAL CONVERSION WITH IMPROVED SPURIOUS FREE DYNAMIC RANGE
    19.
    发明申请
    SYSTEM FOR ANALOG TO DIGITAL CONVERSION WITH IMPROVED SPURIOUS FREE DYNAMIC RANGE 有权
    用于模拟数字转换的系统，具有改进的免费动态范围

    公开(公告)号：US20140349714A1

    公开(公告)日：2014-11-27

    申请号：US13995211

    申请日：2012-05-01

    Applicant: INTEL CORPORATION

    Inventor： Nicholas P. Cowley ,  Isaac Ali ,  William L. Barber

    IPC: H03M1/12 ,  H03B28/00 ,  H03H7/01

    CPC classification number: H03M1/124 ,  H03B28/00 ,  H03H7/01 ,  H03M1/0626 ,  H03M1/1215

    Abstract: Generally, this disclosure describes an apparatus, systems and methods for analog to digital conversion with improved spurious free dynamic range. The system includes a segmented ADC circuit with a plurality of interleaved ADC segments, the segmented ADC circuit configured to generate a digital signal including a channel with an associated channel frequency; a frequency down-converter circuit coupled to the segmented ADC circuit, the frequency down-converter circuit configured to frequency shift the digital signal by a frequency offset; a spur frequency prediction circuit coupled to the frequency down-converter circuit, the spur frequency prediction circuit configured to predict frequencies of spurs generated by the ADC segments, the prediction based on the number of ADC segments and based on the sampling rate of the digital signal; the spur frequency prediction circuit further configured to generate the frequency offset based on the predicted spur frequencies and based on a frequency band of the channel; and a filter circuit coupled to the frequency down-converter circuit, the filter circuit configured to remove one or more of the spurs from the frequency shifted digital signal to generate a filtered signal.

    Abstract translation: 通常，本公开描述了具有改进的无杂散动态范围的用于模数转换的装置，系统和方法。 该系统包括具有多个交错ADC段的分段ADC电路，分段ADC电路被配置为生成包括具有相关信道频率的信道的数字信号; 所述降频转换器电路被耦合到所述分段ADC电路，所述降频转换器电路被配置为使所述数字信号频率偏移频率偏移; 耦合到所述降频转换器电路的杂散频率预测电路，所述杂散频率预测电路被配置为预测由所述ADC段产生的杂散的频率，所述预测基于所述ADC段的数量，并且基于所述数字信号的采样率 ; 所述杂音频率预测电路还被配置为基于所述预测的杂散频率并且基于所述信道的频带来生成所述频率偏移; 以及耦合到所述降频转换器电路的滤波器电路，所述滤波器电路被配置为从所述频移数字信号中去除所述杂波中的一个或多个以产生经滤波的信号。

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