公开(公告)号：US20220214728A1

公开(公告)日：2022-07-07

申请号：US17142658

申请日：2021-01-06

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Eric MARZ ,  Kirk D. PETERSON ,  Greg ABRAMI ,  Howard V. MAHANEY, Jr. ,  William James ANDERL ,  Eric Jason FLUHR ,  Todd Jon ROSEDAHL

IPC: G06F1/20 ,  G05B17/02

Abstract: Thermal control of a multi-chip module in an operating environment is facilitated by predetermining separate thermal control points for multiple chips of the multi-chip module, with a first chip and a second chip having different predetermined thermal control points, and saving the predetermined thermal control points for reference by a thermal control of the multi-chip module in an operating environment. The thermal control monitors an operating temperature of the first chip, and compares the operating temperature of the first chip to the predetermined thermal control point of that chip. The thermal control further initiates a control action to control temperature of the first chip based on comparing the operating temperature of the first chip to the predetermined thermal control point of the first chip.

公开(公告)号：US20160379877A1

公开(公告)日：2016-12-29

申请号：US15260679

申请日：2016-09-09

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Lawrence A. CLEVENGER ,  Baozhen LI ,  Kirk D. PETERSON

IPC: H01L21/768 ,  H01L21/66 ,  G06F17/50 ,  H01L23/532

CPC classification number: H01L23/528 ,  G06F17/5031 ,  G06F17/5068 ,  G06F17/5072 ,  G06F17/5077 ,  G06F17/5081 ,  G06F2217/82 ,  H01L21/0217 ,  H01L21/28556 ,  H01L21/2885 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76847 ,  H01L21/7685 ,  H01L21/76858 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76886 ,  H01L21/76897 ,  H01L22/20 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53228 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Optimized metal wires for resistance or electromigration, methods of manufacturing thereof and design methodologies are disclosed. The method includes depositing metal material within openings and on a surface of dielectric material resulting in metal filled openings and a topography of recessed areas aligned with the metal filled openings. The method further includes depositing an alloying material over the metal material, including within the recessed areas. The method further includes planarizing the metal material, leaving the alloying material within the recessed areas. The method further includes diffusing the alloying material into the metal material forming alloyed regions self-aligned with the metal filled openings.

公开(公告)号：US20160163651A1

公开(公告)日：2016-06-09

申请号：US14561514

申请日：2014-12-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Lawrence A. CLEVENGER ,  Baozhen LI ,  Kirk D. PETERSON

IPC: H01L23/532 ,  H01L23/528 ,  H01L21/321 ,  H01L21/768 ,  H01L21/288 ,  H01L21/02 ,  G06F17/50 ,  H01L23/522

CPC classification number: H01L23/528 ,  G06F17/5031 ,  G06F17/5068 ,  G06F17/5072 ,  G06F17/5077 ,  G06F17/5081 ,  G06F2217/82 ,  H01L21/0217 ,  H01L21/28556 ,  H01L21/2885 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76847 ,  H01L21/7685 ,  H01L21/76858 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76886 ,  H01L21/76897 ,  H01L22/20 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53228 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Optimized metal wires for resistance or electromigration, methods of manufacturing thereof and design methodologies are disclosed. The method includes depositing metal material within openings and on a surface of dielectric material resulting in metal filled openings and a topography of recessed areas aligned with the metal filled openings. The method further includes depositing an alloying material over the metal material, including within the recessed areas. The method further includes planarizing the metal material, leaving the alloying material within the recessed areas. The method further includes diffusing the alloying material into the metal material forming alloyed regions self-aligned with the metal filled openings.

Abstract translation: 公开了用于电阻或电迁移的优化金属线，其制造方法和设计方法。 该方法包括在开口内和电介质材料的表面上沉积金属材料，导致金属填充的开口和与金属填充的开口对准的凹陷区域的形貌。 该方法还包括在金属材料上沉积合金材料，包括在凹陷区域内。 该方法还包括使金属材料平坦化，将合金材料留在凹陷区域内。 该方法还包括将合金材料扩散到形成与金属填充开口自对准的合金化区域的金属材料中。

公开(公告)号：US20150192735A1

公开(公告)日：2015-07-09

申请号：US14151138

申请日：2014-01-09

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John J. ELLIS-MONAGHAN ,  Jeffrey P. GAMBINO ,  Mark D. JAFFE ,  Kirk D. PETERSON ,  Jed H. RANKIN

IPC: G02B6/122 ,  G02B6/132 ,  G02B6/136 ,  G02B1/04

CPC classification number: G02B6/122 ,  G02B1/045 ,  G02B6/125 ,  G02B6/132 ,  G02B6/136 ,  G02B2006/12097 ,  G02B2006/121 ,  G02B2006/12104 ,  G02B2006/12126

Abstract: Methods and structures for shielding optical waveguides are provided. A method includes forming a first optical waveguide core and forming a second optical waveguide core adjacent to the first optical waveguide core. The method also includes forming an insulator layer over the first optical waveguide core and the second optical waveguide core. The method further includes forming a shielding structure in the insulator layer between the first optical waveguide core and the second optical waveguide core.

Abstract translation: 提供了屏蔽光波导的方法和结构。 一种方法包括形成第一光波导芯并形成与第一光波导芯相邻的第二光波导芯。 该方法还包括在第一光波导芯和第二光波导芯上形成绝缘体层。 该方法还包括在第一光波导芯和第二光波导芯之间的绝缘体层中形成屏蔽结构。

公开(公告)号：US20210319845A1

公开(公告)日：2021-10-14

申请号：US16845259

申请日：2020-04-10

Applicant: International Business Machines Corporation

Inventor： Timothy MEEHAN ,  Kirk D. PETERSON ,  John B. DEFORGE ,  William V. HUOTT ,  Uma SRINIVASAN ,  Hyong Uk KIM ,  Michelle E. Finnefrock ,  Daniel RODKO

IPC: G11C29/00

Abstract: A system may include an integrated circuit having repair select bits coupled with a central repair register. The repair register may be configured to determine how to broadcast multiple repair actions to a group of repairable circuits. Inclusion of the repair register may function to reduce the total number of latches used to hold repair information.

公开(公告)号：US20180254374A1

公开(公告)日：2018-09-06

申请号：US15971240

申请日：2018-05-04

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John J. ELLIS-MONAGHAN ,  Jeffrey P. GAMBINO ,  Mark D. JAFFE ,  Kirk D. PETERSON

IPC: H01L31/18 ,  G02B6/12 ,  H01L31/028 ,  H01L31/0232 ,  H01L31/103

Abstract: Photodiode structures and methods of manufacture are disclosed. The method includes forming a waveguide structure in a dielectric layer. The method further includes forming a Ge material in proximity to the waveguide structure in a back end of the line (BEOL) metal layer. The method further includes crystallizing the Ge material into a crystalline Ge structure by a low temperature annealing process with a metal layer in contact with the Ge material.

公开(公告)号：US20180076351A1

公开(公告)日：2018-03-15

申请号：US15807054

申请日：2017-11-08

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John J. ELLIS-MONAGHAN ,  Jeffrey P. GAMBINO ,  Mark D. JAFFE ,  Kirk D. PETERSON

IPC: H01L31/18 ,  G02B6/12 ,  H01L31/028 ,  H01L31/0232 ,  H01L31/103

Abstract: Photodiode structures and methods of manufacture are disclosed. The method includes forming a waveguide structure in a dielectric layer. The method further includes forming a Ge material in proximity to the waveguide structure in a back end of the line (BEOL) metal layer. The method further includes crystallizing the Ge material into a crystalline Ge structure by a low temperature annealing process with a metal layer in contact with the Ge material.

公开(公告)号：US20170125626A1

公开(公告)日：2017-05-04

申请号：US15408004

申请日：2017-01-17

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John J. ELLIS-MONAGHAN ,  Jeffrey P. GAMBINO ,  Mark D. JAFFE ,  Kirk D. PETERSON

IPC: H01L31/18 ,  G02B6/12 ,  H01L31/103 ,  H01L31/0232 ,  H01L31/028

CPC classification number: H01L31/1808 ,  G02B6/12 ,  G02B6/12004 ,  H01L31/02005 ,  H01L31/02327 ,  H01L31/028 ,  H01L31/103 ,  H01L31/1864 ,  H01L31/1872 ,  H01L2223/6627 ,  H01P1/172 ,  H01P3/16 ,  H05K999/99 ,  Y02E10/50

Abstract: Photodiode structures and methods of manufacture are disclosed. The method includes forming a waveguide structure in a dielectric layer. The method further includes forming a Ge material in proximity to the waveguide structure in a back end of the line (BEOL) metal layer. The method further includes crystallizing the Ge material into a crystalline Ge structure by a low temperature annealing process with a metal layer in contact with the Ge material.

公开(公告)号：US20170031415A1

公开(公告)日：2017-02-02

申请号：US14814870

申请日：2015-07-31

Applicant: International Business Machines Corporation

Inventor： Malcolm S. ALLEN-WARE ,  Michael S. FLOYD ,  Joshua D. FRIEDRICH ,  Charles R. LEFURGY ,  Kirk D. PETERSON ,  Karthick RAJAMANI ,  Srinivasan RAMANI ,  Todd J. ROSEDAHL ,  Gregory S. STILL ,  Brian W. THOMPTO ,  Victor ZYUBAN

IPC: G06F1/32

CPC classification number: G06F1/324 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3243 ,  Y02D10/126 ,  Y02D10/152

Abstract: A system for adjusting a frequency of a processor is disclosed herein. The system includes a processor and a memory, where the memory includes a program configured to adjust a frequency of a multi-core processor. The operations include determining a total current and a temperature of the multi-core processor and estimating a leakage current for the multi-core processor. The operations also include calculating a switching current by subtracting the leakage current from the total current and calculating an effective switching capacitance based at least in part on the switching current. The operations also include calculating a workload activity factor by dividing the effective switching capacitance by a predetermined effective switching capacitance stored in vital product data, and enforcing a turbo frequency limit of the multi-core processor based on the workload activity factor.

Abstract translation: 本文公开了一种用于调整处理器频率的系统。 该系统包括处理器和存储器，其中存储器包括被配置为调整多核处理器的频率的程序。 这些操作包括确定多核处理器的总电流和温度，并估计多核处理器的漏电流。 该操作还包括通过从总电流中减去泄漏电流并至少部分地基于开关电流来计算有效开关电容来计算开关电流。 这些操作还包括通过将有效开关电容除以存储在重要产品数据中的预定有效开关电容来计算工作负载活动因子，以及基于工作负载活动因素来执行多核处理器的turbo频率限制。

公开(公告)号：US20160379927A1

公开(公告)日：2016-12-29

申请号：US15260675

申请日：2016-09-09

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Lawrence A. CLEVENGER ,  Baozhen LI ,  Kirk D. PETERSON

IPC: H01L23/528 ,  H01L23/532 ,  G06F17/50 ,  H01L21/321 ,  H01L21/311 ,  H01L21/285 ,  H01L21/288 ,  H01L23/522 ,  H01L21/768

CPC classification number: H01L23/528 ,  G06F17/5031 ,  G06F17/5068 ,  G06F17/5072 ,  G06F17/5077 ,  G06F17/5081 ,  G06F2217/82 ,  H01L21/0217 ,  H01L21/28556 ,  H01L21/2885 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76847 ,  H01L21/7685 ,  H01L21/76858 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76886 ,  H01L21/76897 ,  H01L22/20 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53228 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Optimized metal wires for resistance or electromigration, methods of manufacturing thereof and design methodologies are disclosed. The method includes depositing metal material within openings and on a surface of dielectric material resulting in metal filled openings and a topography of recessed areas aligned with the metal filled openings. The method further includes depositing an alloying material over the metal material, including within the recessed areas. The method further includes planarizing the metal material, leaving the alloying material within the recessed areas. The method further includes diffusing the alloying material into the metal material forming alloyed regions self-aligned with the metal filled openings.