公开(公告)号：US20130057195A1

公开(公告)日：2013-03-07

申请号：US13597663

申请日：2012-08-29

申请人： Jung Ik HA ,  Sung Min KIM ,  Seung Ki SUL ,  Yong Su HAN

发明人： Jung Ik HA ,  Sung Min KIM ,  Seung Ki SUL ,  Yong Su HAN

IPC分类号： H02K11/00 ,  H02P23/00

CPC分类号： H02P25/26 ,  H02P27/05

摘要： A single external power supply variable speed induction motor and a control method thereof are disclosed. An induction motor includes: a stator in which coils directly connected to a single-phase or 3-phase or more systematic power supply are wound; a rotor that is supported to be rotatable in the stator; a power conversion device that is attached to the rotor and controls a rotor current without connection of a separate external power supply; and a control circuit that is connected to the power conversion device and controls the power conversion device.

摘要翻译： 公开了一种外部电源变速感应电动机及其控制方法。 感应电动机包括：缠绕直接连接到单相或三相或更系统的电源的线圈的定子; 支承在所述定子中可旋转的转子; 功率转换装置，其连接到转子并控制转子电流，而不连接单独的外部电源; 以及连接到电力转换装置并控制电力转换装置的控制电路。

公开(公告)号：US20100091731A1

公开(公告)日：2010-04-15

申请号：US12578234

申请日：2009-10-13

申请人： Sung Min KIM ,  Chul Jin Kim ,  Eun Hwa Lee ,  Jung Hyeon Kim ,  Ji Hye Hur

发明人： Sung Min KIM ,  Chul Jin Kim ,  Eun Hwa Lee ,  Jung Hyeon Kim ,  Ji Hye Hur

IPC分类号： H04W72/04

CPC分类号： H04W16/14 ,  H04W24/00 ,  H04W84/12 ,  H04W88/10

摘要： A channel allocation method for use in a wireless communication environment, where Wireless Local Area Networks (WLANs) and Wireless Personal Area Networks (WPANs) coexist, includes collecting, at an access point, information on channels used by the WLANs and WPANs, determining available WLAN channels and available WPAN channels based on the channel information, allocating one of the available WLAN channels and one of the available WPAN channels to the access point, and informing the WLANs and WPANs of the allocated WLAN and WPAN channels.

摘要翻译： 一种在无线局域网（WLAN）和无线个人区域网络（WPAN）共存的无线通信环境中使用的信道分配方法包括在接入点收集关于WLAN和WPAN使用的信道的信息，确定可用 WLAN信道和可用的WPAN信道，将可用WLAN信道之一和可用WPAN信道中的一个分配给接入点，并向WLAN和WPAN通知所分配的WLAN和WPAN信道。

公开(公告)号：US20090197372A1

公开(公告)日：2009-08-06

申请号：US12345858

申请日：2008-12-30

申请人： Kwon Whan HAN ,  Chang Jun PARK ,  Seong Cheol KIM ,  Sung Min KIM ,  Hyeong Seok CHOI ,  Ha Na LEE

发明人： Kwon Whan HAN ,  Chang Jun PARK ,  Seong Cheol KIM ,  Sung Min KIM ,  Hyeong Seok CHOI ,  Ha Na LEE

IPC分类号： H01L21/00

CPC分类号： H01L24/16 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/11 ,  H01L24/17 ,  H01L24/90 ,  H01L24/97 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/05001 ,  H01L2224/05548 ,  H01L2224/13009 ,  H01L2224/13099 ,  H01L2224/90 ,  H01L2224/9202 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014

摘要： Manufacturing a wafer level stack package includes the steps of back-grinding a lower surface of a wafer including a plurality of first semiconductor chips. A support member is attached to a lower surface of the back-grinded wafer. One or more second semiconductor chips are stacked on the respective first semiconductor chips of the back-grinded wafer. First through-electrodes are formed to electrically connect the stacked first semiconductor chips and second semiconductor chips. Third semiconductor chips are attached to uppermost ones of the stacked second semiconductor chips, and the third semiconductor chips have second through-electrodes which are electrically connected to the first through-electrodes and re-distribution lines which are connected to the second through-electrodes. Outside connection terminals are attached to the re-distribution lines of the third semiconductor chips. The first semiconductor chips of a wafer level on which the second and third semiconductor chips are stacked are sawed to for semiconductor packages at a chip level.

摘要翻译： 制造晶片级堆叠封装包括对包括多个第一半导体芯片的晶片的下表面进行背面磨削的步骤。 支撑构件附接到后磨碎晶片的下表面。 一个或多个第二半导体芯片堆叠在背面研磨的晶片的相应的第一半导体芯片上。 形成第一贯通电极以电连接堆叠的第一半导体芯片和第二半导体芯片。 第三半导体芯片附着到堆叠的第二半导体芯片的最上面，第三半导体芯片具有与连接到第二贯通电极的第一贯通电极和再分配线电连接的第二贯通电极。 外部连接端子附接到第三半导体芯片的再分配线路。 第二半导体芯片和第三半导体芯片堆叠的晶片级的第一半导体芯片在芯片级被锯切以用于半导体封装。

公开(公告)号：US20090184414A1

公开(公告)日：2009-07-23

申请号：US12347020

申请日：2008-12-31

申请人： Chang Jun PARK ,  Kwon Whan HAN ,  Seong Cheol KIM ,  Sung Min KIM ,  Hyeong Seok CHOI ,  Ha Na LEE ,  Tac Keun OH ,  Sang Joon LIM

发明人： Chang Jun PARK ,  Kwon Whan HAN ,  Seong Cheol KIM ,  Sung Min KIM ,  Hyeong Seok CHOI ,  Ha Na LEE ,  Tac Keun OH ,  Sang Joon LIM

IPC分类号： H01L23/04 ,  H01L23/12 ,  H01L21/00 ,  H01L23/482 ,  H01L21/98

CPC分类号： H01L21/486 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/367 ,  H01L23/552 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/94 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/3025 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00

摘要： A wafer level chip scale package having an enhanced heat exchange efficiency with an EMF shield is presented. The wafer level chip scale package includes a semiconductor chip, an insulation layer, and a metal plate. The semiconductor chip has a plurality of bonding pads on an upper face thereof. The insulation layer is disposed over the upper face of the semiconductor chip and has openings that expose some portions of the bonding pads. The metal plate covers an upper face of the insulation layer and side faces of the semiconductor chip in which the metal plate is electrically insulated from the bonding pads.

摘要翻译： 提出了具有增强的EMF屏蔽的热交换效率的晶片级芯片级封装。 晶片级芯片级封装包括半导体芯片，绝缘层和金属板。 半导体芯片在其上表面上具有多个接合焊盘。 绝缘层设置在半导体芯片的上表面上，并且具有暴露接合焊盘的一些部分的开口。 金属板覆盖绝缘层的上表面和半导体芯片的侧面，其中金属板与接合焊盘电绝缘。

公开(公告)号：US20160260669A1

公开(公告)日：2016-09-08

申请号：US14989646

申请日：2016-01-06

申请人： Sun Hom PAAK ,  Sung Min KIM

发明人： Sun Hom PAAK ,  Sung Min KIM

IPC分类号： H01L23/535 ,  H01L29/08 ,  H01L29/161 ,  H01L23/528 ,  H01L29/165 ,  H01L29/78 ,  H01L27/092 ,  H01L29/06 ,  H01L29/16

CPC分类号： H01L29/7845 ,  H01L23/485 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/41791

摘要： A semiconductor device includes an active fin extending in a first direction on a substrate, a gate electrode intersecting the active fin and extending in a second direction, source/drain regions disposed on the active fin on both sides of the gate electrode, and a contact plug disposed on the source/drain regions. The contact plug has at least one side extending in the second direction which has a step portion having a step shape.

摘要翻译： 半导体器件包括：在基板上沿第一方向延伸的有源鳍片，与有源鳍片交叉并且沿第二方向延伸的栅电极，设置在栅电极两侧的有源鳍片上的源极/漏极区域，以及触点 插头设置在源极/漏极区域上。 接触插塞具有沿第二方向延伸的至少一个侧面，该侧面具有台阶形状。

公开(公告)号：US20140186607A1

公开(公告)日：2014-07-03

申请号：US14148886

申请日：2014-01-07

申请人： Kyoung Tae WI ,  Jae Won CHOI ,  Sung Min KIM ,  Jin Man KIM ,  Hye Jin KIM ,  Jun Woo LEE

发明人： Kyoung Tae WI ,  Jae Won CHOI ,  Sung Min KIM ,  Jin Man KIM ,  Hye Jin KIM ,  Jun Woo LEE

IPC分类号： C09J163/00

CPC分类号： C09J163/00 ,  C08G59/3209 ,  C08G59/50 ,  C08G59/621 ,  C08G59/688 ,  Y10T428/31515

摘要： An adhesive film, an adhesive composition, and a semiconductor device wherein, in the adhesive film, a difference between a storage modulus (A) of the adhesive film after 4 cycles and a storage modulus (B) of the adhesive film after 1 cycle is about 3×106 dyne/cm2 or less, the storage modulus (A) of the adhesive film after 4 cycles is about 7×106 dyne/cm2 or less, and the storage modulus (B) of the adhesive film after 1 cycle is about 2×106 dyne/cm2 or more, when curing at 125° C. for 1 hour and then at 150° C. for 10 minutes is defined as 1 cycle.

摘要翻译： 粘合剂膜，粘合剂组合物和半导体器件，其中在粘合剂膜中，4个循环之后的粘合剂膜的储能模量（A）与1个循环后的粘合剂膜的储能模量（B）之间的差为 约3×10 6达因/ cm 2以下，4次循环后的粘合膜的储能模量（A）约为7×10 6达因/ cm 2以下，1次循环后的粘合膜的储能模量（B）约为 2×10 6达因/ cm 2以上，当在125℃下固化1小时，然后在150℃下固化10分钟时，定义为1个循环。

公开(公告)号：US20130099359A1

公开(公告)日：2013-04-25

申请号：US13565396

申请日：2012-08-02

申请人： Sung Min KIM

发明人： Sung Min KIM

IPC分类号： H01L23/488 ,  H01L25/07

CPC分类号： H01L25/0657 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/116 ,  H01L2224/1161 ,  H01L2224/11825 ,  H01L2224/119 ,  H01L2224/11912 ,  H01L2224/13017 ,  H01L2224/13021 ,  H01L2224/13025 ,  H01L2224/13186 ,  H01L2224/1319 ,  H01L2224/13566 ,  H01L2224/13583 ,  H01L2224/136 ,  H01L2224/13647 ,  H01L2224/14181 ,  H01L2224/1601 ,  H01L2224/16058 ,  H01L2224/16147 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/3841 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/114 ,  H01L2224/1182

摘要： A semiconductor package includes a semiconductor chip having a plurality of bonding pads, dielectric members formed over the semiconductor chip in such a way as to expose portions of respective bonding pads and having a trapezoidal sectional shape, and bumps formed to cover the exposed portions of the respective bonding pads and portions of the dielectric members and having a step-like sectional shape.

摘要翻译： 半导体封装包括具有多个接合焊盘的半导体芯片，以半导体芯片形成的电介质构件，以暴露各个焊盘的部分并具有梯形截面形状，并且形成为覆盖露出部分的凸块 各个接合焊盘和电介质部件的一部分，并具有阶梯状截面形状。

公开(公告)号：US20120185381A1

公开(公告)日：2012-07-19

申请号：US13228959

申请日：2011-09-09

申请人： Sung Min KIM

发明人： Sung Min KIM

IPC分类号： G06Q40/00 ,  H04W64/00

CPC分类号： G06Q20/10 ,  H04M17/10 ,  H04M2017/14 ,  H04W4/029 ,  H04W4/14

摘要： In an apparatus and a method for generating mobile consumption patterns, the apparatus includes: an information processing unit and storage unit that processes card use information from a server and stores the card use information including GPS information; an application unit to process the card use information and a sharing unit to share the stored card use information with another user via a network, or a display unit to display augmented reality based on the card use information and GPS information.

摘要翻译： 在一种用于产生移动消费模式的装置和方法中，该装置包括：信息处理单元和存储单元，其处理来自服务器的卡使用信息并存储包含GPS信息的卡使用信息; 用于处理卡使用信息的应用单元和共享单元，经由网络与另一用户共享存储的卡使用信息，或者显示单元，以基于卡使用信息和GPS信息显示增强现实。

公开(公告)号：US20120013016A1

公开(公告)日：2012-01-19

申请号：US13241455

申请日：2011-09-23

申请人： Tac Keun OH ,  Sung Min KIM

发明人： Tac Keun OH ,  Sung Min KIM

IPC分类号： H01L23/535 ,  B23K31/00 ,  B23K37/04

CPC分类号： H01L24/85 ,  B23K20/005 ,  B23K2101/40 ,  H01L21/67138 ,  H01L23/5389 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L2224/05554 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48092 ,  H01L2224/48095 ,  H01L2224/48135 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/78822 ,  H01L2224/8517 ,  H01L2224/85181 ,  H01L2224/85186 ,  H01L2224/859 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A flexible semiconductor package apparatus having a responsive bendable conductive wire member is presented. The apparatus includes a flexible substrate, semiconductor chips, and conductive wires. The semiconductor chips are disposed on the flexible substrate and spaced apart from each other on the flexible substrate. Each semiconductor chip has bonding pads. The conductive wires are electrically connected to the bonding pads of the semiconductor chip. Each conductive wire has at least one elastic portion. One preferred configuration is that part of the conductive wire is wound to form a coil spring shape so that the coil spring shape of the conductive wire aid in preventing the conductive wire from being separated from the corresponding bonding pad of the semiconductor chip when the flexible substrate on which the semiconductor chips are mounted are bent, expanded or twisted.

摘要翻译： 提出了一种具有响应可弯曲的导线构件的柔性半导体封装装置。 该装置包括柔性基板，半导体芯片和导线。 半导体芯片设置在柔性基板上并且在柔性基板上彼此间隔开。 每个半导体芯片具有接合焊盘。 导电线电连接到半导体芯片的接合焊盘。 每个导线具有至少一个弹性部分。 一个优选的构造是，导线的一部分被卷绕以形成螺旋弹簧形状，使得导线的螺旋弹簧形状有助于防止导线与半导体芯片的相应焊盘分离，当柔性基板 其上安装半导体芯片被弯曲，膨胀或扭曲。

公开(公告)号：US20110309509A1

公开(公告)日：2011-12-22

申请号：US12981207

申请日：2010-12-29

申请人： Sung Min KIM

发明人： Sung Min KIM

IPC分类号： H01L25/07 ,  H01L21/283 ,  H01L23/52

CPC分类号： H01L25/0657 ,  H01L21/76898 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor chip includes a substrate with a barrier region and a conductive diffusion region formed in the substrate and is surrounded by the barrier region. The conductive diffusion region may provide a conductive oath from top of the substrate to bottom of the substrate.

摘要翻译： 半导体芯片包括具有阻挡区域的基板和形成在基板中并被阻挡区域包围的导电扩散区域。 导电扩散区域可以从衬底的顶部到衬底的底部提供导电的誓言。