公开(公告)号：US06413583B1

公开(公告)日：2002-07-02

申请号：US09338470

申请日：1999-06-22

申请人： Farhad K. Moghadam ,  David W. Cheung ,  Ellie Yieh ,  Li-Qun Xia ,  Wai-Fan Yau ,  Chi-I Lang ,  Shin-Puu Jeng ,  Frederic Gaillard ,  Shankar Venkataraman ,  Srinivas Nemani

发明人： Farhad K. Moghadam ,  David W. Cheung ,  Ellie Yieh ,  Li-Qun Xia ,  Wai-Fan Yau ,  Chi-I Lang ,  Shin-Puu Jeng ,  Frederic Gaillard ,  Shankar Venkataraman ,  Srinivas Nemani

IPC分类号： C23C1640

CPC分类号： H01L21/02126 ,  C23C16/401 ,  H01L21/02203 ,  H01L21/02208 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/31053 ,  H01L21/3122 ,  H01L21/31604 ,  H01L21/31612 ,  H01L21/76828 ,  H01L21/76834

摘要： A method for depositing silicon oxide layers having a low dielectric constant by reaction of an organosilicon compound and a hydroxyl forming compound at a substrate temperature less than about 400° C. The low dielectric constant films contain residual carbon and are useful for gap fill layers, pre-metal dielectric layers, inter-metal dielectric layers, and shallow trench isolation dielectric layers in sub-micron devices. The hydroxyl compound can be prepared prior to deposition from water or an organic compound. The silicon oxide layers are preferably deposited at a substrate temperature less than about 40° C. onto a liner layer produced from the organosilicon compound to provide gap fill layers having a dielectric constant less than about 3.0.

摘要翻译： 一种通过在低于约400℃的衬底温度下通过有机硅化合物和羟基形成化合物的反应沉积低介电常数的氧化硅层的方法。低介电常数膜含有残余碳并可用于间隙填充层， 预金属介电层，金属间介电层和亚微米器件中的浅沟槽隔离电介质层。 羟基化合物可以在从水或有机化合物沉积之前制备。 氧化硅层优选在低于约40℃的衬底温度下沉积到由有机硅化合物制备的衬里层上，以提供介电常数小于约3.0的间隙填充层。

公开(公告)号：US06348099B1

公开(公告)日：2002-02-19

申请号：US09334437

申请日：1999-06-16

申请人： Li-Qun Xia ,  Ellie Yieh ,  Srinivas Nemani

发明人： Li-Qun Xia ,  Ellie Yieh ,  Srinivas Nemani

IPC分类号： C23C1600

CPC分类号： H01L21/31625 ,  C23C16/401 ,  H01L21/02129 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/02301 ,  H01L21/02312 ,  H01L21/02315 ,  H01L21/0234 ,  H01L21/02362

摘要： The present invention provides systems, methods and apparatus for high temperature (at least about 500-800° C.) processing of semiconductor wafers. The systems, methods and apparatus of the present invention allow multiple process steps to be performed in situ in the same chamber to reduce total processing time and to ensure high quality processing for high aspect ratio devices. Performing multiple process steps in the same chamber also increases the control of the process parameters and reduces device damage. In particular, the present invention can provide high temperature deposition, heating and efficient cleaning for forming dielectric films having thickness uniformity, good gap fill capability, high density, low moisture, and other desired characteristics.

摘要翻译： 本发明提供用于半导体晶片的高温（至少约500-800℃）处理的系统，方法和装置。 本发明的系统，方法和装置允许多个工艺步骤在相同的腔室中原位进行，以减少总处理时间，并确保对高宽比装置的高质量处理。 在同一个室内执行多个工艺步骤也可以增加工艺参数的控制并减少设备损坏。 特别地，本发明可以提供用于形成具有厚度均匀性，良好间隙填充能力，高密度，低湿度和其它所需特性的介电膜的高温沉积，加热和有效清洁。

公开(公告)号：US5812403A

公开(公告)日：1998-09-22

申请号：US748095

申请日：1996-11-13

申请人： Gary Fong ,  Li-Qun Xia ,  Srinivas Nemani ,  Ellie Yieh

发明人： Gary Fong ,  Li-Qun Xia ,  Srinivas Nemani ,  Ellie Yieh

IPC分类号： B08B7/00 ,  C23C16/44 ,  C23C16/455 ,  C23C16/511 ,  H01L21/302 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/31 ,  G06F19/00

CPC分类号： C23C16/45512 ,  B08B7/0035 ,  C23C16/4404 ,  C23C16/4405

摘要： The present invention provides a method for cleaning a processing chamber. According to a specific embodiment, the method includes steps of depositing a dielectric film on a wafer on a ceramic heater in the processing chamber in a first time period, with the ceramic heater heated to a first temperature of at least about 500.degree. C. during the deposition step; and introducing reactive species into the processing chamber from a clean gas that is input to a remote microwave plasma system during a second time period, with the ceramic heater heated to a second temperature of at least about 500.degree. C. during the introducing step. The method also includes cleaning surfaces in the processing chamber, with cleaning performed by the reactive species. In particular, the present invention can provide high temperature deposition, heating and efficient cleaning for forming dielectric films having thickness uniformity, good gap fill capability, high density, low moisture, and other desired characteristics.

摘要翻译： 本发明提供了一种清洁处理室的方法。 根据具体实施方式，该方法包括以下步骤：在第一时间段内在处理室中的陶瓷加热器上的晶片上沉积电介质膜，陶瓷加热器在第一温度下加热至少约500℃ 沉积步骤; 以及在第二时间段内从被输入到远程微波等离子体系统的清洁气体将反应物质引入到处理室中，在引入步骤期间陶瓷加热器加热至至少约500℃的第二温度。 该方法还包括清洁处理室中的表面，并进行由反应物质进行的清洁。 特别地，本发明可以提供用于形成具有厚度均匀性，良好间隙填充能力，高密度，低湿度和其它所需特性的介电膜的高温沉积，加热和有效清洁。

公开(公告)号：US20170069488A1

公开(公告)日：2017-03-09

申请号：US15356475

申请日：2016-11-18

申请人： Ellie Yieh ,  Ludovic Godet ,  Srinivas Nemani ,  Er-Xuan Ping ,  Gary Dickerson

发明人： Ellie Yieh ,  Ludovic Godet ,  Srinivas Nemani ,  Er-Xuan Ping ,  Gary Dickerson

IPC分类号： H01L21/02 ,  H01L21/285 ,  H01L21/3213 ,  C23C14/02 ,  C23C16/455 ,  C23C16/02 ,  C23C16/04 ,  H01J37/32 ,  C23C16/50 ,  H01L21/311 ,  C23C14/04

CPC分类号： H01L21/02271 ,  C23C14/021 ,  C23C14/046 ,  C23C16/0227 ,  C23C16/045 ,  C23C16/45544 ,  C23C16/50 ,  H01J37/32009 ,  H01J2237/334 ,  H01L21/02266 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02315 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/31116 ,  H01L21/32136 ,  H01L21/67017 ,  H01L21/67213 ,  H01L21/76224

摘要： Embodiments include methods and systems of 3D structure fill. In one embodiment, a method of filling a trench in a wafer includes performing directional plasma treatment with an ion beam at an angle with respect to a sidewall of the trench to form a treated portion of the sidewall and an untreated bottom of the trench. A material is deposited in the trench. The deposition rate of the material on the treated portion of the sidewall is different than a second deposition rate on the untreated bottom of the trench. In one embodiment, a method includes depositing a material on the wafer, filling a bottom of the trench and forming a layer on a sidewall of the trench and a top surface adjacent to the trench. The method includes etching the layer with an ion beam at an angle with respect to the sidewall.

摘要翻译： 实施例包括3D结构填充的方法和系统。 在一个实施例中，在晶片中填充沟槽的方法包括使用离子束相对于沟槽的侧壁以一定角度执行定向等离子体处理，以形成侧壁的处理部分和沟槽的未处理底部。 材料沉积在沟槽中。 材料在侧壁的处理部分上的沉积速率不同于沟槽的未处理底部上的第二沉积速率。 在一个实施例中，一种方法包括在晶片上沉积材料，填充沟槽的底部并在沟槽的侧壁上形成层，以及邻近沟槽的顶表面。 该方法包括用相对于侧壁成一定角度的离子束蚀刻该层。

公开(公告)号：US20050153073A1

公开(公告)日：2005-07-14

申请号：US11076181

申请日：2005-03-09

申请人： Yi Zheng ,  Srinivas Nemani ,  Li-Qun Xia ,  Eric Hollar ,  Kang Yim

发明人： Yi Zheng ,  Srinivas Nemani ,  Li-Qun Xia ,  Eric Hollar ,  Kang Yim

IPC分类号： B05D3/06 ,  B05D7/24 ,  C23C16/40 ,  C23C16/56 ,  H01L21/3105 ,  H01L21/312 ,  C23C16/00 ,  H01L29/76

CPC分类号： C23C16/401 ,  B05D1/60 ,  B05D3/068 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02351 ,  H01L21/31058 ,  H01L21/3121 ,  H01L21/3122 ,  H01L21/3125 ,  H01L21/7681

摘要： The present invention generally provides a method for depositing a low dielectric constant film using an e-beam treatment. In one aspect, the method includes delivering a gas mixture comprising one or more organosilicon compounds and one or more hydrocarbon compounds having at least one cyclic group to a substrate surface at deposition conditions sufficient to deposit a non-cured film comprising the at least one cyclic group on the substrate surface. The method further includes substantially removing the at least one cyclic group from the non-cured film using an electron beam at curing conditions sufficient to provide a dielectric constant less than 2.5 and a hardness greater than 0.5 GPa.

摘要翻译： 本发明通常提供使用电子束处理沉积低介电常数膜的方法。 在一个方面，该方法包括在足以沉积包含至少一个环状基团的非固化膜的沉积条件下将包含一种或多种有机硅化合物和一种或多种具有至少一个环状基团的烃化合物的气体混合物递送到基底表面 组在基板表面上。 该方法还包括在足以提供小于2.5的介电常数和大于0.5GPa的硬度的固化条件下使用电子束从非固化膜中基本上除去至少一个环状基团。

公开(公告)号：US20150093907A1

公开(公告)日：2015-04-02

申请号：US14044138

申请日：2013-10-02

申请人： Ellie YIEH ,  Ludovic Godet ,  Srinivas Nemani ,  Er-Xuan Ping ,  Gary Dickerson

发明人： Ellie YIEH ,  Ludovic Godet ,  Srinivas Nemani ,  Er-Xuan Ping ,  Gary Dickerson

IPC分类号： H01L21/02 ,  H01L21/67

CPC分类号： H01L21/02271 ,  C23C14/021 ,  C23C14/046 ,  C23C16/0227 ,  C23C16/045 ,  C23C16/45544 ,  C23C16/50 ,  H01J37/32009 ,  H01J2237/334 ,  H01L21/02266 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02315 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/31116 ,  H01L21/32136 ,  H01L21/67017 ,  H01L21/67213 ,  H01L21/76224

摘要： Embodiments include methods and systems of 3D structure fill. In one embodiment, a method of filling a trench in a wafer includes performing directional plasma treatment with an ion beam at an angle with respect to a sidewall of the trench to form a treated portion of the sidewall and an untreated bottom of the trench. A material is deposited in the trench. The deposition rate of the material on the treated portion of the sidewall is different than a second deposition rate on the untreated bottom of the trench. In one embodiment, a method includes depositing a material on the wafer, filling a bottom of the trench and forming a layer on a sidewall of the trench and a top surface adjacent to the trench. The method includes etching the layer with an ion beam at an angle with respect to the sidewall.

摘要翻译： 实施例包括3D结构填充的方法和系统。 在一个实施例中，在晶片中填充沟槽的方法包括使用离子束相对于沟槽的侧壁以一定角度执行定向等离子体处理，以形成侧壁的处理部分和沟槽的未处理底部。 材料沉积在沟槽中。 材料在侧壁的处理部分上的沉积速率不同于沟槽的未处理底部上的第二沉积速率。 在一个实施例中，一种方法包括在晶片上沉积材料，填充沟槽的底部并在沟槽的侧壁上形成层，以及邻近沟槽的顶表面。 该方法包括用相对于侧壁成一定角度的离子束蚀刻该层。

公开(公告)号：US20070298585A1

公开(公告)日：2007-12-27

申请号：US11765944

申请日：2007-06-20

申请人： Dmitry Lubomirsky ,  Srinivas Nemani ,  Ellie Yieh

发明人： Dmitry Lubomirsky ,  Srinivas Nemani ,  Ellie Yieh

IPC分类号： H01L21/76

CPC分类号： H01L21/76229

摘要： Methods to reduce film cracking in a dielectric layer are described. The methods may include the steps of depositing a first dielectric film on a substrate and removing a top portion of the first dielectric film by performing an etch on the film. The methods may also include depositing a second dielectric film over the etched first film, and removing a top portion of the second dielectric film. In addition, the methods may include annealing the first and second dielectric films to form the dielectric layer, where the removal of the top portions from the first and the second dielectric films reduces a stress level in the dielectric layer.

摘要翻译： 描述了减少电介质层中的膜破裂的方法。 所述方法可以包括以下步骤：在衬底上沉积第一电介质膜并通过对膜进行蚀刻来去除第一电介质膜的顶部。 所述方法还可以包括在蚀刻的第一膜上沉积第二电介质膜，以及去除第二电介质膜的顶部。 此外，所述方法可以包括退火第一和第二介电膜以形成电介质层，其中从第一和第二电介质膜去除顶部部分降低了介电层中的应力水平。

公开(公告)号：US09530674B2

公开(公告)日：2016-12-27

申请号：US14044138

申请日：2013-10-02

申请人： Ellie Yieh ,  Ludovic Godet ,  Srinivas Nemani ,  Er-Xuan Ping ,  Gary Dickerson

发明人： Ellie Yieh ,  Ludovic Godet ,  Srinivas Nemani ,  Er-Xuan Ping ,  Gary Dickerson

IPC分类号： H01L21/00 ,  H01L21/67 ,  C23C14/02 ,  C23C14/04 ,  C23C16/02 ,  C23C16/04 ,  H01L21/02

CPC分类号： H01L21/02271 ,  C23C14/021 ,  C23C14/046 ,  C23C16/0227 ,  C23C16/045 ,  C23C16/45544 ,  C23C16/50 ,  H01J37/32009 ,  H01J2237/334 ,  H01L21/02266 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02315 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/31116 ,  H01L21/32136 ,  H01L21/67017 ,  H01L21/67213 ,  H01L21/76224

摘要： Embodiments include methods and systems of 3D structure fill. In one embodiment, a method of filling a trench in a wafer includes performing directional plasma treatment with an ion beam at an angle with respect to a sidewall of the trench to form a treated portion of the sidewall and an untreated bottom of the trench. A material is deposited in the trench. The deposition rate of the material on the treated portion of the sidewall is different than a second deposition rate on the untreated bottom of the trench. In one embodiment, a method includes depositing a material on the wafer, filling a bottom of the trench and forming a layer on a sidewall of the trench and a top surface adjacent to the trench. The method includes etching the layer with an ion beam at an angle with respect to the sidewall.

摘要翻译： 实施例包括3D结构填充的方法和系统。 在一个实施例中，在晶片中填充沟槽的方法包括使用离子束相对于沟槽的侧壁以一定角度执行定向等离子体处理，以形成侧壁的处理部分和沟槽的未处理底部。 材料沉积在沟槽中。 材料在侧壁的处理部分上的沉积速率不同于沟槽的未处理底部上的第二沉积速率。 在一个实施例中，一种方法包括在晶片上沉积材料，填充沟槽的底部并在沟槽的侧壁上形成层，以及邻近沟槽的顶表面。 该方法包括用相对于侧壁成一定角度的离子束蚀刻该层。

公开(公告)号：US20050211265A1

公开(公告)日：2005-09-29

申请号：US11132895

申请日：2005-05-19

申请人： Yi Zheng ,  Vinita Singh ,  Srinivas Nemani ,  Chen-an Chen ,  Ju-Hyung Lee ,  Shankar Venkataraman

发明人： Yi Zheng ,  Vinita Singh ,  Srinivas Nemani ,  Chen-an Chen ,  Ju-Hyung Lee ,  Shankar Venkataraman

IPC分类号： B08B7/00 ,  C23C16/44 ,  B08B6/00

CPC分类号： C23C16/4405 ,  B08B7/00 ,  Y10S134/902 ,  Y10S438/905

摘要： Methods and apparatus for cleaning deposition chambers are presented. The cleaning methods include the use of a remote plasma source to generate reactive species from a cleaning gas to clean deposition chambers. A flow of helium or argon may be used during chamber cleaning. Radio frequency power may also be used in combination with a remote plasma source to clean deposition chambers.

摘要翻译： 介绍了沉积室清洗方法和设备。 清洁方法包括使用远程等离子体源从清洁气体产生反应物质以清洁沉积室。 在室清洁期间可以使用氦气或氩气流。 射频功率还可以与远程等离子体源组合使用以清洁沉积室。

公开(公告)号：US06090206A

公开(公告)日：2000-07-18

申请号：US954299

申请日：1997-10-20

申请人： Won B. Bang ,  Matthew W. Losey ,  Francimar Campana ,  Srinivas Nemani ,  Sundar Pichai

发明人： Won B. Bang ,  Matthew W. Losey ,  Francimar Campana ,  Srinivas Nemani ,  Sundar Pichai

IPC分类号： F16K3/24 ,  C23C16/455 ,  C23C16/511 ,  F16K5/04 ,  F16K5/12 ,  F16K51/00 ,  H01L21/31 ,  C23C16/00 ,  F16K5/10

CPC分类号： F16K5/12

摘要： A throttle valve assembly is provided, including a throttle valve housing having a bore therethrough and a throttle valve plug assembly. The throttle valve plug assembly includes a shaft rotatably mounted on the throttle valve housing and a throttle valve plug having a concave cut-out portion. The throttle valve plug is mounted on the shaft within the throttle valve housing and substantially perpendicular to the bore. The throttle valve plug has at least two fully open positions and a closed position.

摘要翻译： 提供了一种节气门组件，其包括具有穿过其中的孔的节流阀壳体和节流阀插塞组件。 节流阀塞组件包括可旋转地安装在节流阀壳体上的轴和具有凹形切口部分的节流阀塞。 节气门塞被安装在节流阀壳体内的轴上且基本上垂直于孔。 节流阀塞具有至少两个完全打开位置和关闭位置。