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    Nonvolatile memory device
    11.
    发明授权
    Nonvolatile memory device 有权

    公开(公告)号：US10102909B2

    公开(公告)日：2018-10-16

    申请号：US15484580

    申请日：2017-04-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sang-Won Park ,  Su-Chang Jeon ,  Dong-Kyo Shim

    IPC: G11C16/10 ,  G11C16/26 ,  G11C16/04 ,  G11C16/34 ,  G11C16/08

    Abstract: A nonvolatile memory device includes a cell string having a plurality of memory cells connected to one bit line. A page buffer is connected to the bit line via a sensing node and connected to the cell string via the bit line. The page buffer includes a first latch for storing bit line setup information and a second latch for storing forcing information. The first latch is configured to output the bit line setup information to the sensing node, and the second latch is configured to output the forcing information to the sensing node independently of the first latch.

    Nonvolatile memory device, programming method of nonvolatile memory device and memory system including nonvolatile memory device
    12.
    发明授权
    Nonvolatile memory device, programming method of nonvolatile memory device and memory system including nonvolatile memory device 有权
    非易失存储器件，非易失性存储器件的编程方法和包括非易失性存储器件的存储器系统

    公开(公告)号：US09412456B2

    公开(公告)日：2016-08-09

    申请号：US14523850

    申请日：2014-10-25

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： DongHun Kwak ,  Sang-Won Park ,  Won-Taeck Jung

    IPC: G11C16/04 ,  G11C16/10 ,  G11C16/34 ,  H01L27/115 ,  G11C16/08 ,  G11C16/26

    CPC classification number: G11C16/10 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/26 ,  G11C16/3459 ,  H01L27/1157 ,  H01L27/11582

    Abstract: Disclosed are a program method and a nonvolatile memory device. The method includes receiving program data to be programmed in memory cells; reading the memory cells to judge an erase state and at least one program state; performing a state read operation in which the at least one program state is read using a plurality of state read voltages; and programming the program data in the memory cells using a plurality of verification voltages having different levels according to a result of the state read operation. Also disclosed are methods using a plurality of verification voltages selected based on factors which may affect a threshold voltage shift or other characteristic representing the data of a memory cell after programming.

    Abstract translation: 公开了一种程序方法和非易失性存储装置。 该方法包括接收要在存储器单元中编程的程序数据; 读取存储单元以判断擦除状态和至少一个程序状态; 执行使用多个状态读取电压读取所述至少一个程序状态的状态读取操作; 以及根据状态读取操作的结果，使用具有不同电平的多个验证电压对存储器单元中的程序数据进行编程。 还公开了使用基于可能影响阈值电压偏移的因素而选择的多个验证电压的方法或者在编程之后表示存储器单元的数据的其他特性的方法。

    Nonvolatile memory device and storage device including nonvolatile memory device
    14.
    发明授权
    Nonvolatile memory device and storage device including nonvolatile memory device 有权

    公开(公告)号：US11227659B2

    公开(公告)日：2022-01-18

    申请号：US17021648

    申请日：2020-09-15

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Bongsoon Lim ,  Jung-Yun Yun ,  Ji-Suk Kim ,  Sang-Won Park

    IPC: G11C16/10 ,  G11C16/34 ,  G11C16/26 ,  G11C16/08

    Abstract: A storage device includes a nonvolatile memory device and a controller. The controller provides the nonvolatile memory device with first data, an address, and a program start command and provides the nonvolatile memory device with second data after the program start command is provided the nonvolatile memory device. The nonvolatile memory device is configured to initiate a program operation, which is based on the first data, in response to the program start command and to continue to perform, based on the first data and the second data, the program operation when the second data is provided to the nonvolatile memory device. The nonvolatile memory device is configured to perform a program and a verification read of a first program loop based on the first data, the verification read of the first program loop being performed using one verification voltage.

    Non-volatile memory device
    15.
    发明授权
    Non-volatile memory device 有权

    公开(公告)号：US11200952B2

    公开(公告)日：2021-12-14

    申请号：US16991821

    申请日：2020-08-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sang-Won Park ,  Sang-Wan Nam ,  Ji Yeon Shin ,  Won Bo Shim ,  Jung-Yun Yun ,  Ji Ho Cho ,  Sang Gi Hong

    IPC: G11C16/10 ,  H01L25/065 ,  H01L25/18 ,  G11C16/04 ,  H01L23/00

    Abstract: A non-volatile memory device comprises a memory cell region including a first metal pad, a peripheral circuit region including a second metal pad and vertically connected to the memory cell region by the first metal pad and the second metal pad, a memory cell array in the memory cell region including a plurality of memory cells, each of the memory cells being connected to a plurality of word lines in the memory cell region and a plurality of bit lines in the memory cell region, and a control logic circuit in the peripheral circuit region configured to control voltages to be applied to the plurality of word lines and the plurality of bit lines.

    NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME
    17.
    发明申请
    NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME 审中-公开

    公开(公告)号：US20180268921A1

    公开(公告)日：2018-09-20

    申请号：US15824068

    申请日：2017-11-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ho-Jun Lee ,  Bong-Soon Lim ,  Sang-Won Park

    IPC: G11C29/00 ,  G06F12/02

    CPC classification number: G11C29/765 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7204 ,  G11C29/88 ,  G11C29/883

    Abstract: A nonvolatile memory device includes a memory cell array and a bad block remapping circuit. The memory cell array includes a first mat and a second mat that are paired with each other. The first mat includes a plurality of first memory blocks. The second mat includes a plurality of second memory blocks. A first selection memory block among the plurality of first memory blocks and a second selection memory block among the plurality of second memory blocks are accessed based on a first address. The bad block remapping circuit generates a first remapping address based on the first address when it is determined that the first selection memory block is defective. A first remapping memory block among the plurality of first memory blocks and the second selection memory block are accessed based on the first remapping address.

    Erase method of non-volatile memory device
    20.
    发明授权
    Erase method of non-volatile memory device 有权

    公开(公告)号：US11783900B2

    公开(公告)日：2023-10-10

    申请号：US17840021

    申请日：2022-06-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sang-Won Park ,  Won Bo Shim ,  Bong Soon Lim

    IPC: G11C16/16 ,  G11C16/24 ,  G11C16/34 ,  G11C16/12

    CPC classification number: G11C16/16 ,  G11C16/12 ,  G11C16/24 ,  G11C16/3445

    Abstract: A non-volatile memory device includes a memory cell array including a plurality of cell strings, each of the plurality of cell strings includes a gate-induced drain leakage (GIDL) transistor and a memory cell group, and a control logic to apply a voltage to each of the plurality of cell strings. The control logic performs a first erase operation of erasing the memory cell groups of each of the plurality of cell strings, a first verification operation of detecting erase results of the memory cell groups of each of the plurality of cell strings, and a program operation of programming the GIDL transistors of some of the plurality of cell strings.

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