公开(公告)号：US20230378132A1

公开(公告)日：2023-11-23

申请号：US18150525

申请日：2023-01-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen-Wei Shen ,  Sung-Hui Huang ,  Shang-Yun Hou ,  Sen-Bor Jan ,  Szu-Po Huang ,  Kuan-Yu Huang

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L21/768

CPC classification number: H01L25/0655 ,  H01L21/565 ,  H01L21/563 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/05 ,  H01L21/76895 ,  H01L23/49827 ,  H01L2224/05569 ,  H01L2224/16146 ,  H01L2924/3511 ,  H01L24/16

Abstract: A semiconductor device includes: a substrate; a plurality of dies attached to a first side of the substrate; a molding material on the first side of the substrate around the plurality of dies; a first redistribution structure on a second side of the substrate opposing the first side, where the first redistribution structure includes dielectric layers and conductive features in the dielectric layers, where the conductive features include conductive lines, vias, and dummy metal patterns isolated from the conductive lines and the vias; and conductive connectors attached to a first surface of the first redistribution structure facing away from the substrate.

公开(公告)号：US11791243B2

公开(公告)日：2023-10-17

申请号：US17815515

申请日：2022-07-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chia Hu ,  Sen-Bor Jan ,  Hsien-Wei Chen ,  Ming-Fa Chen

IPC: H01L23/48 ,  H01L23/528 ,  H01L21/768 ,  H01L21/66 ,  H01L23/00

CPC classification number: H01L23/481 ,  H01L21/76805 ,  H01L22/32 ,  H01L23/528 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/09 ,  H01L24/80 ,  H01L24/08 ,  H01L2224/03 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/08146 ,  H01L2224/08235 ,  H01L2224/80447 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06596 ,  H01L2924/14 ,  H01L2224/05147 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/05124 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/05166 ,  H01L2924/00014 ,  H01L2224/05186 ,  H01L2924/04941 ,  H01L2924/00014 ,  H01L2224/05181 ,  H01L2924/00014 ,  H01L2224/05186 ,  H01L2924/04953 ,  H01L2924/00014 ,  H01L2224/80447 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/05147 ,  H01L2924/00014

Abstract: A semiconductor device including a test pad contact and a method of manufacturing the semiconductor device are disclosed. In an embodiment, a semiconductor device may include a first metal feature and a second metal feature disposed in a single top metal layer over a substrate. A test pad may be formed over and electrically connected to the first metal feature. A first passivation layer may be formed over the second metal feature and the test pad and may cover top and side surfaces of the test pad. A first via may be formed penetrating the first passivation layer and contacting the test pad and a second via may be formed penetrating the first passivation layer and contacting the second metal feature.

公开(公告)号：US20230326895A1

公开(公告)日：2023-10-12

申请号：US18332990

申请日：2023-06-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Fa Chen ,  Chen-Hua Yu ,  Sen-Bor Jan

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/768 ,  H01L21/56 ,  H01L21/784 ,  H01L23/538 ,  H01L23/48 ,  H01L21/78 ,  H01L23/31

CPC classification number: H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L21/76898 ,  H01L21/561 ,  H01L24/94 ,  H01L21/784 ,  H01L23/5384 ,  H01L23/481 ,  H01L24/17 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3185 ,  H01L2924/00014 ,  H01L2924/351 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L25/18

Abstract: A system and method for connecting semiconductor dies is provided. An embodiment comprises connecting a first semiconductor die with a first width to a second semiconductor die with a larger second width and that is still connected to a semiconductor wafer. The first semiconductor die is encapsulated after it is connected, and the encapsulant and first semiconductor die are thinned to expose a through substrate via within the first semiconductor die. The second semiconductor die is singulated from the semiconductor wafer, and the combined first semiconductor die and second semiconductor die are then connected to another substrate.

公开(公告)号：US20220336356A1

公开(公告)日：2022-10-20

申请号：US17854683

申请日：2022-06-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fong-Yuan Chang ,  Noor Mohamed Ettuveettil ,  Po-Hsiang Huang ,  Sen-Bor Jan ,  Ming-Fa Chen ,  Chin-Chou Liu ,  Yi-Kan Cheng

IPC: H01L23/528 ,  H01L23/522 ,  H01L23/00

Abstract: Semiconductor devices and methods of manufacture are provided wherein a metallization layer is located over a substrate, and a power grid line is located within the metallization layer. A signal pad is located within the metallization layer and the signal pad is surrounded by the power grid line. A signal external connection is electrically connected to the signal pad.

公开(公告)号：US20220302062A1

公开(公告)日：2022-09-22

申请号：US17837492

申请日：2022-06-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Fa Chen ,  Chen-Hua Yu ,  Sen-Bor Jan

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/768 ,  H01L21/56 ,  H01L21/784 ,  H01L23/538 ,  H01L23/48 ,  H01L21/78 ,  H01L23/31

Abstract: A system and method for connecting semiconductor dies is provided. An embodiment comprises connecting a first semiconductor die with a first width to a second semiconductor die with a larger second width and that is still connected to a semiconductor wafer. The first semiconductor die is encapsulated after it is connected, and the encapsulant and first semiconductor die are thinned to expose a through substrate via within the first semiconductor die. The second semiconductor die is singulated from the semiconductor wafer, and the combined first semiconductor die and second semiconductor die are then connected to another substrate.

公开(公告)号：US20210066192A1

公开(公告)日：2021-03-04

申请号：US16929118

申请日：2020-07-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsien-Wei Chen ,  Jie Chen ,  Ming-Fa Chen ,  Sen-Bor Jan

IPC: H01L23/522 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

Abstract: A package has a first region and a second region. The package includes a first die, a second die, an encapsulant, and an inductor. The second die is stacked on and bonded to the first die. The encapsulant is aside the second die. At least a portion of the encapsulant is located in the second region. The inductor is located in the second region. A metal density in the first region is greater than a metal density in the second region.

公开(公告)号：US12218093B2

公开(公告)日：2025-02-04

申请号：US18332990

申请日：2023-06-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Fa Chen ,  Chen-Hua Yu ,  Sen-Bor Jan

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/768 ,  H01L21/78 ,  H01L21/784 ,  H01L23/31 ,  H01L23/48 ,  H01L23/538 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18

Abstract: A system and method for connecting semiconductor dies is provided. An embodiment comprises connecting a first semiconductor die with a first width to a second semiconductor die with a larger second width and that is still connected to a semiconductor wafer. The first semiconductor die is encapsulated after it is connected, and the encapsulant and first semiconductor die are thinned to expose a through substrate via within the first semiconductor die. The second semiconductor die is singulated from the semiconductor wafer, and the combined first semiconductor die and second semiconductor die are then connected to another substrate.

公开(公告)号：US20220375878A1

公开(公告)日：2022-11-24

申请号：US17881739

申请日：2022-08-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chia Hu ,  Chun-Chiang Kuo ,  Sen-Bor Jan ,  Ming-Fa Chen ,  Hsien-Wei Chen

IPC: H01L23/58 ,  H01L23/522 ,  H01L23/532 ,  H01L29/06 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065

Abstract: A structure includes a first die and a second die. The first die includes a first bonding layer having a first plurality of bond pads disposed therein and a first seal ring disposed in the first bonding layer. The first bonding layer extends over the first seal ring. The second die includes a second bonding layer having a second plurality of bond pads disposed therein. The first plurality of bond pads is bonded to the second plurality of bond pads. The first bonding layer is bonded to the second bonding layer. An area interposed between the first seal ring and the second bonding layer is free of bond pads.

公开(公告)号：US20220278063A1

公开(公告)日：2022-09-01

申请号：US17745225

申请日：2022-05-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chia Hu ,  Ching-Pin Yuan ,  Sung-Feng Yeh ,  Sen-Bor Jan ,  Ming-Fa Chen

IPC: H01L23/00 ,  H01L23/544 ,  H01L25/065 ,  H01L23/522

Abstract: A semiconductor device including a first die and a second die bonded to one another. The first die includes a first passivation layer over a substrate, and first bond pads in the first passivation layer. The second die includes a second passivation layer, which may be bonded to the first passivation layer, and second bond pads in the second passivation layer, which may be bonded to the first bond pads. The second bond pads include inner bond pads and outer bond pads. The outer bond pads may have a greater diameter than the inner bond pads as well as the first bond pads.

公开(公告)号：US11309243B2

公开(公告)日：2022-04-19

申请号：US16929118

申请日：2020-07-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsien-Wei Chen ,  Jie Chen ,  Ming-Fa Chen ,  Sen-Bor Jan

IPC: H01L23/522 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

Abstract: A package has a first region and a second region. The package includes a first die, a second die, an encapsulant, and an inductor. The second die is stacked on and bonded to the first die. The encapsulant is aside the second die. At least a portion of the encapsulant is located in the second region. The inductor is located in the second region. A metal density in the first region is greater than a metal density in the second region.