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公开(公告)号:US08043950B2
公开(公告)日:2011-10-25
申请号:US11552369
申请日:2006-10-24
Applicant: Mayumi Yamaguchi , Konami Izumi
Inventor: Mayumi Yamaguchi , Konami Izumi
IPC: H01L21/3205 , H01L27/12 , H01L27/01 , H01L21/4763 , H01L31/0392
CPC classification number: H01L27/1203 , B81C1/00547 , B81C2201/0135 , H01L21/84 , H01L27/016 , H01L27/12 , H01L27/13
Abstract: It is an object of the present invention to manufacture a micromachine having a plurality of structural bodies with different functions and to shorten the time required for sacrifice layer etching in a process of manufacturing the micromachine. Another object of the present invention is to prevent a structural layer from being attached to a substrate after the sacrifice layer etching. In other words, an object of the present invention is to provide an inexpensive and high-value-added micromachine by improving throughput and yield. The sacrifice layer etching is conducted in multiple steps. In the multiple steps of the sacrifice layer etching, a part of the sacrifice layer that does not overlap with the structural layer is removed by the earlier sacrifice layer etching and a part of the sacrifice layer that is under the structural layer is removed by the later sacrifice layer etching.
Abstract translation: 本发明的目的是制造具有多个具有不同功能的结构体的微型机械,并且缩短在制造微机械过程中牺牲层蚀刻所需的时间。 本发明的另一个目的是在牺牲层蚀刻之后防止结构层附着到基底上。 换句话说,本发明的目的是通过提高生产量和产量来提供廉价和高附加值的微机械。 牺牲层蚀刻以多个步骤进行。 在牺牲层蚀刻的多个步骤中,通过较早的牺牲层蚀刻去除与结构层不重叠的牺牲层的一部分,并且在结构层之下的部分牺牲层被后面的部分去除 牺牲层蚀刻。
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公开(公告)号:US20070093045A1
公开(公告)日:2007-04-26
申请号:US11552369
申请日:2006-10-24
Applicant: Mayumi YAMAGUCHI , Konami IZUMI
Inventor: Mayumi YAMAGUCHI , Konami IZUMI
IPC: H01L21/3205 , H01L27/12 , H01L27/01 , H01L21/4763 , H01L31/0392
CPC classification number: H01L27/1203 , B81C1/00547 , B81C2201/0135 , H01L21/84 , H01L27/016 , H01L27/12 , H01L27/13
Abstract: It is an object of the present invention to manufacture a micromachine having a plurality of structural bodies with different functions and to shorten the time required for sacrifice layer etching in a process of manufacturing the micromachine. Another object of the present invention is to prevent a structural layer from being attached to a substrate after the sacrifice layer etching. In other words, an object of the present invention is to provide an inexpensive and high-value-added micromachine by improving throughput and yield. The sacrifice layer etching is conducted in multiple steps. In the multiple steps of the sacrifice layer etching, a part of the sacrifice layer that does not overlap with the structural layer is removed by the earlier sacrifice layer etching and a part of the sacrifice layer that is under the structural layer is removed by the later sacrifice layer etching.
Abstract translation: 本发明的目的是制造具有多个具有不同功能的结构体的微型机械,并且缩短在制造微机械过程中牺牲层蚀刻所需的时间。 本发明的另一个目的是在牺牲层蚀刻之后防止结构层附着到基底上。 换句话说,本发明的目的是通过提高生产量和产量来提供廉价和高附加值的微机械。 牺牲层蚀刻以多个步骤进行。 在牺牲层蚀刻的多个步骤中,通过较早的牺牲层蚀刻去除与结构层不重叠的牺牲层的一部分,并且在结构层之下的部分牺牲层被后面的部分去除 牺牲层蚀刻。
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公开(公告)号:US20060231521A1
公开(公告)日:2006-10-19
申请号:US11107083
申请日:2005-04-15
Applicant: Dan Chilcott
Inventor: Dan Chilcott
IPC: C23F1/00
CPC classification number: B81B3/0072 , B81B2201/0235 , B81B2201/0242 , B81B2201/0264 , B81B2203/0315 , B81B2203/0338 , B81C2201/0135 , B81C2201/014 , B81C2201/017
Abstract: A technique for manufacturing a micro-electro mechanical structure includes a number of steps. Initially, a cavity is formed into a first side of a handling wafer, with a sidewall of the cavity forming a first angle greater than about 54.7 degrees with respect to a first side of the handling wafer at an opening of the cavity. Then, a bulk etch is performed on the first side of the handling wafer to modify the sidewall of the cavity to a second angle greater than about 90 degrees, with respect to the first side of the handling wafer at the opening of the cavity. Next, a second side of a second wafer is bonded to the first side of the handling wafer.
Abstract translation: 微电子机械结构的制造技术包括多个步骤。 最初,空腔形成处理晶片的第一侧,空腔的侧壁在空腔的开口处相对于处理晶片的第一侧形成大于约54.7度的第一角度。 然后,在处理晶片的第一侧上执行体蚀刻,以将空腔的侧壁相对于处理晶片在空腔开口处的第一侧大于约90度的第二角度进行修改。 接下来,将第二晶片的第二面接合到处理晶片的第一侧。
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公开(公告)号:US20170365507A1
公开(公告)日:2017-12-21
申请号:US15630597
申请日:2017-06-22
Applicant: Infineon Technologies AG
Inventor: Alfons Dehe , Damian Sojka , Andre Schmenn , Carsten Ahrens
IPC: H01L21/762 , H01L23/60 , H01L21/764 , H02H9/04 , H01L27/02 , H01L23/00
CPC classification number: H01L21/76289 , B81C1/00119 , B81C1/00214 , B81C1/00404 , B81C1/00484 , B81C1/00531 , B81C1/00539 , B81C1/00571 , B81C2201/0111 , B81C2201/0132 , B81C2201/0133 , B81C2201/0135 , B81C2201/016 , B81C2201/0198 , B81C2201/053 , H01J1/3044 , H01J1/308 , H01J2201/30411 , H01J2201/3048 , H01L21/02129 , H01L21/02164 , H01L21/0217 , H01L21/02274 , H01L21/02282 , H01L21/283 , H01L21/31058 , H01L21/31105 , H01L21/31127 , H01L21/31144 , H01L21/764 , H01L23/60 , H01L24/32 , H01L24/48 , H01L24/73 , H01L27/0288 , H01L2224/32245 , H01L2224/45099 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/00014 , H01L2924/13091 , H01L2924/181 , H02H9/046 , H03K17/545 , H01L2924/00 , H01L2924/00012
Abstract: In one embodiment of the present invention, an electronic device includes a first emitter/collector region and a second emitter/collector region disposed in a substrate. The first emitter/collector region has a first edge/tip, and the second emitter/collector region has a second edge/tip. A gap separates the first edge/tip from the second edge/tip. The first emitter/collector region, the second emitter/collector region, and the gap form a field emission device.
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公开(公告)号:US20170170059A1
公开(公告)日:2017-06-15
申请号:US15442085
申请日:2017-02-24
Applicant: MEMS Drive, Inc.
Inventor: Roman Gutierrez , Tony Tang , Xiaolei Liu , Guiqin Wang , Matthew NG
IPC: H01L21/768 , H01L23/485
CPC classification number: H01L21/76816 , B81B3/0045 , B81B7/0029 , B81B2203/0353 , B81C1/00674 , B81C1/00682 , B81C2201/0112 , B81C2201/0135 , H01L21/768 , H01L21/76898 , H01L23/485 , H01L2924/00 , H01L2924/00014 , H01L2924/0002 , H01L2924/1461 , H01L2924/181
Abstract: A system and method for manipulating the structural characteristics of a MEMS device include etching a plurality of holes into the surface of a MEMS device, wherein the plurality of holes comprise one or more geometric shapes determined to provide specific structural characteristics desired in the MEMS device.
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公开(公告)号:US09640370B2
公开(公告)日:2017-05-02
申请号:US14195887
申请日:2014-03-04
Applicant: SPTS TECHNOLOGIES LIMITED
Inventor: Oliver James Ansell
CPC classification number: H01J37/32963 , B81C99/0065 , B81C2201/0135 , B81C2201/0142 , H01J37/32972 , H01L22/26
Abstract: A method is for etching the whole width of a substrate to expose buried features. The method includes etching a face of a substrate across its width to achieve substantially uniform removal of material; illuminating the etched face during the etch process; applying edge detection techniques to light reflected or scattered from the face to detect the appearances of buried features; and modifying the etch in response to the detection of the buried feature. An etching apparatus for etching substrate across its width to expose buried is also disclosed.
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公开(公告)号:US20140174658A1
公开(公告)日:2014-06-26
申请号:US14195887
申请日:2014-03-04
Applicant: SPTS TECHNOLOGIES LIMITED
Inventor: Oliver James Ansell
CPC classification number: H01J37/32963 , B81C99/0065 , B81C2201/0135 , B81C2201/0142 , H01J37/32972 , H01L22/26
Abstract: A method is for etching the whole width of a substrate to expose buried features. The method includes etching a face of a substrate across its width to achieve substantially uniform removal of material; illuminating the etched face during the etch process; applying edge detection techniques to light reflected or scattered from the face to detect the appearances of buried features; and modifying the etch in response to the detection of the buried feature. An etching apparatus for etching substrate across its width to expose buried is also disclosed.
Abstract translation: 一种方法是蚀刻衬底的整个宽度以暴露掩埋的特征。 该方法包括在其宽度上蚀刻衬底的表面以实现材料的基本上均匀的去除; 在蚀刻过程中照射蚀刻的面; 将边缘检测技术应用于从脸部反射或散射的光,以检测埋藏特征的外观; 以及响应于所述掩埋特征的检测来修改所述蚀刻。 还公开了一种用于蚀刻衬底跨越其宽度以暴露掩埋的蚀刻装置。
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公开(公告)号:US08624336B2
公开(公告)日:2014-01-07
申请号:US13275383
申请日:2011-10-18
Applicant: Mayumi Yamaguchi , Konami Izumi
Inventor: Mayumi Yamaguchi , Konami Izumi
IPC: H01L27/14
CPC classification number: H01L27/1203 , B81C1/00547 , B81C2201/0135 , H01L21/84 , H01L27/016 , H01L27/12 , H01L27/13
Abstract: It is an object of the present invention to manufacture a micromachine having a plurality of structural bodies with different functions and to shorten the time required for sacrifice layer etching in a process of manufacturing the micromachine. Another object of the present invention is to prevent a structural layer from being attached to a substrate after the sacrifice layer etching. In other words, an object of the present invention is to provide an inexpensive and high-value-added micromachine by improving throughput and yield. The sacrifice layer etching is conducted in multiple steps. In the multiple steps of the sacrifice layer etching, a part of the sacrifice layer that does not overlap with the structural layer is removed by the earlier sacrifice layer etching and a part of the sacrifice layer that is under the structural layer is removed by the later sacrifice layer etching.
Abstract translation: 本发明的目的是制造具有多个具有不同功能的结构体的微型机械,并且缩短在制造微型机械过程中牺牲层蚀刻所需的时间。 本发明的另一个目的是在牺牲层蚀刻之后防止结构层附着到基底上。 换句话说,本发明的目的是通过提高生产量和产量来提供廉价和高附加值的微机械。 牺牲层蚀刻以多个步骤进行。 在牺牲层蚀刻的多个步骤中,通过较早的牺牲层蚀刻去除与结构层不重叠的牺牲层的一部分,并且在结构层之下的部分牺牲层被后面的部分去除 牺牲层蚀刻。
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公开(公告)号:US20080254635A1
公开(公告)日:2008-10-16
申请号:US12067569
申请日:2006-09-18
Applicant: Hubert Benzel , Stefan Pinter , Christoph Schelling , Tjalf Pirk , Julian Gonska , Frank Klopf , Christina Leinenbach
Inventor: Hubert Benzel , Stefan Pinter , Christoph Schelling , Tjalf Pirk , Julian Gonska , Frank Klopf , Christina Leinenbach
IPC: H01L21/306
CPC classification number: H01L21/3065 , B81C1/00531 , B81C2201/0135 , H01L21/26506 , H01L21/266 , H01L21/32135 , H01L21/78
Abstract: A method for the plasma-free etching of silicon using the etching gas ClF3 or XeF2 and its use are provided. The silicon is provided having one or more areas to be etched as a layer on the substrate or as the substrate material itself. The silicon is converted into the mixed semiconductor SiGe by introducing germanium and is etched by supplying the etching gas ClF3 or XeF2. The introduction of germanium and the supply of the etching gas ClF3 or XeF2 may be performed at the same time or alternatingly. In particular, it is provided that the introduction of germanium be performed by implanting germanium ions in silicon.
Abstract translation: 提供了使用蚀刻气体ClF 3 X或XeF 2 2等离子体蚀刻硅的方法及其用途。 硅被提供有一个或多个要被蚀刻的区域作为衬底上的层或作为衬底材料本身。 通过引入锗将硅转换成混合半导体SiGe,并通过供给蚀刻气体ClF 3 X或XeF 2 2进行蚀刻。 可以同时或交替地进行锗的引入和蚀刻气体ClF 3 X或XeF 2 2的供给。 特别地,提供通过在锗中注入锗离子来进行锗的引入。
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