公开(公告)号：US20160284568A1

公开(公告)日：2016-09-29

申请号：US14959129

申请日：2015-12-04

Applicant: RF Micro Devices, Inc.

Inventor： Thomas Scott Morris ,  David Jandzinski ,  Stephen Parker ,  Jon Chadwick ,  Julio C. Costa

IPC: H01L21/56 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L21/563 ,  H01L21/561 ,  H01L21/568 ,  H01L23/29 ,  H01L23/3135 ,  H01L23/373 ,  H01L23/3737 ,  H01L23/4334 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/10 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/81 ,  H01L2224/81801 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L21/56 ,  H01L2221/68304 ,  H01L21/304 ,  H01L21/30604 ,  H01L2221/68381

Abstract: The present disclosure relates to enhancing the thermal performance of encapsulated flip chip dies. According to an exemplary process, a plurality of flip chip dies are attached on a top surface of a carrier, and a first mold compound is applied over the top surface of the carrier to encapsulate the plurality of flip chip dies. The first mold compound is thinned down to expose a substrate of each flip chip die and the substrate of each flip chip die is then substantially etched away to provide an etched flip chip die that has an exposed surface at the bottom of a cavity. Next, a second mold compound with high thermal conductivity is applied to substantially fill each cavity and the top surface of the second mold compound is planarized. Finally, the encapsulated etched flip chip dies can be marked, singulated, and tested as a module.

Abstract translation: 本公开涉及增强封装的倒装芯片的热性能。 根据示例性工艺，在载体的顶表面上附接多个倒装芯片管芯，并且在载体的顶表面上施加第一模具化合物以封装多个倒装芯片管芯。 将第一模具化合物减薄以暴露每个倒装芯片裸片的衬底，然后基本上蚀刻掉每个倒装芯片裸片的衬底，以提供在空腔底部具有暴露表面的蚀刻倒装芯片裸片。 接下来，施加具有高导热性的第二模具化合物以基本上填充每个空腔，并且第二模具化合物的顶表面被平坦化。 最后，封装的蚀刻倒装芯片芯片可以作为模块进行标记，分割和测试。

公开(公告)号：US09455680B2

公开(公告)日：2016-09-27

申请号：US14298829

申请日：2014-06-06

Applicant: RF Micro Devices, Inc.

Inventor： Dirk Robert Walter Leipold ,  George Maxim ,  Baker Scott

IPC: H03H7/09 ,  H03H7/46 ,  H03H7/01 ,  H03F3/193 ,  H04B1/10 ,  H03F1/56 ,  H03F3/24 ,  H03F3/68 ,  H03F3/72 ,  H04B1/18

CPC classification number: H03H7/465 ,  H03F1/565 ,  H03F3/193 ,  H03F3/245 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/267 ,  H03F2200/451 ,  H03F2203/7209 ,  H03H7/0115 ,  H03H7/0153 ,  H03H7/09 ,  H03H7/1775 ,  H03H7/46 ,  H03H7/463 ,  H03H2210/012 ,  H03H2210/025 ,  H03H2210/04 ,  H04B1/1027 ,  H04B1/18

Abstract: RF filter structures are disclosed that may have multiple filter paths, which are provided by weakly coupled resonators. The filter paths may be interconnected so that additional filter paths may be realized between input and output terminals of the RF filter structures. In this manner, the weakly coupled resonators from the filter paths may be arranged in a matrix. In one embodiment, an RF filter structure includes a first filter path and a second filter path. The first filter path includes (at least) a first pair of weakly coupled resonators while a second filter path that includes (at least) a second pair of weakly coupled resonators. To interconnect the first filter path and the second filter path, a cross-coupling capacitive structure is electrically connected between the first filter path and the second filter path. As such, an additional filtering path may be realized through the interconnection provided by the cross-coupling capacitive structure.

Abstract translation: 公开了可以具有由弱耦合谐振器提供的多个滤波器路径的RF滤波器结构。 滤波器路径可以互连，使得可以在RF滤波器结构的输入和输出端之间实现附加的滤波器路径。 以这种方式，来自滤波器路径的弱耦合谐振器可以被布置成矩阵。 在一个实施例中，RF滤波器结构包括第一滤波器路径和第二滤波器路径。 第一滤波器路径包括（至少）第一对弱耦合谐振器，而第二滤波器路径包括（至少）第二对弱耦合谐振器对。 为了互连第一滤波器路径和第二滤波器路径，交叉耦合电容结构电连接在第一滤波器路径和第二滤波器路径之间。 因此，可以通过由交叉耦合电容结构提供的互连来实现附加的滤波路径。

公开(公告)号：US09450480B2

公开(公告)日：2016-09-20

申请号：US13661227

申请日：2012-10-26

Applicant: RF Micro Devices, Inc.

Inventor： Nadim Khlat

IPC: G05F1/00 ,  H02M1/15 ,  H02M3/156

Abstract: This disclosure relates generally to radio frequency (RF) switching converters and RF amplification devices that use RF switching converters. In one embodiment, an RF switching converter includes a switching circuit operable to receive a power source voltage, a switching controller configured to switch the switching circuit so that the switching circuit generates a pulsed output voltage from the power source voltage, and an RF filter configured to convert the pulsed output voltage into a supply voltage, wherein the RF filter includes a decoupling capacitor configured to receive the supply voltage. The switching controller is configured to generate a ripple correction current that is injected into the decoupling capacitor such that the decoupling capacitor filters the ripple correction current. The decoupling capacitor outputs the ripple correction current such that the ripple correction current reduces a ripple variation in a supply current level of a supply current resulting from the supply voltage.

公开(公告)号：US09444415B2

公开(公告)日：2016-09-13

申请号：US14202493

申请日：2014-03-10

Applicant: RF Micro Devices, Inc.

Inventor： Andrew F. Folkmann

IPC: H03F1/30 ,  H03F3/19 ,  H03F3/21 ,  H03F1/32 ,  H03F3/24 ,  H03G3/30 ,  H03F1/02

CPC classification number: H03F3/19 ,  H03F1/0244 ,  H03F1/3247 ,  H03F3/21 ,  H03F3/245 ,  H03F2200/411 ,  H03G3/3042

Abstract: This disclosure relates generally to power amplification devices and methods of operating the same. The power amplification devices are capable of reducing (and possibly cancelling) modulation of a ripple variation of a supply voltage level of a supply voltage onto a radio frequency (RF) signal. In one embodiment, a power amplification device includes a power amplification circuit configured to amplify an RF signal with a supply voltage such that a ripple variation in a supply voltage level of the supply voltage is modulated onto the RF signal in accordance with a conversion gain. However, the power amplification device also includes a plurality of ripple rejection circuits. The plurality of ripple rejection circuits is configured to produce phase shifts and one or more amplitude shifts in the RF signal so as to reduce the conversion gain of the power amplification circuit.

Abstract translation: 本公开一般涉及功率放大装置及其操作方法。 功率放大装置能够减少（并且可能地消除）将电源电压的电源电压电平的纹波变化调制到射频（RF）信号上。 在一个实施例中，功率放大装置包括功率放大电路，功率放大电路被配置为利用电源电压放大RF信号，使得电源电压的电源电压电平的纹波变化根据转换增益被调制到RF信号上。 然而，功率放大装置还包括多个纹波抑制电路。 多个纹波抑制电路被配置为产生RF信号中的相移和一个或多个幅度偏移，以便降低功率放大电路的转换增益。

公开(公告)号：US09444407B2

公开(公告)日：2016-09-13

申请号：US14254215

申请日：2014-04-16

Applicant: RF Micro Devices, Inc.

Inventor： Nadim Khlat ,  Baker Scott ,  Michael R. Kay

IPC: H03G3/20 ,  H03F1/02 ,  H03F3/195 ,  H03F3/24

Abstract: Power supply circuitry, which includes a parallel amplifier and a parallel amplifier power supply, is disclosed. The power supply circuitry operates in either an average power tracking mode or an envelope tracking mode. The parallel amplifier power supply provides a parallel amplifier power supply signal. The parallel amplifier regulates an envelope power supply voltage based on an envelope power supply control signal using the parallel amplifier power supply signal, which provides power for amplification. During the envelope tracking mode, the envelope power supply voltage at least partially tracks an envelope of an RF transmit signal and the parallel amplifier power supply signal at least partially tracks the envelope power supply control signal. During the average power tracking mode, the envelope power supply voltage does not track the envelope of the RF transmit signal.

公开(公告)号：US20160261235A1

公开(公告)日：2016-09-08

申请号：US14715173

申请日：2015-05-18

Applicant: RF Micro Devices. Inc.

Inventor： Jeffery Peter Ortiz

IPC: H03F1/02 ,  H03F3/21 ,  H03F3/45 ,  H03F3/19

CPC classification number: H03F3/19 ,  H03F1/0205 ,  H03F1/0211 ,  H03F1/565 ,  H03F3/21 ,  H03F3/245 ,  H03F3/265 ,  H03F3/45076 ,  H03F2200/102 ,  H03F2200/171 ,  H03F2200/451 ,  H03F2200/516 ,  H03F2200/534 ,  H03F2200/537 ,  H03F2200/541 ,  H03F2203/45116 ,  H03F2203/45316

Abstract: A differential power amplifier has at least an input stage and an output stage. A first output stage amplifier is configured to receive a first portion of a differential signal from the input stage at a first output stage input and provide a first amplified signal at a first output stage output. The second output stage amplifier is configured to receive a second portion of the differential signal from the input stage at a second output stage input and provide a second amplified signal at a second output stage output. Power limiter circuitry is connected to the first and/or output stage inputs and is configured to limit a power level of the differential signal prior to being received at the output stage, such that the differential power amplifier and associated filters are not damaged, while the nominal performance of the differential power amplifier at rated power is not significantly affected.

Abstract translation: 差分功率放大器至少具有输入级和输出级。 第一输出级放大器被配置为在第一输出级输入端从输入级接收差分信号的第一部分，并在第一输出级输出端提供第一放大信号。 第二输出级放大器被配置为在第二输出级输入处从输入级接收差分信号的第二部分，并在第二输出级输出端提供第二放大信号。 功率限制器电路连接到第一和/或输出级输入，并且被配置为在输出级接收之前限制差分信号的功率电平，使得差分功率放大器和相关滤波器不被损坏，而 差动功率放大器在额定功率下的额定性能没有明显的影响。

公开(公告)号：US09419775B2

公开(公告)日：2016-08-16

申请号：US14444128

申请日：2014-07-28

Applicant: RF Micro Devices, Inc.

Inventor： Marcus Granger-Jones

IPC: H04L5/00 ,  H04L5/08 ,  H03J3/20 ,  H04L5/14

CPC classification number: H04L5/08 ,  H03J3/20 ,  H03J2200/10 ,  H04L5/001 ,  H04L5/0023 ,  H04L5/14

Abstract: A tunable diplexer includes a high band port, a low band port, an antenna port, a high pass filter, and a low pass filter. The high pass filter is coupled between the high band port and the antenna port, and is configured to pass signals within a high pass band between the high band port and the antenna port. The high pass filter includes a high band path stop band zero, which is configured to selectively attenuate signals within a high band path stop band. The low pass filter is coupled between the low band port and the antenna port, and is configured to pass signals within a low pass band between the low band port and the antenna port. The low pass filter includes a low band path stop band zero, which is configured to selectively attenuate signals within a low band path stop band.

Abstract translation: 可调谐双工器包括高带端口，低带端口，天线端口，高通滤波器和低通滤波器。 高通滤波器耦合在高频带端口和天线端口之间，并被配置为在高频带端口和天线端口之间的高通频带内传递信号。 高通滤波器包括高带路径阻带零点，其被配置为选择性地衰减高频带路径阻带内的信号。 低通滤波器耦合在低频带端口和天线端口之间，并且被配置为在低频带端口和天线端口之间传递低通频带内的信号。 低通滤波器包括低带路径阻带零点，其被配置为选择性地衰减低频带路径阻带内的信号。

公开(公告)号：US09419578B2

公开(公告)日：2016-08-16

申请号：US14298830

申请日：2014-06-06

Applicant: RF Micro Devices, Inc.

Inventor： Dirk Robert Walter Leipold ,  George Maxim ,  Baker Scott

IPC: H03H7/09 ,  H03H7/42 ,  H03H7/46 ,  H03H7/01 ,  H03F3/193 ,  H04B1/10 ,  H03F1/56 ,  H03F3/24 ,  H03F3/68 ,  H03F3/72 ,  H04B1/18

CPC classification number: H03H7/465 ,  H03F1/565 ,  H03F3/193 ,  H03F3/245 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/267 ,  H03F2200/451 ,  H03F2203/7209 ,  H03H7/0115 ,  H03H7/0153 ,  H03H7/09 ,  H03H7/1775 ,  H03H7/46 ,  H03H7/463 ,  H03H2210/012 ,  H03H2210/025 ,  H03H2210/04 ,  H04B1/1027 ,  H04B1/18

Abstract: This disclosure relates generally to radio frequency (RF) filter structures. In one embodiment, an RF filter structure includes a first resonator and a second resonator. The second resonator is operably associated with the first resonator such that an energy transfer factor between the first resonator and the second resonator is less than 10%. The first resonator includes a first inductor and a first capacitive structure electrically connected to the first inductor, while the second resonator has a second inductor and a second capacitive structure electrically connected to the second inductor. A displacement between the first inductor and the second inductor is less than or equal to half a maximum lateral width of the second inductor. To set an electric coupling coefficient, a first cross-coupling capacitive structure is electrically connected between the first resonator and the second resonator.

Abstract translation: 本公开一般涉及射频（RF）滤波器结构。 在一个实施例中，RF滤波器结构包括第一谐振器和第二谐振器。 第二谐振器可操作地与第一谐振器相关联，使得第一谐振器和第二谐振器之间的能量传递因子小于10％。 第一谐振器包括电连接到第一电感器的第一电感器和第一电容结构，而第二谐振器具有电连接到第二电感器的第二电感器和第二电容结构。 第一电感器和第二电感器之间的位移小于或等于第二电感器的最大横向宽度的一半。 为了设置电耦合系数，第一交叉耦合电容结构电连接在第一谐振器和第二谐振器之间。

公开(公告)号：US09401678B2

公开(公告)日：2016-07-26

申请号：US14151167

申请日：2014-01-09

Applicant: RF Micro Devices, Inc.

Inventor： Michael R. Kay ,  Nadim Khlat

IPC: H03F3/04 ,  H03G3/00 ,  H03F1/02 ,  H02M3/07 ,  H03F1/42 ,  H03F3/195 ,  H03F3/24 ,  H03F3/30 ,  H03F3/45 ,  H03F3/50 ,  H03F3/72

CPC classification number: H03F1/02 ,  H02M3/07 ,  H03F1/0244 ,  H03F1/025 ,  H03F1/0277 ,  H03F1/42 ,  H03F3/195 ,  H03F3/245 ,  H03F3/3022 ,  H03F3/45475 ,  H03F3/505 ,  H03F3/72 ,  H03F2200/102 ,  H03F2200/204 ,  H03F2200/36 ,  H03F2200/375 ,  H03F2200/451 ,  H03F2200/555 ,  H03F2200/78 ,  H03F2203/45526 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03F2203/45694 ,  H03F2203/45712 ,  H03F2203/45718 ,  H03F2203/7221

Abstract: A switch mode power supply converter, a parallel amplifier, and a parallel amplifier output impedance compensation circuit are disclosed. The switch mode power supply converter provides a switching voltage and generates an estimated switching voltage output, which is indicative of the switching voltage. The parallel amplifier generates a power amplifier supply voltage at a power amplifier supply output based on a combination of a VRAMP signal and a high frequency ripple compensation signal. The parallel amplifier output impedance compensation circuit provides the high frequency ripple compensation signal based on a difference between the VRAMP signal and the estimated switching voltage output.

Abstract translation: 公开了开关模式电源转换器，并联放大器和并联放大器输出阻抗补偿电路。 开关模式电源转换器提供开关电压并产生表示开关电压的估计开关电压输出。 并联放大器基于VRAMP信号和高频纹波补偿信号的组合在功率放大器电源输出端产生功率放大器电源电压。 并联放大器输出阻抗补偿电路根据VRAMP信号和估计的开关电压输出之间的差异提供高频纹波补偿信号。

公开(公告)号：US09391588B2

公开(公告)日：2016-07-12

申请号：US14031383

申请日：2013-09-19

Applicant: RF Micro Devices, Inc.

Inventor： Kushal Bhattacharjee ,  Sergei Zhgoon

IPC: H01L41/053 ,  H01L41/047 ,  H03H9/25 ,  H03H9/125 ,  H03H9/15 ,  C04B35/00 ,  H03H9/17

CPC classification number: H03H9/17 ,  H03H2009/155

Abstract: A micro-electrical-mechanical system (MEMS) vibrating structure includes a carrier substrate, a first anchor, a second anchor, a single crystal piezoelectric body, and a conducting layer. The first anchor and the second anchor are provided on the surface of the carrier substrate. The single-crystal piezoelectric body is suspended between the first anchor and the second anchor, and includes a uniform crystalline orientation defined by a set of Euler angles. The single-crystal piezoelectric body includes a first surface parallel to and facing the surface of the carrier substrate on which the first anchor and the second anchor are formed and a second surface opposite the first surface. The conducting layer is inter-digitally dispersed, and is formed on the second surface of the single-crystal piezoelectric body. The first surface of the single-crystal piezoelectric body is left exposed.

Abstract translation: 微机电系统（MEMS）振动结构包括载体基板，第一锚固件，第二锚固件，单晶体压电体和导电层。 第一锚固件和第二锚固件设置在载体基板的表面上。 单晶压电体悬挂在第一锚和第二锚之间，并且包括由一组欧拉角定义的均匀结晶取向。 单晶体压电体包括平行于并面向其上形成有第一锚和第二锚的载体基板的表面的第一表面和与第一表面相对的第二表面。 导电层是数字间分散的，并且形成在单晶体压电体的第二表面上。 单晶体压电体的第一面露出。