公开(公告)号：US07601638B2

公开(公告)日：2009-10-13

申请号：US11926614

申请日：2007-10-29

申请人： Masahiko Hasunuma ,  Hisashi Kaneko ,  Hiroshi Toyoda

发明人： Masahiko Hasunuma ,  Hisashi Kaneko ,  Hiroshi Toyoda

IPC分类号： H01L21/4763

CPC分类号： H01L21/76877 ,  C23C26/00 ,  C25D5/02 ,  C25D5/18 ,  C25D5/50 ,  C25D7/123 ,  H01L21/2885

摘要： A method for manufacturing a semiconductor device includes forming, on a substrate having a recessed portion on a surface, a plating film which is at least buried in the recessed portion and has a higher impurity concentration in an upper portion than in a lower portion, thermally treating the plating film, and removing the thermally treated plating film except for a portion buried in the recessed portion.

摘要翻译： 一种半导体器件的制造方法，其特征在于，在具有表面的凹部的基板上形成至少埋设在所述凹部内并且在上部比在下部具有较高的杂质浓度的镀膜 处理镀膜，除去除了凹部中的部分以外的热处理电镀膜。

公开(公告)号：US20080299766A1

公开(公告)日：2008-12-04

申请号：US12128789

申请日：2008-05-29

申请人： Seiichi OMOTO ,  Hisashi Kaneko ,  Masahiko Hasunuma

发明人： Seiichi OMOTO ,  Hisashi Kaneko ,  Masahiko Hasunuma

IPC分类号： H01L21/44

CPC分类号： H01L21/76852 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76885 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for fabricating a semiconductor device, includes forming a first dielectric film above a substrate, forming an opening in the first dielectric film, forming a catalytic characteristic film using at least one of a metal having catalytic characteristics and a conductive oxide having catalytic characteristics as its material on sidewalls and at a bottom of the opening, depositing a conductive material film using a conductive material in the opening in which the catalytic characteristic film is formed on the sidewalls and at the bottom, removing the catalytic characteristic film formed on the sidewalls of the opening, and forming a second dielectric film above the first dielectric film and the conductive material film after the removing.

摘要翻译： 一种制造半导体器件的方法，包括在衬底上形成第一电介质膜，在第一介电膜中形成开口，使用具有催化特性的金属和具有催化特性的导电氧化物中的至少一种形成催化特性膜， 其材料在侧壁和开口的底部，在开口中使用导电材料沉积导电材料膜，在该开口中，在侧壁和底部形成催化特征膜，除去形成在侧壁上的催化特性膜 并且在去除之后在第一电介质膜和导电材料膜之上形成第二电介质膜。

公开(公告)号：US07420320B2

公开(公告)日：2008-09-02

申请号：US11946913

申请日：2007-11-29

申请人： Kenya Sano ,  Ryoichi Ohara ,  Naoko Yanase ,  Takaaki Yasumoto ,  Kazuhiko Itaya ,  Takashi Kawakubo ,  Hiroshi Toyoda ,  Masahiko Hasunuma ,  Toshihiko Nagano ,  Kazuhide Abe ,  Michihiko Nishigaki ,  Hironobu Shibata

发明人： Kenya Sano ,  Ryoichi Ohara ,  Naoko Yanase ,  Takaaki Yasumoto ,  Kazuhiko Itaya ,  Takashi Kawakubo ,  Hiroshi Toyoda ,  Masahiko Hasunuma ,  Toshihiko Nagano ,  Kazuhide Abe ,  Michihiko Nishigaki ,  Hironobu Shibata

IPC分类号： H01H47/00 ,  H01H51/22 ,  H01L41/04

CPC分类号： H03H9/02015 ,  H01H2057/006 ,  H01L41/0477 ,  H01L41/094 ,  H01L41/316 ,  H01L41/319 ,  H03H3/02 ,  H03H9/02094 ,  H03H9/173 ,  H03H9/174 ,  H03H9/175 ,  H03H9/542 ,  H03H9/582 ,  H03H9/605 ,  H03H2003/021 ,  H03H2003/023 ,  H03H2003/025 ,  Y10T29/42 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49005 ,  Y10T29/49117 ,  Y10T29/49155

摘要： A piezoelectric thin film device includes an amorphous metal film disposed on a substrate and a piezoelectric film disposed on the amorphous metal. One of crystal axis of the piezoelectric film is aligned in a direction perpendicular to a surface of the amorphous metal.

摘要翻译： 压电薄膜器件包括设置在衬底上的非晶金属膜和设置在非晶态金属上的压电膜。 压电膜的晶轴之一在垂直于非晶态金属表面的方向上排列。

公开(公告)号：US20070108618A1

公开(公告)日：2007-05-17

申请号：US11650935

申请日：2007-01-09

申请人： Masahiko Hasunuma ,  Sachiyo Ito

发明人： Masahiko Hasunuma ,  Sachiyo Ito

IPC分类号： H01L23/52 ,  H01L23/48

CPC分类号： H01L23/585 ,  H01L21/76807 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/3677 ,  H01L23/522 ,  H01L23/5283 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is disclosed, which includes at least two layers superposed on each other in a stacking direction above a substrate, each of the layers including an insulating film a conductive layer films, a conductive plug electrically connected to the conductive layer, and at least one dummy via chain provided in the insulating films and stacked in the at least two layers, wherein the dummy via chain includes at least two reinforcing metal layers and at least one reinforcing plug.

摘要翻译： 公开了一种半导体器件，其包括在衬底上方的层叠方向上彼此重叠的至少两层，每层包括绝缘膜，导电层膜，与导电层电连接的导电插塞，至少 一个虚拟通孔链设置在绝缘膜中并堆叠在至少两层中，其中虚拟通孔链包括至少两个增强金属层和至少一个加强塞。

公开(公告)号：US20060214305A1

公开(公告)日：2006-09-28

申请号：US11335584

申请日：2006-01-20

申请人： Atsuko Sakata ,  Junichi Wada ,  Seiichi Omoto ,  Masaaki Hatano ,  Soichi Yamashita ,  Kazuyuki Higashi ,  Naofumi Nakamura ,  Masaki Yamada ,  Kazuya Kinoshita ,  Tomio Katata ,  Masahiko Hasunuma

发明人： Atsuko Sakata ,  Junichi Wada ,  Seiichi Omoto ,  Masaaki Hatano ,  Soichi Yamashita ,  Kazuyuki Higashi ,  Naofumi Nakamura ,  Masaki Yamada ,  Kazuya Kinoshita ,  Tomio Katata ,  Masahiko Hasunuma

IPC分类号： H01L23/48 ,  H01L21/4763

CPC分类号： H01L21/31616 ,  C23C16/045 ,  C23C16/45536 ,  C23C16/482 ,  H01L21/02178 ,  H01L21/02186 ,  H01L21/02244 ,  H01L21/02255 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/67109 ,  H01L21/67748 ,  H01L21/6831 ,  H01L21/68742 ,  H01L21/68764 ,  H01L21/68771 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76828 ,  H01L21/76831 ,  H01L21/76835 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76858 ,  H01L21/76864 ,  H01L21/76873 ,  H01L21/76874 ,  H01L23/5222 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor device includes heating a substrate having an insulation film thereon to a first substrate temperature so that oxidizing species are emitted from the insulating film, the insulating film having a recessed portion formed in a surface thereof, forming a metal film on the insulating film at a second substrate temperature lower than the first substrate temperature, and oxidizing at least part of the metal film with oxidizing species remaining in the insulating film.

摘要翻译： 一种制造半导体器件的方法包括将其上具有绝缘膜的衬底加热到​​第一衬底温度，使得氧化物质从绝缘膜发射，绝缘膜具有形成在其表面上的凹陷部分，在 所述绝缘膜的第二衬底温度低于所述第一衬底温度，并且氧化至少部分所述金属膜的氧化物质残留在所述绝缘膜中。

公开(公告)号：US20050200021A1

公开(公告)日：2005-09-15

申请号：US10986071

申请日：2004-11-12

申请人： Sachiyo Ito ,  Masahiko Hasunuma

发明人： Sachiyo Ito ,  Masahiko Hasunuma

IPC分类号： H01L21/768 ,  H01L21/312 ,  H01L21/3205 ,  H01L23/52 ,  H01L23/522 ,  H01L29/10

CPC分类号： H01L21/76835 ,  H01L21/76807 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1036 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device comprising a first insulating layer formed above a semiconductor substrate, and comprising a first insulating material, a second insulating material and a hole, a relative dielectric constant of the first insulating material being 3 or less, a Young's modulus of the first insulating material being 10 GPa or less, a linear expansivity of the first insulating material being greater than 30×10−6° C.−1, and a linear expansivity of the second insulating material being 30×10−6° C.−1 or less, and a second insulating layer formed on the first insulating layer, the second insulating layer having a groove connected to the hole, wherein a linear expansivity α of the first insulating layer within 6 μm from the hole is 30×10−6° C.−1 or less, where α = ∑ i = 1 ⁢ v i ⁢ α i , vi and αi are a volume ratio and a linear expansivity of an i-th insulating material.

摘要翻译： 一种半导体器件，包括在半导体衬底上形成的第一绝缘层，并且包括第一绝缘材料，第二绝缘材料和孔，第一绝缘材料的相对介电常数为3以下，第一绝缘材料的杨氏模量 材料为10GPa或更小，第一绝缘材料的线性膨胀率大于30×10 -6℃。以及第二绝缘材料的线性膨胀性 以及形成在第一绝缘层上的第二绝缘层，第二绝缘层具有连接到孔的凹槽， 其中所述第一绝缘层在距离所述孔6μm内的线性膨胀系数α为30×10 -6℃以下，其中