公开(公告)号：US08637989B2

公开(公告)日：2014-01-28

申请号：US13569653

申请日：2012-08-08

Applicant: Ho-jin Lee ,  Hyun-soo Chung ,  Chang-seong Jeon ,  Sang-sick Park ,  Jae-hyun Phee

Inventor： Ho-jin Lee ,  Hyun-soo Chung ,  Chang-seong Jeon ,  Sang-sick Park ,  Jae-hyun Phee

IPC: H01L23/48

CPC classification number: H01L23/48 ,  H01L21/76898 ,  H01L23/481 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05025 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05647 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/01327 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/04953 ,  H01L2924/04941

Abstract: A semiconductor device includes a semiconductor substrate and a via electrode. The via electrode has a first portion on the substrate and extends towards the substrate and has a plurality of spikes that extends from the first portion into the substrate, each of the spikes being spaced apart form one another.

Abstract translation: 半导体器件包括半导体衬底和通孔电极。 通孔电极在基板上具有第一部分并且朝向基板延伸并且具有从第一部分延伸到基板中的多个尖峰，每个尖峰彼此间隔开。

公开(公告)号：US08415804B2

公开(公告)日：2013-04-09

申请号：US12639241

申请日：2009-12-16

Applicant: Ho-jin Lee ,  Dong-hyun Jang ,  In-young Lee ,  Min-seung Yoon ,  Son-kwan Hwang

Inventor： Ho-jin Lee ,  Dong-hyun Jang ,  In-young Lee ,  Min-seung Yoon ,  Son-kwan Hwang

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/44

CPC classification number: H01L24/13 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13009 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29298 ,  H01L2224/83194 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2224/05552

Abstract: A semiconductor chip, a method of fabricating the same, and a stack module and a memory card including the semiconductor chip include a first surface and a second surface facing the first surface is provided. At least one via hole including a first portion extending in a direction from the first surface of the substrate to the second surface of the substrate and a second portion that is connected to the first portion and has a tapered shape. At least one via electrode filling the at least one via hole is provided.

Abstract translation: 提供一种半导体芯片及其制造方法，以及包括半导体芯片的堆叠模块和存储卡，其包括第一表面和面对第一表面的第二表面。 至少一个通孔，包括在从基板的第一表面到基板的第二表面的方向上延伸的第一部分和连接到第一部分并具有锥形形状的第二部分。 提供至少一个填充至少一个通孔的通孔电极。

公开(公告)号：US20100290459A1

公开(公告)日：2010-11-18

申请号：US12812989

申请日：2009-09-11

Applicant: Nam-kyung Lee ,  Dae-ig Chang ,  Ho-jin Lee

Inventor： Nam-kyung Lee ,  Dae-ig Chang ,  Ho-jin Lee

IPC: H04L12/56

CPC classification number: H04N21/4385 ,  H04N21/2383 ,  H04N21/2389 ,  H04N21/242 ,  H04N21/4382 ,  H04N21/8547

Abstract: A variable length packet data transmission apparatus and method are provided. The variable length packet data transmission apparatus using a variable length packet transmission technique includes a data transmitter generating synchronization information for synchronizing data communication with a data receiving apparatus, including the generated synchronization information in transmission data to be transmitted according to a variable length packet transmission technique, and transmitting the transmission data including the synchronization information to the data receiving apparatus, and a data receiver receiving the transmission data including synchronization information from a data transmission apparatus, reconstructing the synchronization information included in the received transmission data, and performing synchronization with the data transmission apparatus using the reconstructed synchronization information.

Abstract translation: 提供了一种可变长度分组数据传输装置和方法。 使用可变长度分组传输技术的可变长度分组数据传输装置包括数据发射机，其生成用于与数据接收装置同步数据通信的同步信息，包括根据可变长度分组传输技术发送的传输数据中产生的同步信息 并且将包括同步信息的发送数据发送到数据接收装置，以及从数据发送装置接收包括同步信息的发送数据的数据接收装置，对接收的发送数据中包含的同步信息进行重构，并与数据进行同步 发送装置使用重构的同步信息。

公开(公告)号：US20080128888A1

公开(公告)日：2008-06-05

申请号：US11895187

申请日：2007-08-23

Applicant: Myeong-soon Park ,  In-young Lee ,  Ho-jin Lee ,  Moon-sun Seo

Inventor： Myeong-soon Park ,  In-young Lee ,  Ho-jin Lee ,  Moon-sun Seo

IPC: H01L23/488 ,  H01L21/58

CPC classification number: H01L25/0652 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/11 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/94 ,  H01L24/97 ,  H01L25/16 ,  H01L2224/05554 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73257 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2224/83

Abstract: Provided is a system-in-package (SiP) including a main chip and one or more sub chips. In the SiP, a first surface of the main chip is electrically connected with a second surface of the main chip, through a via electrode, the one or more sub chips are assembled on the second surface of the main chip on which a ReDistribution Line (RDL) is formed, and the length of the SiP is substantially equal to the length of the main chip.

Abstract translation: 提供了包括主芯片和一个或多个子芯片的系统级封装（SiP）。 在SiP中，主芯片的第一表面通过通孔电极与主芯片的第二表面电连接，一个或多个子芯片组装在主芯片的第二表面上，在其上分布有再分布线 RDL），并且SiP的长度基本上等于主芯片的长度。