公开(公告)号：US09631065B2

公开(公告)日：2017-04-25

申请号：US13795021

申请日：2013-03-12

Applicant: INTEL CORPORATION

Inventor： Anna M. Prakash ,  James C. Matayabas ,  Arjun Krishnan ,  Nisha Ananthakrishnan

IPC: H01L21/56 ,  H01L23/29 ,  C08K5/00 ,  H01L21/78 ,  B23K26/18 ,  B23K26/364

CPC classification number: C08K5/005 ,  B23K26/18 ,  B23K26/364 ,  H01L21/563 ,  H01L21/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of forming microelectronic packaging structures and associated structures formed thereby are described. Those methods and structures may include forming a wafer level underfill (WLUF) material comprising a resin material, and adding at least one of a UV absorber, a sterically hindered amine light stabilizer (HALS), an organic surface protectant (OSP), and a fluxing agent to form the WLUF material. The WLUF is then applied to a top surface of a wafer comprising a plurality of die.

公开(公告)号：US20230084375A1

公开(公告)日：2023-03-16

申请号：US17475123

申请日：2021-09-14

Applicant: Intel Corporation

Inventor： Priyanka Dobriyal ,  Ankur Agrawal ,  Anna M. Prakash ,  Ann J. Xu ,  Jimin Yao ,  Raiyomand F. Aspandiar ,  Lesley A. Polka Wood ,  Abigail G. Agwai ,  Kayleen L. E. Helms

IPC: H01S5/0237 ,  H01S5/0234

Abstract: An apparatus comprising an integrated circuit chip comprising a first surface region and a second surface region adjacent to the first surface region; a substrate coupled to the integrated circuit chip through a plurality of connections comprising solder; and underfill between the substrate and the integrated circuit chip, wherein the underfill contacts the second surface region, but does not contact the first surface region.

公开(公告)号：US11579426B2

公开(公告)日：2023-02-14

申请号：US16643158

申请日：2017-09-28

Applicant: Intel Corporation

Inventor： Chia-Pin Chiu ,  Anna M. Prakash

IPC: G02B19/00 ,  G02B27/30

Abstract: Aspects of the embodiments are directed to an opto-electronic device and methods of using the same. The opto-electronic device can include a processing device and a photonic device. The photonic device can include an optical demultiplexer; a collimating lens optically coupled to the optical demultiplexer and positioned to receive light from the optical demultiplexer, the collimating lens to collimate light received from the optical demultiplexer; a photodetector comprising a photosensitive element, the photosensitive element to convert received light into an electrical signal; and a focusing lens optically coupled to the photodetector, the focusing lens to receive light and focus the light towards the photosensitive element.

公开(公告)号：US20200348498A1

公开(公告)日：2020-11-05

申请号：US16643158

申请日：2017-09-28

Applicant: Intel Corporation

Inventor： Chia-Pin Chiu ,  Anna M. Prakash

IPC: G02B19/00 ,  G02B27/30

Abstract: Aspects of the embodiments are directed to an opto-electronic device and methods of using the same. The opto-electronic device can include a processing device and a photonic device. The photonic device can include an optical demultiplexer; a collimating lens optically coupled to the optical demultiplexer and positioned to receive light from the optical demultiplexer, the collimating lens to collimate light received from the optical demultiplexer; a photodetector comprising a photosensitive element, the photosensitive element to convert received light into an electrical signal; and a focusing lens optically coupled to the photodetector, the focusing lens to receive light and focus the light towards the photosensitive element.

公开(公告)号：US10168357B2

公开(公告)日：2019-01-01

申请号：US14976808

申请日：2015-12-21

Applicant: INTEL CORPORATION

Inventor： Wen Yin ,  Anna M. Prakash ,  Teag R. Haughan ,  Dingying David Xu ,  Joaquin Aguilar-Santillan

IPC: G01R1/067 ,  C25D3/54 ,  C25D7/00 ,  C25D5/50 ,  C23C8/20 ,  C22F1/18 ,  C25D5/34 ,  C11D11/00

Abstract: Coated probe tips are described for plunger pins of an integrated circuit package tests system. One example has a plunger having a tip to contact a solder ball of an integrated circuit package, a sleeve to hold the plunger and allow the plunger to move toward and away from the package, the sleeve being held in a socket, a spring within the sleeve to drive the plunger toward the package, and a coating over the tip, the coating being harder than a solder ball.

公开(公告)号：US09953929B2

公开(公告)日：2018-04-24

申请号：US15074050

申请日：2016-03-18

Applicant: Intel Corporation

Inventor： Rajendra C. Dias ,  Anna M. Prakash ,  Joshua D. Heppner ,  Eric J. Li ,  Nachiket R. Raravikar

IPC: H01L23/552 ,  H01L23/31 ,  H01L21/56 ,  H01L21/78

CPC classification number: H01L23/552 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3114 ,  H01L2224/16227 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012

Abstract: Discussed generally herein are methods and devices including or providing an electromagnetic interference (EMI) shielding. A device can include a substrate including electrical connection circuitry therein, grounding circuitry on, or at least partially in the substrate, the grounding circuitry at least partially exposed from a surface of the substrate, a die electrically connected to the connection circuitry and the grounding circuitry, the die on the substrate, and a conductive foil or conductive film surrounding the die, the conductive foil or conductive film electrically connected to the grounding circuitry.

公开(公告)号：US20170250145A1

公开(公告)日：2017-08-31

申请号：US15595581

申请日：2017-05-15

Applicant: Intel Corporation

Inventor： Rajendra C. Dias ,  Joshua D. Heppner ,  Mitul B. Modi ,  Anna M. Prakash

IPC: H01L23/60 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/60 ,  H01L21/4825 ,  H01L21/56 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/49524 ,  H01L23/552 ,  H01L24/27 ,  H01L24/33 ,  H01L2224/97 ,  H01L2924/3025

Abstract: An electric device and method of fabrication of that electric device is disclosed. The electric device includes one or more electrical devices attached to a substrate. The electric device further includes one or more grounding pads attached to the substrate. The electric device further includes a perforated conductive material placed on the substrate. The electric device further includes a molding compound deposited to cover the perforated conductive material, the one or more devices, and the one or more grounding pads.

公开(公告)号：US20170207152A1

公开(公告)日：2017-07-20

申请号：US15478064

申请日：2017-04-03

Applicant: Intel Corporation

Inventor： Thomas J. De Bonis ,  Lilia May ,  Rajen S. Sidhu ,  Mukul P. Renavikar ,  Ashay A. Dani ,  Edward R. Prack ,  Carl L. Deppisch ,  Anna M. Prakash ,  James C. Matayabas ,  Jason Jieping Zhang ,  Srinivasa R. Aravamudhan ,  Chang Lin

IPC: H01L23/498 ,  H01L23/31 ,  H01L25/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/768 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L23/49816 ,  H01L21/4853 ,  H01L21/565 ,  H01L21/76802 ,  H01L23/3128 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/13023 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/37001 ,  H01L2924/00

Abstract: An apparatus is described that includes a substrate and a mold compound disposed on the substrate. The semiconductor die is embedded within the mold compound and is electrically coupled to lands on the substrate. Solder balls are disposed around the semiconductor die on the substrate. Each of the solder balls have a solid coating thereon. The solid coating contains a cleaning agent to promote its solder ball's coalescence with another solder ball. Respective vias are formed in the mold compound that expose the solder balls and their respective solid coatings. In combined or alternate embodiments outer edges of the mold compound have smaller thickness than regions of the mold compound between the vias and the semiconductor die. In combined or alternate embodiments micro-channels exist between the solder balls and the mold compound.