公开(公告)号：US20060086966A1

公开(公告)日：2006-04-27

申请号：US11296510

申请日：2005-12-08

申请人： In-kyeong Yoo ,  Byong-man Kim

发明人： In-kyeong Yoo ,  Byong-man Kim

IPC分类号： H01L29/76

CPC分类号： B82Y10/00 ,  G11C2216/08 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/7881

摘要： A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.

公开(公告)号：US06992923B2

公开(公告)日：2006-01-31

申请号：US11097157

申请日：2005-04-04

申请人： Dong-wook Kim ,  In-kyeong Yoo ,  Jung-hyun Sok ,  June-key Lee

发明人： Dong-wook Kim ,  In-kyeong Yoo ,  Jung-hyun Sok ,  June-key Lee

IPC分类号： G11C11/00

CPC分类号： H01L27/228 ,  B82Y10/00

摘要： A single transistor type magnetic random access memory device and a method of operating and manufacturing the same, wherein the single transistor type magnetic random access memory device includes a substrate, first and second doped regions spaced apart from each other, a gate dielectric layer on a portion of the semiconductor substrate between the first and second doped regions, a magnetic tunnel junction on the gate dielectric layer, word lines on the magnetic tunnel junction extending in a first direction which is the same direction as the second doped region, bit lines connected to the first doped region in a second direction perpendicular to the first direction, and an insulating layer covering the gate dielectric layer, the magnetic tunnel junction, and the word lines. The single transistor type magnetic random access memory device has a simple circuit structure, has a prolonged lifetime and is easy to manufacture.

公开(公告)号：US06913984B2

公开(公告)日：2005-07-05

申请号：US10743377

申请日：2003-12-23

申请人： In-sook Kim ,  Sun-ae Seo ,  In-kyeong Yoo ,  Soo-hwan Jeong

发明人： In-sook Kim ,  Sun-ae Seo ,  In-kyeong Yoo ,  Soo-hwan Jeong

IPC分类号： B82B1/00 ,  H01L21/28 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/06 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792 ,  H01L21/76

CPC分类号： B82Y10/00 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42332 ,  H01L29/7881 ,  H01L29/792 ,  Y10S977/723 ,  Y10S977/774

摘要： A method of fabricating memory with nano dots includes sequentially depositing a first insulating layer, a charge storage layer, a sacrificial layer, and a metal layer on a substrate in which source and drain electrodes are formed, forming a plurality of holes on the resultant structure by anodizing the metal layer and oxidizing portions of the sacrificial layer that are exposed through the holes, patterning the charge storage layer to have nano dots by removing the oxidized metal layer, and etching the sacrificial layer and the charge storage layer using the oxidized sacrificial layer as a mask, and removing the oxidized sacrificial layer, depositing a second insulating layer and a gate electrode on the patterned charge storage layer, and patterning the first insulating layer, the patterned charge storage layer, the second insulating layer, and the gate electrode to a predetermined shape, for forming memory having uniformly distributed nano-scale storage nodes.

摘要翻译： 利用纳米点制造存储器的方法包括在形成源极和漏极的衬底上依次沉积第一绝缘层，电荷存储层，牺牲层和金属层，在所得结构上形成多个孔 通过阳极氧化金属层并氧化通过孔露出的牺牲层的部分，通过去除氧化的金属层将电荷存储层图案化成具有纳米点，并且使用氧化的牺牲层蚀刻牺牲层和电荷存储层 作为掩模，并且去除氧化的牺牲层，在图案化的电荷存储层上沉积第二绝缘层和栅电极，并且将第一绝缘层，图案化电荷存储层，第二绝缘层和栅电极图案化，以 用于形成具有均匀分布的纳米级存储节点的存储器的预定形状。

公开(公告)号：US20050139882A1

公开(公告)日：2005-06-30

申请号：US11024469

申请日：2004-12-30

申请人： Wenxu Xianyu ,  Takashi Noguchi ,  In-kyeong Yoo ,  Young-soo Park

发明人： Wenxu Xianyu ,  Takashi Noguchi ,  In-kyeong Yoo ,  Young-soo Park

IPC分类号： H01L21/3205 ,  G11C11/22 ,  H01L21/82 ,  H01L21/8239 ,  H01L21/8246 ,  H01L21/84 ,  H01L27/10 ,  H01L27/105 ,  H01L27/115 ,  H01L27/12 ,  H01L29/786 ,  H01L31/119

CPC分类号： H01L27/11507 ,  H01L21/84 ,  H01L27/11502 ,  H01L27/12

摘要： In an electronic device, and a method of manufacturing the same, the electronic device includes a first substrate, a first lower capacitor on the first substrate, a first lower switching element on the first lower capacitor, and a second substrate on the first lower switching element. The electronic device may further include a second lower switching element which is isolated from the first lower capacitor, and an upper capacitor on the second substrate, the lower electrode of the upper capacitor being connected to the second lower switching element.

摘要翻译： 在电子设备及其制造方法中，电子设备包括第一基板，第一基板上的第一下部电容器，第一下部电容器上的第一下部开关元件，以及第一下部开关 元件。 电子设备还可以包括与第一下电容器隔离的第二下开关元件和第二基板上的上电容器，上电容器的下电极连接到第二下开关元件。

公开(公告)号：US20150028278A1

公开(公告)日：2015-01-29

申请号：US14444083

申请日：2014-07-28

申请人： Myoung-jae Lee ,  Seong-ho Cho ,  Ho-jung Kim ,  Young-soo Park ,  David Seo ,  In-kyeong Yoo

发明人： Myoung-jae Lee ,  Seong-ho Cho ,  Ho-jung Kim ,  Young-soo Park ,  David Seo ,  In-kyeong Yoo

IPC分类号： H01L45/00

CPC分类号： H01L29/788 ,  G06N3/049 ,  G06N3/063 ,  G11C11/54 ,  G11C11/5685 ,  G11C13/0007 ,  G11C14/0063 ,  G11C16/0433 ,  G11C2213/15 ,  G11C2213/53 ,  H01L27/11521 ,  H01L28/00 ,  H01L29/408 ,  H01L29/42324 ,  H01L29/51 ,  H01L29/512 ,  H01L29/517 ,  H01L29/685 ,  H01L29/78 ,  H01L45/085 ,  H01L45/1206 ,  H01L45/147

摘要： Provided are nonvolatile memory transistors and devices including the nonvolatile memory transistors. A nonvolatile memory transistor may include a channel element, a gate electrode corresponding to the channel element, a gate insulation layer between the channel element and the gate electrode, an ionic species moving layer between the gate insulation layer and the gate electrode, and a source and a drain separated from each other with respect to the channel element. A motion of an ionic species at the ionic species moving layer occurs according to a voltage applied to the gate electrode. A threshold voltage changes according to the motion of the ionic species. The nonvolatile memory transistor has a multi-level characteristic.

摘要翻译： 提供了非易失性存储晶体管和包括非易失性存储晶体管的器件。 非易失性存储晶体管可以包括沟道元件，对应于沟道元件的栅极电极，沟道元件和栅电极之间的栅极绝缘层，栅极绝缘层和栅电极之间的离子物质移动层，以及源极 以及相对于沟道元件彼此分离的漏极。 根据施加到栅电极的电压，发生离子物质移动层处的离子物质的运动。 阈值电压根据离子物质的运动而变化。 非易失性存储晶体管具有多电平特性。

公开(公告)号：US08456889B2

公开(公告)日：2013-06-04

申请号：US12929519

申请日：2011-01-31

申请人： Young-bae Kim ,  In-kyeong Yoo ,  Chang-jung Kim

发明人： Young-bae Kim ,  In-kyeong Yoo ,  Chang-jung Kim

IPC分类号： G11C11/00

CPC分类号： H01L29/685 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0069 ,  G11C2213/53

摘要： Semiconductor devices including variable resistance materials and methods of operating the semiconductor devices. The semiconductor devices use variable resistance materials with resistances that vary according to applied voltages as channel layers.

摘要翻译： 包括可变电阻材料的半导体器件和操作半导体器件的方法。 半导体器件使用具有根据施加的电压而变化的电阻的可变电阻材料作为沟道层。

公开(公告)号：US20120249718A1

公开(公告)日：2012-10-04

申请号：US13439147

申请日：2012-04-04

申请人： Jin-seung Sohn ,  Sang-hun Lee ,  In-kyeong Yoo ,  Eun-hyoung Cho

发明人： Jin-seung Sohn ,  Sang-hun Lee ,  In-kyeong Yoo ,  Eun-hyoung Cho

IPC分类号： B41J2/435 ,  B05D5/06 ,  G02B1/10 ,  G02B5/09 ,  G02B27/14

CPC分类号： G02B1/005 ,  G02B5/1809 ,  G02B5/1861 ,  G02B27/102 ,  G02B27/1086

摘要： A color printing paper includes a substrate having a printing region and a plurality of photonic crystal patterns formed on the printing region. The plurality of photonic crystal layer patterns have different respective optical reflection characteristics. The printing method includes selecting pixels including a plurality of photonic crystal layer patterns that express at least one of a red color, a green color, and a blue color, and changing optical reflection characteristics of at least a portion of the plurality of photonic crystal layer patterns of the selected pixels.

摘要翻译： 彩色打印纸包括具有打印区域和形成在打印区域上的多个光子晶体图案的基板。 多个光子晶体层图案具有不同的相应的光学反射特性。 打印方法包括选择包括表示红色，绿色和蓝色中的至少一种的多个光子晶体层图案的像素，以及改变多个光子晶体层的至少一部分的光学反射特性 所选像素的图案。

公开(公告)号：US20110222685A1

公开(公告)日：2011-09-15

申请号：US12923375

申请日：2010-09-17

申请人： Ho-jung Kim ,  In-kyeong Yoo ,  Jai-kwang Shin

发明人： Ho-jung Kim ,  In-kyeong Yoo ,  Jai-kwang Shin

IPC分类号： H04L9/38 ,  H04L9/06

CPC分类号： G06F21/85 ,  G06F21/78 ,  G11C7/24 ,  G11C11/005 ,  G11C13/0002 ,  G11C13/0059 ,  G11C14/009

摘要： A storage device may include a storage unit that stores data transmitted via a plurality of first wires; and a security control unit that controls connection between each of a plurality of second wires connected to an external device and each of the plurality of first wires by programming a plurality of switching devices according to an encryption key.

摘要翻译： 存储装置可以包括：存储单元，存储经由多条第一布线发送的数据; 以及安全控制单元，其通过根据加密密钥对多个交换设备进行编程来控制连接到外部设备的多个第二线路中的每一个与所述多条第一线路中的每一条线路之间的连接。

公开(公告)号：US07835167B2

公开(公告)日：2010-11-16

申请号：US11980418

申请日：2007-10-31

申请人： Chee-kheng Lim ,  In-kyeong Yoo ,  Sung-hoon Choa

发明人： Chee-kheng Lim ,  In-kyeong Yoo ,  Sung-hoon Choa

IPC分类号： G11C19/00 ,  G11C11/00 ,  G11C11/14 ,  G11C11/15

CPC分类号： G11C11/14 ,  G11C19/0808 ,  G11C19/0841 ,  G11C21/00 ,  Y10T428/11

摘要： Example embodiments may provide data storage devices using movement of a magnetic domain wall and/or a method of operating magnetic domain data storage devices. The data storage device may include a first magnetic layer for writing data having two magnetic domains magnetized in different directions, a second magnetic layer for storing data at a side of the first magnetic layer, a data recording device connected to the first magnetic layer and the second magnetic layer, and a plurality of reading heads configured to read the second magnetic layer. The data storage device may store a larger amount of data without requiring moving mechanical systems.

摘要翻译： 示例性实施例可以使用磁畴壁的移动和/或操作磁畴数据存储设备的方法来提供数据存储设备。 数据存储装置可以包括用于写入具有不同方向磁化的两个磁畴的数据的第一磁性层，用于在第一磁性层的一侧存储数据的第二磁性层，连接到第一磁性层的数据记录装置和 第二磁性层和被配置为读取第二磁性层的多个读取头。 数据存储设备可以存储更大量的数据，而不需要移动机械系统。

公开(公告)号：US20080257861A1

公开(公告)日：2008-10-23

申请号：US11882112

申请日：2007-07-30

申请人： In-kyeong Yoo ,  Soo-hwan Jeong ,  Sun-ae Seo ,  In-sook Kim

发明人： In-kyeong Yoo ,  Soo-hwan Jeong ,  Sun-ae Seo ,  In-sook Kim

IPC分类号： B44C1/22

CPC分类号： B82B3/00 ,  B29C59/022 ,  B29C59/026 ,  B29C2059/023 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  H01L21/32139

摘要： A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.

摘要翻译： 提供一种制造纳米通道阵列的方法和使用纳米通道阵列制造纳米点的方法。 纳米通道阵列制造方法包括：执行第一阳极氧化以形成具有由铝基板上的多个空腔形成的沟道阵列的第一氧化铝层; 将第一氧化铝层蚀刻到预定深度并在铝基板上形成多个凹部，其中每个凹部对应于第一氧化铝层的每个通道的底部; 以及进行第二阳极氧化以形成具有与所述铝基板上的所述多个凹部对应的多个通道的阵列的第二氧化铝层。 阵列制造方法使得可以使用空腔获得精细排列的空腔并形成纳米级点。