DISPOSABLE CARBON-BASED TEMPLATE LAYER FOR FORMATION OF BORDERLESS CONTACT STRUCTURES
    25.
    发明申请
    DISPOSABLE CARBON-BASED TEMPLATE LAYER FOR FORMATION OF BORDERLESS CONTACT STRUCTURES 审中-公开
    用于形成无边界接触结构的基于碳的基于模板的层

    公开(公告)号:US20140051239A1

    公开(公告)日:2014-02-20

    申请号:US13585337

    申请日:2012-08-14

    IPC分类号: H01L21/28

    摘要: After formation of gate stacks, a carbon-based template layer is deposited over the gate stacks, and is optionally planarized to provide a planar top surface. A hard mask layer and a photoresist layer are subsequently formed above the carbon-based template layer. A pattern including openings is formed within the photoresist layer. The pattern is subsequently transferred through the hard mask layer and the carbon-based template layer with high selectivity to gate spacers to form self-aligned cavities within the carbon-based template layer. Contact structures are formed within the carbon-based template layer by a damascene method. The hard mask layer and the carbon-based template layer are subsequently removed selective to the contact structures. The contact structures can be formed as contact bar structures or contact via structures. Optionally, a contact-level dielectric layer can be subsequently deposited.

    摘要翻译: 在形成栅极叠层之后,在栅极堆叠上沉积碳基模板层,并且可选地平面化以提供平坦的顶表面。 随后在碳基模板层之上形成硬掩模层和光致抗蚀剂层。 在光致抗蚀剂层内形成包括开口的图案。 该图案随后通过硬掩模层和碳基模板层以高选择性的方式转移到栅极间隔物上,以在碳基模板层内形成自对准空穴。 通过镶嵌方法在碳基模板层内形成接触结构。 随后对该接触结构选择性地除去硬掩模层和碳基模板层。 接触结构可以形成为接触棒结构或接触通孔结构。 任选地,可随后沉积接触电介质层。

    Fin field effect transistor devices with self-aligned source and drain regions
    26.
    发明授权
    Fin field effect transistor devices with self-aligned source and drain regions 有权
    Fin场效应晶体管器件具有自对准的源极和漏极区域

    公开(公告)号:US08592280B2

    公开(公告)日:2013-11-26

    申请号:US12544939

    申请日:2009-08-20

    IPC分类号: H01L29/78 H01L21/336

    摘要: Improved fin field effect transistor (FinFET) devices and methods for the fabrication thereof are provided. In one aspect, a method for fabricating a field effect transistor device comprises the following steps. A substrate is provided having a silicon layer thereon. A fin lithography hardmask is patterned on the silicon layer. A dummy gate structure is placed over a central portion of the fin lithography hardmask. A filler layer is deposited around the dummy gate structure. The dummy gate structure is removed to reveal a trench in the filler layer, centered over the central portion of the fin lithography hardmask, that distinguishes a fin region of the device from source and drain regions of the device. The fin lithography hardmask in the fin region is used to etch a plurality of fins in the silicon layer. The trench is filled with a gate material to form a gate stack over the fins. The filler layer is removed to reveal the source and drain regions of the device, wherein the source and drain regions are intact and self-aligned with the gate stack.

    摘要翻译: 提供了改进的鳍状场效应晶体管(FinFET)器件及其制造方法。 一方面,一种用于制造场效应晶体管器件的方法包括以下步骤。 提供其上具有硅层的衬底。 翅片光刻硬掩模在硅层上图案化。 虚拟栅极结构放置在散热片光刻硬掩模的中心部分上。 填充层沉积在伪栅极结构周围。 去除伪栅极结构以在填充层中露出位于散热片光刻硬掩模的中心部分上方的沟槽,其将器件的鳍片区域与器件的源极和漏极区域区分开。 翅片区域中的翅片光刻硬掩模用于蚀刻硅层中的多个翅片。 沟槽填充有栅极材料,以在鳍片上形成栅极叠层。 去除填充层以露出器件的源极和漏极区域,其中源极和漏极区域是完整的并且与栅极堆叠自对准。

    RECESSED SOURCE AND DRAIN REGIONS FOR FINFETS
    28.
    发明申请
    RECESSED SOURCE AND DRAIN REGIONS FOR FINFETS 有权
    受灾源和漏电区域

    公开(公告)号:US20130175624A1

    公开(公告)日:2013-07-11

    申请号:US13611335

    申请日:2012-09-12

    IPC分类号: H01L29/78

    CPC分类号: H01L29/66795 H01L29/785

    摘要: Semiconductor devices and methods that include forming a fin field effect transistor by defining a fin hardmask on a semiconductor layer, forming a dummy structure over the fin hardmask to establish a planar area on the semiconductor layer, removing a portion of the fin hardmask that extends beyond the dummy structure, etching a semiconductor layer adjacent to the dummy structure to produce recessed source and drain regions, removing the dummy structure, etching the semiconductor layer in the planar area to produce fins, and forming a gate stack over the fins.

    摘要翻译: 半导体器件和方法包括通过在半导体层上限定翅片硬掩模来形成鳍状场效应晶体管,在散热片硬掩模上形成虚拟结构,以在半导体层上建立平面区域,去除超出鳍片硬掩模的一部分 蚀刻与虚拟结构相邻的半导体层,以产生凹陷的源极和漏极区域,去除虚设结构,蚀刻平面区域中的半导体层以产生鳍片,以及在鳍片上形成栅极叠层。

    HIGH SELECTIVITY NITRIDE ETCH PROCESS
    29.
    发明申请
    HIGH SELECTIVITY NITRIDE ETCH PROCESS 有权
    高选择性氮气蚀刻过程

    公开(公告)号:US20130105916A1

    公开(公告)日:2013-05-02

    申请号:US13281688

    申请日:2011-10-26

    摘要: An anisotropic silicon nitride etch provides selectivity to silicon and silicon oxide by forming a fluorohydrocarbon-containing polymer on silicon surfaces and silicon oxide surfaces. Selective fluorohydrocarbon deposition is employed to provide selectivity to non-nitride surfaces. The fluorohydrocarbon-containing polymer interacts with silicon nitride to form a volatile compound, thereby enabling etching of silicon nitride. The fluorohydrocarbon-containing polymer interacts with silicon oxide at a low reaction rate, retarding, or completely stopping, the etching of silicon oxide. The fluorohydrocarbon-containing polymer does not interact with silicon, and protects silicon from the plasma. The anisotropic silicon nitride etch can be employed to etch silicon nitride selective to silicon and silicon oxide in any dimension, including small dimensions less than 50 nm.

    摘要翻译: 各向异性氮化硅蚀刻通过在硅表面和氧化硅表面上形成含氟代烃的聚合物来提供对硅和氧化硅的选择性。 使用选择性氟代烃沉积来提供对非氮化物表面的选择性。 含氟烃聚合物与氮化硅相互作用以形成挥发性化合物,从而能够蚀刻氮化硅。 含氟烃聚合物以低反应速率与氧化硅相互作用,阻止或完全停止氧化硅的蚀刻。 含氟烃聚合物不与硅相互作用,并保护硅免受等离子体的影响。 可以采用各向异性氮化硅蚀刻来蚀刻任选尺寸的硅和氧化硅的氮化硅,包括小于50nm的小尺寸。