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    Arrays Of Capacitors, Methods Used In Forming Integrated Circuitry, And Methods Used In Forming An Array Of Capacitors
    21.
    发明申请
    Arrays Of Capacitors, Methods Used In Forming Integrated Circuitry, And Methods Used In Forming An Array Of Capacitors 有权

    公开(公告)号：US20220059536A1

    公开(公告)日：2022-02-24

    申请号：US17516864

    申请日：2021-11-02

    Applicant: Micron Technology, Inc.

    Inventor： Scott L. Light

    IPC: H01L27/108 ,  H01L27/11502 ,  H01L49/02

    Abstract: A method used in forming integrated circuitry comprises forming an array of structures elevationally through a stack comprising first and second materials. The structures project vertically relative to an outermost portion of the first material. Energy is directed onto vertically-projecting portions of the structures and onto the second material in a direction that is angled from vertical and that is along a straight line between immediately-adjacent of the structures to form openings into the second material that are individually between the immediately-adjacent structures along the straight line. Other embodiments, including structure independent of method, are disclosed.

    Arrays Of Capacitors, Methods Used In Forming Integrated Circuitry, And Methods Used In Forming An Array Of Capacitors
    22.
    发明申请
    Arrays Of Capacitors, Methods Used In Forming Integrated Circuitry, And Methods Used In Forming An Array Of Capacitors 审中-公开

    公开(公告)号：US20200373303A1

    公开(公告)日：2020-11-26

    申请号：US16420582

    申请日：2019-05-23

    Applicant: Micron Technology, Inc.

    Inventor： Scott L. Light

    IPC: H01L27/108 ,  H01L27/11502

    Abstract: A method used in forming integrated circuitry comprises forming an array of structures elevationally through a stack comprising first and second materials. The structures project vertically relative to an outermost portion of the first material. Energy is directed onto vertically-projecting portions of the structures and onto the second material in a direction that is angled from vertical and that is along a straight line between immediately-adjacent of the structures to form openings into the second material that are individually between the immediately-adjacent structures along the straight line. Other embodiments, including structure independent of method, are disclosed.

    Semiconductor constructions comprising dielectric material
    24.
    发明授权
    Semiconductor constructions comprising dielectric material 有权

    公开(公告)号：US10153195B1

    公开(公告)日：2018-12-11

    申请号：US15598795

    申请日：2017-05-18

    Applicant: Micron Technology, Inc.

    Inventor： Gurtej S. Sandhu ,  Scott L. Light ,  John A. Smythe ,  Sony Varghese

    IPC: H01L21/70 ,  H01L21/762 ,  H01L21/02 ,  H01L21/3105 ,  H01L29/06 ,  G03F7/075 ,  G03F7/038 ,  G03F7/039 ,  G03F7/20 ,  G03F7/30

    Abstract: Some embodiments include a semiconductor construction which has one or more openings extending into a substrate. The openings are at least partially filled with dielectric material comprising silicon, oxygen and carbon. The carbon is present to a concentration within a range of from about 3 atomic percent to about 20 atomic percent. Some embodiments include a method of providing dielectric fill across a semiconductor construction having an opening extending therein. The semiconductor construction has an upper surface proximate the opening. The method includes forming photopatternable dielectric material within the opening and across the upper surface, and exposing the photopatternable dielectric material to patterned actinic radiation. Subsequently, the photopatternable dielectric material is developed to pattern the photopatternable dielectric material into a first dielectric structure which at least partially fills the opening, and to remove the photopatternable dielectric material from over the upper surface.

    Methods of forming a pattern on a substrate
    25.
    发明授权
    Methods of forming a pattern on a substrate 有权
    在基板上形成图案的方法

    公开(公告)号：US08969214B2

    公开(公告)日：2015-03-03

    申请号：US13893546

    申请日：2013-05-14

    Applicant: Micron Technology, Inc.

    Inventor： Scott L. Light ,  Kyle Armstrong ,  Michael D. Hyatt ,  Vishal Sipani

    IPC: H01L21/302 ,  H01L21/308

    CPC classification number: H01L21/3086 ,  H01L21/0337

    Abstract: A method of forming a pattern on a substrate includes forming spaced first features derived from a first lithographic patterning step. Sidewall spacers are formed on opposing sides of the first features. After forming the sidewall spacers, spaced second features derived from a second lithographic patterning step are formed. At least some of individual of the second features are laterally between and laterally spaced from immediately adjacent of the first features in at least one straight-line vertical cross-section that passes through the first and second features. After the second lithographic patterning step, all of only some of the sidewall spacers in said at least one cross-section is removed.

    Abstract translation: 在衬底上形成图案的方法包括形成从第一平版印刷图案化步骤导出的间隔开的第一特征。 侧壁间隔件形成在第一特征的相对侧上。 在形成侧壁间隔物之后，形成从第二平版印刷图案化步骤得到的隔开的第二特征。 第二特征中的至少一些个体在穿过第一和第二特征的至少一个直线垂直横截面中在第一特征之间横向间隔开并且横向间隔开。 在第二平版印刷图案化步骤之后，所有至少一个横截面中的所有侧壁间隔物都被去除。

    Semiconductor Constructions And Methods Of Forming Patterns
    26.
    发明申请
    Semiconductor Constructions And Methods Of Forming Patterns 有权
    半导体结构和形成方式

    公开(公告)号：US20130302981A1

    公开(公告)日：2013-11-14

    申请号：US13941747

    申请日：2013-07-15

    Applicant: Micron Technology, Inc.

    Inventor： Dan Millward ,  Kaveri Jain ,  Zishu Zhang ,  Lijing Gou ,  Anton J. deVilliers ,  Jianming Zhou ,  Yuan He ,  Michael D. Hyatt ,  Scott L. Light

    IPC: H01L21/768

    CPC classification number: H01L21/76879 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/76816 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/10882 ,  H01L27/10888

    Abstract: Some embodiments include methods of forming patterns. A semiconductor substrate is formed to comprise an electrically insulative material over a set of electrically conductive structures. An interconnect region is defined across the electrically conductive structures, and regions on opposing sides of the interconnect region are defined as secondary regions. A two-dimensional array of features is formed over the electrically insulative material. The two-dimensional array extends across the interconnect region and across the secondary regions. A pattern of the two-dimensional array is transferred through the electrically insulative material of the interconnect region to form contact openings that extend through the electrically insulative material and to the electrically conductive structures, and no portions of the two-dimensional array of the secondary regions is transferred into the electrically insulative material.

    Abstract translation: 一些实施例包括形成图案的方法。 半导体衬底被形成为在一组导电结构之上包括电绝缘材料。 跨导电结构限定互连区域，并且互连区域的相对侧上的区域被定义为次级区域。 特征的二维阵列形成在电绝缘材料上。 二维阵列跨越互连区域并跨越次级区域延伸。 二维阵列的图案通过互连区域的电绝缘材料转移以形成延伸穿过电绝缘材料和导电结构的接触开口，并且二次区域的二维阵列的任何部分 被转移到电绝缘材料中。

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