High deposition rate recipe for low dielectric constant films
    21.
    发明授权
    High deposition rate recipe for low dielectric constant films 失效
    低介电常数薄膜的高沉积速率配方

    公开(公告)号:US6136685A

    公开(公告)日:2000-10-24

    申请号:US868595

    申请日:1997-06-03

    Abstract: An insulating film with a low dielectric constant is more quickly formed on a substrate by reducing the co-etch rate as the film is deposited. The process gas is formed into a plasma from silicon-containing and fluorine-containing gases. The plasma is biased with an RF field to enhance deposition of the film. Deposition and etching occur simultaneously. The relative rate of deposition to etching is increased in the latter portion of the deposition process by decreasing the bias RF power, which decreases the surface temperature of the substrate and decreases sputtering and etching activities. Processing time is reduced compared to processes with fixed RF power levels. Film stability, retention of water by the film, and corrosion of structures on the substrate are all improved. The film has a relatively uniform and low dielectric constant and may fill trenches with aspect ratios of at least 4:1 and gaps less than 0.5 .mu.m.

    Abstract translation: 当薄膜沉积时,通过降低共蚀刻速率,在衬底上更迅速地形成具有低介电常数的绝缘膜。 工艺气体由含硅和含氟气体形成等离子体。 等离子体被RF场偏置以增强膜的沉积。 沉积和蚀刻同时发生。 通过降低偏压RF功率,沉积过程的后一部分,相对于蚀刻的相对速率增加,这降低了衬底的表面温度并降低了溅射和蚀刻活性。 与具有固定RF功率级别的处理相比,处理时间缩短。 薄膜的稳定性,薄膜的水分保持性以及基板上的结构的腐蚀都得到改善。 该膜具有相对均匀和低的介电常数,并且可以填充具有至少4:1的纵横比和小于0.5μm的间隙的沟槽。

    Wire holder and terminal connector for hot wire chemical vapor deposition chamber
    23.
    发明授权
    Wire holder and terminal connector for hot wire chemical vapor deposition chamber 有权
    用于热线化学气相沉积室的线架和端子连接器

    公开(公告)号:US08662941B2

    公开(公告)日:2014-03-04

    申请号:US13454317

    申请日:2012-04-24

    CPC classification number: C23C16/52 C23C16/44

    Abstract: Apparatus for supporting the wires in a hot wire chemical vapor deposition (HWCVD) system are provided herein. In some embodiments, a terminal connector for a hot wire chemical vapor deposition (HWCVD) system may include a base; a wire clamp moveably disposed with relation to the base along an axis; a reflector shield extending from the wire clamp in a first direction along the axis; and a tensioner coupled to the base and wire clamp to bias the wire clamp in a second direction opposite the first direction.

    Abstract translation: 本文提供了用于在热线化学气相沉积(HWCVD)系统中支撑电线的装置。 在一些实施例中,用于热线化学气相沉积(HWCVD)系统的终端连接器可以包括基座; 线夹,其相对于所述基部沿着轴线可移动地设置; 沿着所述轴线沿着第一方向从所述线夹延伸的反射器护罩; 以及张紧器,其联接到所述基座和线夹,以在与所述第一方向相反的第二方向偏置所述线夹。

    Apparatuses for atomic layer deposition
    24.
    发明授权
    Apparatuses for atomic layer deposition 有权
    用于原子层沉积的装置

    公开(公告)号:US08343279B2

    公开(公告)日:2013-01-01

    申请号:US11127753

    申请日:2005-05-12

    Abstract: Embodiments of the invention provide apparatuses and methods for depositing materials on substrates during vapor deposition processes, such as atomic layer deposition (ALD). In one embodiment, a chamber contains a substrate support with a receiving surface and a chamber lid containing an expanding channel formed within a thermally insulating material. The chamber further includes at least one conduit coupled to a gas inlet within the expanding channel and positioned to provide a gas flow through the expanding channel in a circular direction, such as a vortex, a helix, a spiral or derivatives thereof. The expanding channel may be formed directly within the chamber lid or formed within a funnel liner attached thereon. The chamber may contain a retaining ring, an upper process liner, a lower process liner or a slip valve liner. Liners usually have a polished surface finish and contain a thermally insulating material such as fused quartz or ceramic. In an alternative embodiment, a deposition system contains a catalytic water vapor generator connected to an ALD chamber.

    Abstract translation: 本发明的实施例提供了在诸如原子层沉积(ALD)的气相沉积工艺期间在衬底上沉积材料的设备和方法。 在一个实施例中,腔室包含具有接收表面的衬底支撑件和包含形成在绝热材料内的扩张通道的腔室盖。 腔室还包括至少一个管道,其连接到膨胀通道内的气体入口并且定位成提供在圆形方向(例如涡流,螺旋,螺旋或其衍生物)上的气流通过膨胀通道。 膨胀通道可以直接形成在室盖内,或者形成在其内附着的漏斗衬套中。 腔室可以包含保持环,上加工衬套,下工艺衬垫或滑阀衬套。 衬里通常具有抛光表面光洁度并且包含绝热材料,例如熔融石英或陶瓷。 在替代实施例中,沉积系统包含连接到ALD室的催化水蒸汽发生器。

    METHODS FOR ATOMIC LAYER DEPOSITION OF HAFNIUM-CONTAINING HIGH-K DIELECTRIC MATERIALS
    25.
    发明申请
    METHODS FOR ATOMIC LAYER DEPOSITION OF HAFNIUM-CONTAINING HIGH-K DIELECTRIC MATERIALS 失效
    含铪高K介电材料的原子层沉积方法

    公开(公告)号:US20080044569A1

    公开(公告)日:2008-02-21

    申请号:US11925681

    申请日:2007-10-26

    Abstract: Embodiments of the invention provide methods for depositing materials on substrates during vapor deposition processes, such as atomic layer deposition (ALD). In one embodiment, a chamber contains a substrate support with a receiving surface and a chamber lid containing an expanding channel formed within a thermally insulating material. The chamber further includes at least one conduit coupled to a gas inlet within the expanding channel and positioned to provide a gas flow through the expanding channel in a circular direction, such as a vortex, a helix, a spiral, or derivatives thereof. The expanding channel may be formed directly within the chamber lid or formed within a funnel liner attached thereon. The chamber may contain a retaining ring, an upper process liner, a lower process liner or a slip valve liner. Liners usually have a polished surface finish and contain a thermally insulating material such as fused quartz or ceramic. In an alternative embodiment, a deposition system contains a catalytic water vapor generator connected to an ALD chamber.

    Abstract translation: 本发明的实施例提供了在诸如原子层沉积(ALD)的气相沉积工艺期间在衬底上沉积材料的方法。 在一个实施例中,腔室包含具有接收表面的衬底支撑件和包含形成在绝热材料内的扩张通道的腔室盖。 腔室还包括至少一个管道,其连接到膨胀通道内的气体入口并且定位成提供在圆形方向(例如涡流,螺旋,螺旋或其衍生物)上的气体流过膨胀通道。 膨胀通道可以直接形成在室盖内,或者形成在其内附着的漏斗衬套中。 腔室可以包含保持环,上加工衬套,下工艺衬垫或滑阀衬套。 衬里通常具有抛光表面光洁度并且包含绝热材料,例如熔融石英或陶瓷。 在替代实施例中,沉积系统包含连接到ALD室的催化水蒸汽发生器。

    Processes for making a barrier between a dielectric and a conductor and products produced therefrom
    26.
    发明授权
    Processes for making a barrier between a dielectric and a conductor and products produced therefrom 有权
    用于在电介质和导体之间形成屏障的工艺以及由其制造的产品

    公开(公告)号:US06677254B2

    公开(公告)日:2004-01-13

    申请号:US09911947

    申请日:2001-07-23

    CPC classification number: H01L28/40 H01L21/3143 H01L21/31604 H01L28/56

    Abstract: The formation of a barrier layer over a high k dielectric layer and deposition of a conducting layer over the barrier layer prevents intermigration between the species of the high k dielectric layer and the conducting layer and prevents oxygen scavenging of the high k dielectric layer. One example of a capacitor stack device provided includes a high k dielectric layer of Ta2O5, a barrier layer of TaON or TiON formed at least in part by a remote plasma process, and a top electrode of TiN. The processes may be conducted at about 300 to 700° C. and are thus useful for low thermal budget applications. Also provided are MIM capacitor constructions and methods in which an insulator layer is formed by remote plasma oxidation of a bottom electrode.

    Abstract translation: 在高k电介质层上形成阻挡层并且在阻挡层上沉积导电层可防止高k电介质层与导电层之间的迁移,并防止高k介电层的氧清除。 提供的电容器堆叠装置的一个示例包括Ta 2 O 5的高k电介质层,至少部分由远程等离子体工艺形成的TaON或TiON的阻挡层和TiN的顶部电极。 该方法可以在约300-700℃下进行,因此可用于低热预算应用。 还提供了MIM电容器结构和其中通过底部电极的远程等离子体氧化形成绝缘体层的方法。

    Method for reducing the intrinsic stress of high density plasma films
    29.
    发明授权
    Method for reducing the intrinsic stress of high density plasma films 失效
    降低高密度等离子体膜的固有应力的方法

    公开(公告)号:US5976993A

    公开(公告)日:1999-11-02

    申请号:US623445

    申请日:1996-03-28

    Abstract: A layer of reduced stress is formed on a substrate using an HDP-CVD system by delaying or interrupting the application of capacitively coupled RF energy. The layer is formed by introducing a process gas into the HDP system chamber and forming a plasma from the process gas by the application of RF power to an inductive coil. After a selected period, a second layer of the film is deposited by maintaining the inductively-coupled plasma and biasing the plasma toward the substrate to enhance the sputtering effect of the plasma. In a preferred embodiment, the deposited film is a silicon oxide film, and biasing is performed by application of capacitively coupled RF power from RF generators to a ceiling plate electrode and wafer support electrode.

    Abstract translation: 通过延迟或中断电容耦合RF能量的应用,使用HDP-CVD系统在衬底上形成一层减小的应力。 通过将工艺气体引入HDP系统室并通过将RF功率施加到感应线圈从工艺气体形成等离子体而形成该层。 在选定的时间段之后,通过维持电感耦合等离子体并且将等离子体偏压到衬底来沉积膜的第二层,以增强等离子体的溅射效应。 在优选实施例中,沉积膜是氧化硅膜,并且通过将来自RF发生器的电容耦合的RF功率施加到顶板电极和晶片支撑电极来执行偏置。

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