公开(公告)号：US09905500B2

公开(公告)日：2018-02-27

申请号：US15202826

申请日：2016-07-06

Applicant: Semiconductor Components Industries, LLC

Inventor： Balaji Padmanabhan ,  Prasad Venkatraman ,  Ali Salih ,  Mihir Mudholkar ,  Chun-Li Liu ,  Jason McDonald

IPC: H01L23/00 ,  H01L23/495

CPC classification number: H01L23/49575 ,  H01L23/49503 ,  H01L23/4951 ,  H01L23/49524 ,  H01L23/49531 ,  H01L23/49534 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49558 ,  H01L23/49562 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L2224/40105 ,  H01L2224/40139 ,  H01L2224/40245 ,  H01L2224/41109 ,  H01L2224/41112 ,  H01L2224/41174 ,  H01L2224/48245 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2224/37099 ,  H01L2224/45099

Abstract: In accordance with an embodiment, a semiconductor component includes a support having a first device receiving structure and a second device receiving structure and a contact extension that is common to the first and second device receiving structures. The first device receiving structure includes a device receiving area and the second device receiving structure includes a drain contact area. A III-N based semiconductor chip has a drain bond pad bonded to the drain contact area and a source bond pad bonded to the contact extension and a gate bond pad bonded to an interconnect. A portion of the silicon based semiconductor chip is bonded to the support device receiving area. In accordance with another embodiment, a method for manufacturing the semiconductor component includes coupling a III-N based semiconductor chip to a portion of the support a silicon based semiconductor chip to another portion of the support.

公开(公告)号：US09773895B2

公开(公告)日：2017-09-26

申请号：US15133644

申请日：2016-04-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji Padmanabhan ,  Prasad Venkatraman ,  Peter Moens ,  Mihir Mudholkar ,  Joe Fulton ,  Philip Celaya ,  Stephen St. Germain ,  Chun-Li Liu ,  Jason McDonald ,  Alexander Young ,  Ali Salih

IPC: H01L29/15 ,  H01L29/747 ,  H01L29/74 ,  H01L23/495 ,  H01L29/205 ,  H01L29/40 ,  H01L29/423 ,  H01L29/778 ,  H01L25/11 ,  H03K17/687 ,  H01L23/00 ,  H01L27/088 ,  H01L21/8258 ,  H01L27/06

CPC classification number: H01L29/747 ,  H01L21/8258 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/40 ,  H01L25/115 ,  H01L25/18 ,  H01L27/0629 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/205 ,  H01L29/404 ,  H01L29/4238 ,  H01L29/7416 ,  H01L29/742 ,  H01L29/7786 ,  H01L29/7787 ,  H01L2224/0603 ,  H01L2224/40245 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2924/00014 ,  H03K17/6874 ,  H03K2017/6878 ,  H03K2217/0009 ,  H03K2217/0018 ,  H01L2224/37099

Abstract: A half-bridge circuit can include a high-side HEMT, a high-side switch transistor, a low-side HEMT, and a low-side switch transistor. The die substrates of the HEMTs can be coupled to the sources of their corresponding switch transistors. In another aspect, a packaged electronic device for a half-bridge circuit can have a design that can use shorter connectors that help to reduce parasitic inductance and resistance. In a further aspect, a packaged electronic device for a half-bridge circuit can include more than one connection along the bottom of the package allows less lead connections along the periphery of the packaged electronic device and can allow for a smaller package.

公开(公告)号：US20170025327A1

公开(公告)日：2017-01-26

申请号：US15205693

申请日：2016-07-08

Applicant: Semiconductor Components Industries, LLC

Inventor： Balaji Padmanabhan ,  Ali Salih ,  Prasad Venkatraman ,  Chun-Li Liu

IPC: H01L23/495 ,  H01L23/00

CPC classification number: H01L23/4951 ,  H01L23/49524 ,  H01L23/49531 ,  H01L23/49544 ,  H01L23/49562 ,  H01L24/09 ,  H01L24/89 ,  H01L2224/0916 ,  H01L2224/09181 ,  H01L2224/80001

Abstract: In accordance with an embodiment, a semiconductor component includes a support having first and second device receiving structures. A semiconductor device configured from a III-N semiconductor material is coupled to the support, wherein the semiconductor device has opposing surfaces. A first bond pad extends from a first portion of the first surface, a second bond pad extends from a second portion of the first surface, and a third bond pad extends from a third portion of the first surface. The first bond pad is coupled to the first device receiving portion, the drain bond pad is coupled to the second device receiving portion, and the third bond pad is coupled to the third lead. In accordance with another embodiment, a method includes coupling a semiconductor chip comprising a III-N semiconductor substrate material to a support.

公开(公告)号：US11621331B2

公开(公告)日：2023-04-04

申请号：US17016682

申请日：2020-09-10

Applicant: Semiconductor Components Industries, LLC

Inventor： Gary Horst Loechelt ,  Balaji Padmanabhan ,  Dean E. Probst ,  Tirthajyoti Sarkar ,  Prasad Venkatraman ,  Muh-Ling Ger

IPC: H01L29/40 ,  H01L23/528 ,  H01L29/739 ,  H01L29/10 ,  H01L29/06

Abstract: A circuit and physical structure can help to counteract non-linear COSS associated with power transistors that operate at higher switching speeds and lower RDSON. In an embodiment, a component with a pn junction can be coupled to an n-channel IGFET. The component can include a p-channel IGFET, a pnp bipolar transistor, or both. A gate/capacitor electrode can be within a trench that is adjacent to the active regions of the component and n-channel IGFET, where the active regions can be within a semiconductor pillar. The combination of a conductive member and the semiconductor pillar of the component can be a charge storage component. The physical structure may include a compensation region, a barrier doped region, or both. In a particular embodiment, doped surface regions can be coupled to a buried conductive region without the use of a topside interconnect or a deep collector type of structure.

公开(公告)号：US20190305123A1

公开(公告)日：2019-10-03

申请号：US16287400

申请日：2019-02-27

Applicant: Semiconductor Components Industries, LLC

Inventor： Woochul Jeon ,  Balaji Padmanabhan

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/205 ,  H01L29/423 ,  H01L27/06 ,  H03K17/687

Abstract: An electronic device can include an enhancement-mode high electron mobility transistor (HEMT) that includes a source electrode; a drain electrode; and a gate. In an embodiment, the gate can correspond to spaced-apart gate electrodes and a space disposed between the spaced-apart gate electrodes, wherein the first space has a width configured such that, a continuous depletion region forms across all of the width of the first space. In another embodiment, the gate can be a gate electrode having a nonuniform thickness along a line in a gate width direction. In another aspect, a method of using the electronic device can include, during a transient period when the HEMT is in an off-state, flowing current from the drain electrode to the source electrode when Vds>−Vth+Vgs.

公开(公告)号：US10326011B2

公开(公告)日：2019-06-18

申请号：US15730897

申请日：2017-10-12

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Peter Moens ,  Balaji Padmanabhan ,  Herbert De Vleeschouwer ,  Prasad Venkatraman

IPC: H01L27/088 ,  H01L29/40 ,  H01L29/747 ,  H01L29/74 ,  H01L23/495 ,  H01L29/205 ,  H01L29/423 ,  H01L29/778 ,  H01L25/11 ,  H03K17/687 ,  H01L23/00 ,  H01L25/18 ,  H01L21/8258 ,  H01L27/06

Abstract: An electronic device can include a bidirectional HEMT. In an aspect, the electronic device can include a pair of switch gate and blocking gate electrodes, wherein the switch gate electrodes are not electrically connected to the blocking gate electrodes, and the first blocking, first switch, second blocking, and second switch gate electrodes are on the same die. In another aspect, the electronic device can include shielding structures having different numbers of laterally extending portions. In a further aspect, the electronic device can include a gate electrode and a shielding structure, wherein a portion of the shielding structure defines an opening overlying the gate electrode.

公开(公告)号：US10217737B2

公开(公告)日：2019-02-26

申请号：US15648264

申请日：2017-07-12

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji Padmanabhan ,  Prasad Venkatraman ,  Zia Hossain ,  Chun-Li Liu ,  Woochul Jeon ,  Jason Mcdonald

IPC: H01L29/66 ,  H01L27/06 ,  H01L27/02 ,  H01L23/367 ,  H01L29/417 ,  H01L29/778 ,  H01L29/10 ,  H01L21/8258 ,  H01L21/74 ,  H01L29/872 ,  H01L23/48 ,  H01L29/861 ,  H01L29/20

Abstract: In one embodiment, a cascode rectifier structure includes a group III-V semiconductor structure includes a heterostructure disposed on a semiconductor substrate. A first current carrying electrode and a second current carrying electrode are disposed adjacent a major surface of the heterostructure and a control electrode is disposed between the first and second current carrying electrode. A rectifier device is integrated with the group III-V semiconductor structure and is electrically connected to the first current carrying electrode and to a third electrode. The control electrode is further electrically connected to the semiconductor substrate and the second current path is generally perpendicular to a primary current path between the first and second current carrying electrodes. The cascode rectifier structure is configured as a two terminal device.

公开(公告)号：US20180342448A1

公开(公告)日：2018-11-29

申请号：US16036560

申请日：2018-07-16

Applicant: Semiconductor Components Industries, LLC

Inventor： Balaji Padmanabhan ,  Ali Salih ,  Prasad Venkatraman

IPC: H01L23/495 ,  H01L21/48 ,  H01L23/00 ,  H01L23/373

Abstract: In accordance with an embodiment, a semiconductor component includes a support and a plurality of leads. An insulated metal substrate having a first portion and a second portion bonded to the support. A semiconductor chip comprising a III-N semiconductor material is bonded to the first portion of the insulated metal substrate and a first electrical interconnect is coupled between a drain bond pad the first portion of the insulated metal substrate. A second semiconductor chip is bonded to the first electrical interconnect. A second electrical interconnect coupled between a lead of the plurality of leads and the second semiconductor chip. In accordance with another embodiment, a method of manufacturing a semiconductor component includes coupling a first semiconductor chip to a first electrically conductive layer and coupling a second semiconductor chip to a second electrically conductive layer.

公开(公告)号：US09882020B2

公开(公告)日：2018-01-30

申请号：US15209541

申请日：2016-07-13

Applicant: Semiconductor Components Industries, LLC

Inventor： Balaji Padmanabhan ,  Prasad Venkatraman

IPC: H01L29/15 ,  H01L31/0256 ,  H01L29/66 ,  H01L29/78 ,  H01L29/417 ,  H01L29/20 ,  H01L29/205 ,  H01L29/778 ,  H01L27/02

CPC classification number: H01L29/66462 ,  H01L27/0266 ,  H01L29/0696 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/404 ,  H01L29/407 ,  H01L29/41758 ,  H01L29/66537 ,  H01L29/66704 ,  H01L29/7787 ,  H01L29/7823 ,  H01L29/7825

Abstract: In accordance with an embodiment, a cascode connected semiconductor component and a method for manufacturing the cascode connected semiconductor component are provided. The cascode connected semiconductor component has a pair of silicon based transistors, each having a body region, a gate region over the body region, a source region and a drain. The source regions of a first and second silicon based transistor are electrically connected together and the drain regions of the first and second silicon based transistors are electrically connected together. The gate region of the second silicon based transistor is connected to the drain regions of the first and second silicon based transistors. The body region of the second silicon based transistor has a dopant concentration that is greater than the dopant concentration of the first silicon based transistor. A gallium nitride based transistor has a source region coupled to the first and second silicon based transistor.

公开(公告)号：US09837399B2

公开(公告)日：2017-12-05

申请号：US15197255

申请日：2016-06-29

Applicant: Semiconductor Components Industries, LLC

Inventor： Balaji Padmanabhan ,  Prasad Venkatraman ,  Chun-Li Liu ,  Ali Salih

IPC: H01L27/02 ,  H01L29/20 ,  H01L29/16 ,  H01L21/8258 ,  H01L29/778 ,  H01L27/06 ,  H01L29/861

CPC classification number: H01L27/0266 ,  H01L21/8258 ,  H01L27/0255 ,  H01L27/0629 ,  H01L29/16 ,  H01L29/2003 ,  H01L29/7787 ,  H01L29/861

Abstract: In accordance with an embodiment, semiconductor component having a compound semiconductor material based semiconductor device connected to a silicon based semiconductor device and a protection element, wherein the silicon based semiconductor device is a transistor. The protection element is coupled in parallel across the silicon based semiconductor device and may be a resistor, a diode, or a transistor. In accordance with another embodiment, the silicon based semiconductor device is a diode. The compound semiconductor material may be shorted to a source of potential such as, for example, ground, with a shorting element.