-
公开(公告)号：US08709880B2
公开(公告)日：2014-04-29
申请号：US13314435
申请日：2011-12-08
IPC分类号： H01L21/82 , H01L21/8226 , H01L21/822 , H01L25/18 , H01L27/06
CPC分类号： H01L27/088 , G11C17/14 , H01L21/76254 , H01L21/8221 , H01L21/8226 , H01L21/84 , H01L23/481 , H01L23/5252 , H01L23/528 , H01L23/53214 , H01L23/53228 , H01L23/544 , H01L24/14 , H01L24/45 , H01L24/48 , H01L25/0657 , H01L25/18 , H01L27/0207 , H01L27/0688 , H01L27/0694 , H01L27/092 , H01L27/105 , H01L27/10873 , H01L27/10876 , H01L27/10897 , H01L27/11 , H01L27/1108 , H01L27/112 , H01L27/11206 , H01L27/11803 , H01L2223/5442 , H01L2223/54426 , H01L2223/54453 , H01L2224/32145 , H01L2224/45124 , H01L2224/45147 , H01L2224/48091 , H01L2224/73265 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06541 , H01L2225/06589 , H01L2924/00011 , H01L2924/00014 , H01L2924/01019 , H01L2924/01066 , H01L2924/01322 , H01L2924/10253 , H01L2924/12032 , H01L2924/12036 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/15788 , H01L2924/181 , H01L2924/3011 , H01L2924/3025 , H03K17/687 , H03K19/0948 , H03K19/177 , H01L2924/00 , H01L2224/80001 , H01L2224/05599 , H01L2924/00012
摘要： A method of manufacturing semiconductor devices: providing a first device including a first die and second die, where the first die is diced from a first wafer, the second die is diced from a second wafer, the first die is connected to the second die using at least one through-silicon-via; providing a second device including a third die and fourth die, where the third die is diced from a third wafer, the fourth die is diced from a fourth wafer, the third die is connected to the fourth die using at least one through-silicon-via; where the first die includes a first functionality and the third die includes a second functionality, the first functionality is different than the second functionality, a majority of the masks used for processing the first wafer and the third wafer are the same; and the second die size is substantially different than the fourth die size.
摘要翻译： 一种制造半导体器件的方法：提供包括第一晶粒和第二晶粒的第一器件，其中第一晶粒从第一晶片切割，第二晶粒从第二晶片切割，第一晶粒使用 至少一个穿硅通孔; 提供包括第三管芯和第四管芯的第二器件，其中第三管芯从第三晶片切割，第四管芯从第四晶片切割，第三管芯使用至少一个穿硅硅片连接到第四管芯， 通过; 其中第一管芯包括第一功能，第三管芯包括第二功能，第一功能不同于第二功能，用于处理第一晶片和第三晶片的大多数掩模是相同的; 并且第二管芯尺寸基本上不同于第四管芯尺寸。
-
公开(公告)号：US08294159B2
公开(公告)日：2012-10-23
申请号：US13073268
申请日：2011-03-28
IPC分类号： H01L29/04
CPC分类号： H01L21/76254 , H01L21/8221 , H01L21/84 , H01L23/36 , H01L23/481 , H01L24/48 , H01L25/0657 , H01L27/0688 , H01L27/092 , H01L27/105 , H01L27/11 , H01L27/1104 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2924/00014 , H01L2924/01019 , H01L2924/01066 , H01L2924/01322 , H01L2924/10253 , H01L2924/12032 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/3011 , H03K19/177 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A method for fabrication of 3D semiconductor devices utilizing a layer transfer and steps for forming transistors on top of a pre-fabricated semiconductor device comprising transistors formed on crystallized semiconductor base layer and metal layer for the transistors interconnections and insulation layer. The advantage of this approach is reduction of the over all metal length used to interconnect the various transistors.
摘要翻译： 一种用于制造利用层转移的三维半导体器件的方法以及用于在预制半导体器件的顶部形成晶体管的步骤，所述预制半导体器件包括形成在晶体化半导体基底层上的晶体管和用于晶体管互连和绝缘层的金属层。 这种方法的优点是减少用于互连各种晶体管的所有金属长度。
-
公开(公告)号：US08148728B2
公开(公告)日：2012-04-03
申请号：US13073188
申请日：2011-03-28
IPC分类号： H01L29/10
CPC分类号： H01L21/76254 , H01L21/8221 , H01L21/84 , H01L23/36 , H01L23/481 , H01L24/48 , H01L25/0657 , H01L27/0688 , H01L27/092 , H01L27/105 , H01L27/11 , H01L27/1104 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2924/00014 , H01L2924/01019 , H01L2924/01066 , H01L2924/01322 , H01L2924/10253 , H01L2924/12032 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/3011 , H03K19/177 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A method for fabrication of 3D semiconductor devices utilizing a layer transfer and steps for forming transistors on top of a pre-fabricated semiconductor device comprising transistors formed on crystallized semiconductor base layer and metal layer for the transistors interconnections and insulation layer. The advantage of this approach is reduction of the over all metal length used to interconnect the various transistors.
-
公开(公告)号：US20120248595A1
公开(公告)日：2012-10-04
申请号：US13492395
申请日：2012-06-08
申请人： Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist , Israel Beinglass , Ze'ev Wurman , Paul Lim
发明人： Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist , Israel Beinglass , Ze'ev Wurman , Paul Lim
IPC分类号： H01L23/36
CPC分类号： H01L21/6835 , G11C8/16 , H01L21/743 , H01L21/76254 , H01L21/76898 , H01L21/8221 , H01L21/823828 , H01L21/84 , H01L23/3677 , H01L23/481 , H01L23/5252 , H01L24/13 , H01L24/16 , H01L24/45 , H01L24/48 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L27/0207 , H01L27/0688 , H01L27/092 , H01L27/10 , H01L27/105 , H01L27/10802 , H01L27/10873 , H01L27/10876 , H01L27/10894 , H01L27/10897 , H01L27/11 , H01L27/1108 , H01L27/112 , H01L27/11206 , H01L27/11526 , H01L27/11529 , H01L27/11551 , H01L27/11573 , H01L27/11578 , H01L27/11807 , H01L27/11898 , H01L27/1203 , H01L27/1214 , H01L27/1266 , H01L29/4236 , H01L29/66272 , H01L29/66621 , H01L29/66825 , H01L29/66833 , H01L29/66901 , H01L29/78 , H01L29/7841 , H01L29/7843 , H01L29/7881 , H01L29/792 , H01L2221/68368 , H01L2223/5442 , H01L2223/54426 , H01L2224/131 , H01L2224/16145 , H01L2224/16146 , H01L2224/16227 , H01L2224/16235 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/83894 , H01L2225/06513 , H01L2225/06541 , H01L2924/00011 , H01L2924/01002 , H01L2924/01004 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/01029 , H01L2924/01046 , H01L2924/01066 , H01L2924/01068 , H01L2924/01077 , H01L2924/01078 , H01L2924/01322 , H01L2924/10253 , H01L2924/10329 , H01L2924/12032 , H01L2924/12033 , H01L2924/12036 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/1461 , H01L2924/15311 , H01L2924/1579 , H01L2924/16152 , H01L2924/181 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00014 , H01L2924/014 , H01L2924/00015 , H01L2924/00 , H01L2224/80001 , H01L2224/16225 , H01L2924/00012
摘要： A method of manufacturing a semiconductor device, the method including, providing a first monocrystalline layer including semiconductor regions, overlaying the first monocrystalline layer with an isolation layer, transferring a second monocrystalline layer comprising semiconductor regions to overlay the isolation layer, wherein the first monocrystalline layer and the second monocrystalline layer are formed from substantially different crystal materials; and subsequently etching the second monocrystalline layer as part of forming at least one transistor in the second monocrystalline layer.
-
公开(公告)号：US20110121366A1
公开(公告)日：2011-05-26
申请号：US13016313
申请日：2011-01-28
申请人： Zvi Or-Bach , Brian Cronquist , Israel Beinglass , J.L. de Jong , Deepak C. Sekar , Paul Lim
发明人： Zvi Or-Bach , Brian Cronquist , Israel Beinglass , J.L. de Jong , Deepak C. Sekar , Paul Lim
IPC分类号： H01L27/118
CPC分类号： H01L21/8221 , H01L21/6835 , H01L21/76254 , H01L21/823828 , H01L21/84 , H01L23/3677 , H01L23/481 , H01L23/5252 , H01L24/05 , H01L24/13 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/83 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L27/0207 , H01L27/0688 , H01L27/092 , H01L27/10 , H01L27/105 , H01L27/10802 , H01L27/10873 , H01L27/10876 , H01L27/10894 , H01L27/10897 , H01L27/11 , H01L27/1108 , H01L27/1116 , H01L27/112 , H01L27/11206 , H01L27/11526 , H01L27/11529 , H01L27/11551 , H01L27/11573 , H01L27/11578 , H01L27/11807 , H01L27/11898 , H01L27/1203 , H01L27/1214 , H01L27/1266 , H01L29/4236 , H01L29/66272 , H01L29/66621 , H01L29/66825 , H01L29/66833 , H01L29/66901 , H01L29/78 , H01L29/7841 , H01L29/7881 , H01L29/792 , H01L2221/68368 , H01L2223/5442 , H01L2223/54426 , H01L2224/0401 , H01L2224/16145 , H01L2224/16235 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/83894 , H01L2225/06513 , H01L2225/06541 , H01L2924/00011 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01051 , H01L2924/01066 , H01L2924/01068 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/12032 , H01L2924/12036 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/15788 , H01L2924/1579 , H01L2924/16152 , H01L2924/181 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00015 , H01L2924/01031 , H01L2924/3512 , H01L2924/00 , H01L2224/80001 , H01L2224/05599 , H01L2924/00012
摘要： A semiconductor device includes a first single crystal silicon layer including first transistors, a first alignment mark, and at least one metal layer overlying the first single crystal silicon layer for interconnecting the first transistors; a second layer overlying the at least one metal layer, wherein the second layer includes a plurality of second transistors; and a connection path connecting the first transistors and the second transistors and including at least a first strip, a second strip, and a through via connecting the first strip and the second strip, wherein the second strip is substantially orthogonal to the first strip and wherein the through via is substantially away from both ends of the first strip and both ends of the second strip.
摘要翻译： 半导体器件包括第一单晶硅层，其包括第一晶体管，第一对准标记和覆盖在第一单晶硅层上的至少一个金属层，用于互连第一晶体管; 覆盖所述至少一个金属层的第二层，其中所述第二层包括多个第二晶体管; 以及连接路径，其连接第一晶体管和第二晶体管，并且至少包括连接第一条带和第二条带的第一条带，第二条带和通孔，其中第二条带基本上与第一条带正交， 通孔基本上远离第一条带的两端和第二条带的两端。
-
公开(公告)号：US20110092030A1
公开(公告)日：2011-04-21
申请号：US12970602
申请日：2010-12-16
申请人： Zvi Or-Bach , Brian Cronquist , Israel Beinglass , J. L. de Jong , Deepak C. Sekar , Paul Lim
发明人： Zvi Or-Bach , Brian Cronquist , Israel Beinglass , J. L. de Jong , Deepak C. Sekar , Paul Lim
IPC分类号： H01L21/822
CPC分类号： H01L27/1266 , G06F17/5072 , H01L21/6835 , H01L21/76254 , H01L21/8221 , H01L21/823828 , H01L21/84 , H01L23/3677 , H01L23/481 , H01L23/5252 , H01L23/544 , H01L24/05 , H01L24/13 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L27/0207 , H01L27/0688 , H01L27/092 , H01L27/10 , H01L27/105 , H01L27/10802 , H01L27/10873 , H01L27/10876 , H01L27/10894 , H01L27/10897 , H01L27/11 , H01L27/1108 , H01L27/112 , H01L27/11206 , H01L27/11526 , H01L27/11529 , H01L27/11551 , H01L27/11573 , H01L27/11578 , H01L27/11807 , H01L27/11898 , H01L27/1203 , H01L27/1214 , H01L29/4236 , H01L29/66272 , H01L29/66621 , H01L29/66825 , H01L29/66833 , H01L29/66901 , H01L29/78 , H01L29/7841 , H01L29/7848 , H01L29/7881 , H01L29/792 , H01L2221/68368 , H01L2223/5442 , H01L2223/54426 , H01L2224/0401 , H01L2224/16145 , H01L2224/16225 , H01L2224/16235 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/83894 , H01L2225/06513 , H01L2225/06541 , H01L2924/00011 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01051 , H01L2924/01066 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/12032 , H01L2924/12036 , H01L2924/1301 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00014 , H01L2924/00015 , H01L2924/00 , H01L2924/3512 , H01L2224/80001 , H01L2924/00012
摘要： A semiconductor device includes a first mono-crystallized layer including first transistors, and a first metal layer forming at least a portion of connections between the first transistors; and a second layer including second transistors, the second transistors including mono-crystalline material, the second layer overlying the first metal layer, wherein the first metal layer includes aluminum or copper, and wherein the second layer is less than one micron in thickness and includes logic cells.
-
公开(公告)号：US09136153B2
公开(公告)日：2015-09-15
申请号：US13492395
申请日：2012-06-08
申请人： Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist , Israel Beinglass , Ze'ev Wurman , Paul Lim
发明人： Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist , Israel Beinglass , Ze'ev Wurman , Paul Lim
IPC分类号： H01L25/00 , H01L25/065 , H01L21/683 , H01L21/74 , H01L21/762 , H01L21/768 , H01L21/822 , H01L21/8238 , H01L21/84 , H01L23/48 , H01L23/525 , H01L27/02 , H01L27/06 , H01L27/092 , H01L27/10 , H01L27/105 , H01L27/108 , H01L27/11 , H01L27/112 , H01L27/115 , H01L27/118 , H01L27/12 , H01L29/423 , H01L29/66 , H01L29/78 , H01L29/788 , H01L29/792 , H01L23/367 , H01L23/00
CPC分类号： H01L21/6835 , G11C8/16 , H01L21/743 , H01L21/76254 , H01L21/76898 , H01L21/8221 , H01L21/823828 , H01L21/84 , H01L23/3677 , H01L23/481 , H01L23/5252 , H01L24/13 , H01L24/16 , H01L24/45 , H01L24/48 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L27/0207 , H01L27/0688 , H01L27/092 , H01L27/10 , H01L27/105 , H01L27/10802 , H01L27/10873 , H01L27/10876 , H01L27/10894 , H01L27/10897 , H01L27/11 , H01L27/1108 , H01L27/112 , H01L27/11206 , H01L27/11526 , H01L27/11529 , H01L27/11551 , H01L27/11573 , H01L27/11578 , H01L27/11807 , H01L27/11898 , H01L27/1203 , H01L27/1214 , H01L27/1266 , H01L29/4236 , H01L29/66272 , H01L29/66621 , H01L29/66825 , H01L29/66833 , H01L29/66901 , H01L29/78 , H01L29/7841 , H01L29/7843 , H01L29/7881 , H01L29/792 , H01L2221/68368 , H01L2223/5442 , H01L2223/54426 , H01L2224/131 , H01L2224/16145 , H01L2224/16146 , H01L2224/16227 , H01L2224/16235 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/83894 , H01L2225/06513 , H01L2225/06541 , H01L2924/00011 , H01L2924/01002 , H01L2924/01004 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/01029 , H01L2924/01046 , H01L2924/01066 , H01L2924/01068 , H01L2924/01077 , H01L2924/01078 , H01L2924/01322 , H01L2924/10253 , H01L2924/10329 , H01L2924/12032 , H01L2924/12033 , H01L2924/12036 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/1461 , H01L2924/15311 , H01L2924/1579 , H01L2924/16152 , H01L2924/181 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00014 , H01L2924/014 , H01L2924/00015 , H01L2924/00 , H01L2224/80001 , H01L2224/16225 , H01L2924/00012
摘要： A 3D semiconductor device, including: a first layer including first transistors; a first interconnection layer interconnecting the first transistors and includes aluminum or copper; a second layer including second transistors; where the second transistors are aligned to the first transistors with a less than 40 nm alignment error, and where the second layer is overlying the first interconnection layer, and where at least one of the second transistors has a back-bias structure designed to modify the performance of at least one of the second transistors.
摘要翻译： 一种3D半导体器件，包括：包括第一晶体管的第一层; 互连第一晶体管并且包括铝或铜的第一互连层; 包括第二晶体管的第二层; 其中所述第二晶体管与所述第一晶体管对准，具有小于40nm的对准误差，并且其中所述第二层覆盖所述第一互连层，并且其中所述第二晶体管中的至少一个具有背偏置结构， 至少一个第二晶体管的性能。
-
公开(公告)号：US20120129301A1
公开(公告)日：2012-05-24
申请号：US13273712
申请日：2011-10-14
申请人： Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist , Israel Beinglass , Ze'ev Wurman , Paul Lim
发明人： Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist , Israel Beinglass , Ze'ev Wurman , Paul Lim
IPC分类号： H01L21/822
CPC分类号： H01L21/6835 , G11C8/16 , H01L21/743 , H01L21/76254 , H01L21/76898 , H01L21/8221 , H01L21/823828 , H01L21/84 , H01L23/3677 , H01L23/481 , H01L23/5252 , H01L24/13 , H01L24/16 , H01L24/45 , H01L24/48 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L27/0207 , H01L27/0688 , H01L27/092 , H01L27/10 , H01L27/105 , H01L27/10802 , H01L27/10873 , H01L27/10876 , H01L27/10894 , H01L27/10897 , H01L27/11 , H01L27/1108 , H01L27/112 , H01L27/11206 , H01L27/11526 , H01L27/11529 , H01L27/11551 , H01L27/11573 , H01L27/11578 , H01L27/11807 , H01L27/11898 , H01L27/1203 , H01L27/1214 , H01L27/1266 , H01L29/4236 , H01L29/66272 , H01L29/66621 , H01L29/66825 , H01L29/66833 , H01L29/66901 , H01L29/78 , H01L29/7841 , H01L29/7843 , H01L29/7881 , H01L29/792 , H01L2221/68368 , H01L2223/5442 , H01L2223/54426 , H01L2224/131 , H01L2224/16145 , H01L2224/16146 , H01L2224/16227 , H01L2224/16235 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/83894 , H01L2225/06513 , H01L2225/06541 , H01L2924/00011 , H01L2924/01002 , H01L2924/01004 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/01029 , H01L2924/01046 , H01L2924/01066 , H01L2924/01068 , H01L2924/01077 , H01L2924/01078 , H01L2924/01322 , H01L2924/10253 , H01L2924/10329 , H01L2924/12032 , H01L2924/12033 , H01L2924/12036 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/1461 , H01L2924/15311 , H01L2924/1579 , H01L2924/16152 , H01L2924/181 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00014 , H01L2924/014 , H01L2924/00015 , H01L2924/00 , H01L2224/80001 , H01L2224/16225 , H01L2924/00012
摘要： A method of manufacturing a semiconductor device, the method including, providing a first monocrystalline layer including semiconductor regions, overlaying the first monocrystalline layer with an isolation layer, transferring a second monocrystalline layer comprising semiconductor regions to overlay the isolation layer, wherein the first monocrystalline layer and the second monocrystalline layer are formed from substantially different crystal materials; and subsequently etching the second monocrystalline layer as part of forming at least one transistor in the second monocrystalline layer.
摘要翻译： 一种制造半导体器件的方法，所述方法包括：提供包括半导体区域的第一单晶层，将第一单晶层与隔离层重叠，转移包含半导体区域的第二单晶层覆盖隔离层，其中第一单晶层 并且第二单晶层由基本上不同的晶体材料形成; 随后蚀刻第二单晶层作为在第二单晶层中形成至少一个晶体管的一部分。
-
29.发明授权公开(公告)号：US09711407B2
公开(公告)日：2017-07-18
申请号：US12970602
申请日：2010-12-16
申请人： Zvi Or-Bach , Brian Cronquist , Israel Beinglass , J. L. de Jong , Deepak C. Sekar , Paul Lim
发明人： Zvi Or-Bach , Brian Cronquist , Israel Beinglass , J. L. de Jong , Deepak C. Sekar , Paul Lim
IPC分类号： H01L21/822 , H01L21/84 , H01L21/683 , H01L23/00 , H01L23/525 , H01L23/544 , H01L25/065 , H01L27/02 , H01L27/092 , H01L27/10 , H01L27/105 , H01L27/108 , H01L27/115 , H01L27/118 , H01L29/66 , H01L29/423 , H01L29/78 , G06F17/50 , H01L21/762 , H01L21/8238 , H01L25/00 , H01L27/06 , H01L27/11 , H01L27/112 , H01L27/11526 , H01L27/11529 , H01L27/11551 , H01L27/11573 , H01L27/11578 , H01L27/12 , H01L29/788 , H01L29/792 , H01L23/367 , H01L23/48
CPC分类号： H01L27/1266 , G06F17/5072 , H01L21/6835 , H01L21/76254 , H01L21/8221 , H01L21/823828 , H01L21/84 , H01L23/3677 , H01L23/481 , H01L23/5252 , H01L23/544 , H01L24/05 , H01L24/13 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L27/0207 , H01L27/0688 , H01L27/092 , H01L27/10 , H01L27/105 , H01L27/10802 , H01L27/10873 , H01L27/10876 , H01L27/10894 , H01L27/10897 , H01L27/11 , H01L27/1108 , H01L27/112 , H01L27/11206 , H01L27/11526 , H01L27/11529 , H01L27/11551 , H01L27/11573 , H01L27/11578 , H01L27/11807 , H01L27/11898 , H01L27/1203 , H01L27/1214 , H01L29/4236 , H01L29/66272 , H01L29/66621 , H01L29/66825 , H01L29/66833 , H01L29/66901 , H01L29/78 , H01L29/7841 , H01L29/7848 , H01L29/7881 , H01L29/792 , H01L2221/68368 , H01L2223/5442 , H01L2223/54426 , H01L2224/0401 , H01L2224/16145 , H01L2224/16225 , H01L2224/16235 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/83894 , H01L2225/06513 , H01L2225/06541 , H01L2924/00011 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01051 , H01L2924/01066 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/12032 , H01L2924/12036 , H01L2924/1301 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00014 , H01L2924/00015 , H01L2924/00 , H01L2924/3512 , H01L2224/80001 , H01L2924/00012
摘要： A semiconductor device includes a first mono-crystallized layer including first transistors, and a first metal layer forming at least a portion of connections between the first transistors; and a second layer including second transistors, the second transistors including mono-crystalline material, the second layer overlying the first metal layer, wherein the first metal layer includes aluminum or copper, and wherein the second layer is less than one micron in thickness and includes logic cells.
-
公开(公告)号：US08273610B2
公开(公告)日：2012-09-25
申请号：US13273712
申请日：2011-10-14
申请人： Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist , Israel Beinglass , Ze'ev Wurman , Paul Lim
发明人： Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist , Israel Beinglass , Ze'ev Wurman , Paul Lim
IPC分类号： H01L21/335 , H01L21/8238 , H01L21/30
CPC分类号： H01L21/6835 , G11C8/16 , H01L21/743 , H01L21/76254 , H01L21/76898 , H01L21/8221 , H01L21/823828 , H01L21/84 , H01L23/3677 , H01L23/481 , H01L23/5252 , H01L24/13 , H01L24/16 , H01L24/45 , H01L24/48 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L27/0207 , H01L27/0688 , H01L27/092 , H01L27/10 , H01L27/105 , H01L27/10802 , H01L27/10873 , H01L27/10876 , H01L27/10894 , H01L27/10897 , H01L27/11 , H01L27/1108 , H01L27/112 , H01L27/11206 , H01L27/11526 , H01L27/11529 , H01L27/11551 , H01L27/11573 , H01L27/11578 , H01L27/11807 , H01L27/11898 , H01L27/1203 , H01L27/1214 , H01L27/1266 , H01L29/4236 , H01L29/66272 , H01L29/66621 , H01L29/66825 , H01L29/66833 , H01L29/66901 , H01L29/78 , H01L29/7841 , H01L29/7843 , H01L29/7881 , H01L29/792 , H01L2221/68368 , H01L2223/5442 , H01L2223/54426 , H01L2224/131 , H01L2224/16145 , H01L2224/16146 , H01L2224/16227 , H01L2224/16235 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/83894 , H01L2225/06513 , H01L2225/06541 , H01L2924/00011 , H01L2924/01002 , H01L2924/01004 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/01029 , H01L2924/01046 , H01L2924/01066 , H01L2924/01068 , H01L2924/01077 , H01L2924/01078 , H01L2924/01322 , H01L2924/10253 , H01L2924/10329 , H01L2924/12032 , H01L2924/12033 , H01L2924/12036 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/1461 , H01L2924/15311 , H01L2924/1579 , H01L2924/16152 , H01L2924/181 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00014 , H01L2924/014 , H01L2924/00015 , H01L2924/00 , H01L2224/80001 , H01L2224/16225 , H01L2924/00012
摘要： A method of manufacturing a semiconductor device, the method including, providing a first monocrystalline layer including semiconductor regions, overlaying the first monocrystalline layer with an isolation layer, transferring a second monocrystalline layer comprising semiconductor regions to overlay the isolation layer, wherein the first monocrystalline layer and the second monocrystalline layer are formed from substantially different crystal materials; and subsequently etching the second monocrystalline layer as part of forming at least one transistor in the second monocrystalline layer.
摘要翻译： 一种制造半导体器件的方法，所述方法包括：提供包括半导体区域的第一单晶层，将第一单晶层与隔离层重叠，转移包含半导体区域的第二单晶层覆盖隔离层，其中第一单晶层 并且第二单晶层由基本上不同的晶体材料形成; 随后蚀刻第二单晶层作为在第二单晶层中形成至少一个晶体管的一部分。
-
-
-
-
-
-
-
-
-
搜索结果
100 条记录 (耗时 0.075 秒)
