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1599 条记录 (耗时 0.027 秒)

    PCIe DEVICE
    22.
    发明公开
    PCIe DEVICE 审中-公开

    公开(公告)号：US20240168911A1

    公开(公告)日：2024-05-23

    申请号：US18406919

    申请日：2024-01-08

    申请人： SK hynix Inc.

    发明人： Yong Tae JEON ,  Byung Cheol KANG ,  Seung Duk CHO ,  Sang Hyun YOON ,  Se Hyeon HAN ,  Jae Young JANG

    IPC分类号： G06F13/42 ,  G06F1/08 ,  G06F7/58 ,  G06F13/40

    CPC分类号： G06F13/4221 ,  G06F1/08 ,  G06F7/588 ,  G06F13/4045

    摘要： A peripheral component interconnect express (PCIe) device includes a common function performing operations associated with a PCIe interface according to a function type, the common function being programmable to be a function type selected from a plurality function types, an access identification information controller generating first access identification information for allowing an access to the common function, and providing the first access identification information to an assigned system image to which the common function has been assigned, a data packet receiver receiving a data packet including target identification information indicating a target system image from the target system image, and an access allowance determiner determining whether or not to allow the target system image to access the common function based on the first access identification information and the target identification information.

    MNEMONIC PHRASE MANAGEMENT METHOD AND APPARATUS
    23.
    发明公开
    MNEMONIC PHRASE MANAGEMENT METHOD AND APPARATUS 审中-公开

    公开(公告)号：US20240168875A1

    公开(公告)日：2024-05-23

    申请号：US18283901

    申请日：2022-04-22

    申请人： FEITIAN TECHNOLOGIES CO., LTD.

    发明人： Zhou LU ,  Huazhang YU

    IPC分类号： G06F12/02 ,  G06F7/58

    CPC分类号： G06F12/0238 ,  G06F7/588

    摘要： A mnemonic phrase management method. The method comprises: generating a random number having a first preset length and performing calculation on the random number; splicing the random number and data having a second preset length acquired from the random number calculation result to obtain a first spliced value; grouping the first spliced value according to a third preset length; sequentially searching an offset storage area for corresponding indexes according to values of the groups; obtaining mnemonic phrase starting offset addresses and mnemonic phrase lengths according to the indexes; and acquiring corresponding mnemonic phrases from a mnemonic phrase storage area according to the mnemonic phrase starting offset addresses and the mnemonic phrase lengths and sequentially storing the mnemonic phrases into a mnemonic phrase buffer. The present invention relates to the field of information security. Compared with the prior art, the present invention can greatly reduce storage space, solve the problem of space limitation of a security chip, and save more space for applications, is applicable to existing security chips, and meets production requirements of hardware devices.

    Short channel effect based random bit generator
    24.
    发明授权
    Short channel effect based random bit generator 有权

    公开(公告)号：US11989533B2

    公开(公告)日：2024-05-21

    申请号：US18206078

    申请日：2023-06-05

    申请人： eMemory Technology Inc.

    发明人： Ching-Hsiang Hsu

    IPC分类号： G06F7/58 ,  G11C11/412 ,  G11C11/419 ,  H01L27/088 ,  H03K3/037 ,  H03K3/84

    CPC分类号： G06F7/588 ,  G11C11/412 ,  G11C11/419 ,  H01L27/088 ,  H03K3/037 ,  H03K3/84

    摘要： A random bit generator includes a voltage source, a bit data cell, and a sensing control circuit. The voltage source provides a scan voltage during enroll operations. The data cell includes a first transistor and a second transistor. The first transistor has a first terminal coupled to a first bit line, a second terminal coupled to the voltage source, and a control terminal. The second transistor has a first terminal coupled to a second bit line, a second terminal coupled to the voltage source, and a control terminal. The sensing control circuit is coupled to the first bit line and the second bit line, and outputs a random bit data according to currents generated through the first transistor and the second transistor during an enroll operation of the bit data cell.

    DYNAMIC OUTLIER BIAS REDUCTION SYSTEM AND METHOD
    26.
    发明公开
    DYNAMIC OUTLIER BIAS REDUCTION SYSTEM AND METHOD 审中-公开

    公开(公告)号：US20240152571A1

    公开(公告)日：2024-05-09

    申请号：US18407017

    申请日：2024-01-08

    申请人： HARTFORD STEAM BOILER INSPECTION AND INSURANCE COMPANY

    发明人： Richard B. Jones

    IPC分类号： G06F17/10 ,  G01N33/00 ,  G06F17/18 ,  G06N5/04

    CPC分类号： G06F17/10 ,  G01N33/0004 ,  G06F17/18 ,  G06N5/04 ,  G06F7/588

    摘要： A system and method is described herein for data filtering to reduce functional, and trend line outlier bias. Outliers are removed from the data set through an objective statistical method. Bias is determined based on absolute, relative error, or both. Error values are computed from the data, model coefficients, or trend line calculations. Outlier data records are removed when the error values are greater than or equal to the user-supplied criteria. For optimization methods or other iterative calculations, the removed data are re-applied each iteration to the model computing new results. Using model values for the complete dataset, new error values are computed and the outlier bias reduction procedure is re-applied. Overall error is minimized for model coefficients and outlier removed data in an iterative fashion until user defined error improvement limits are reached. The filtered data may be used for validation, outlier bias reduction and data quality operations.

    CONTROLLING ROULETTE PROGRESSIVE FEATURES
    30.
    发明公开
    CONTROLLING ROULETTE PROGRESSIVE FEATURES 审中-公开

    公开(公告)号：US20240119804A1

    公开(公告)日：2024-04-11

    申请号：US18483776

    申请日：2023-10-10

    申请人： LNW Gaming, Inc.

    发明人： William JONES ,  Elliot FROME

    IPC分类号： G07F17/32 ,  G06F7/58

    CPC分类号： G07F17/3288 ,  G06F7/588 ,  G07F17/3213 ,  G07F17/3258

    摘要： A method and/or system to perform operations associated with a roulette game. The operations include detecting placement of a roulette bet by at least one player terminal of a plurality of player terminals of the gaming system. The roulette bet is placed prior to computing a result for a playing round of a roulette game. The operations further include computing a prorated amount of a progressive jackpot award based on a bet level of the roulette bet. The operations also include animating, by the processor via an electronic display device of the at least one player terminal, a highlight effect of the prorated amount.