公开(公告)号：US20150214306A1

公开(公告)日：2015-07-30

申请号：US14418897

申请日：2013-07-31

Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY ,  CENTRAL RESEARCH INSTITUTE OF ELECTRIC POWER INDUSTRY

Inventor： Kazutoshi Kojima ,  Shiyang Ji ,  Tetsuya Miyazawa ,  Hidekazu Tsuchida ,  Koji Nakayama ,  Tetsuro Hemmi ,  Katsunori Asano

IPC: H01L29/16 ,  H01L29/04 ,  C30B29/36 ,  H01L21/02 ,  C30B25/20 ,  H01L29/167 ,  H01L29/739

CPC classification number: H01L29/1608 ,  C30B25/20 ,  C30B29/36 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0259 ,  H01L21/02609 ,  H01L21/0262 ,  H01L21/046 ,  H01L29/04 ,  H01L29/045 ,  H01L29/167 ,  H01L29/66068 ,  H01L29/7393 ,  H01L29/7395

Abstract: The present invention provides a semiconductor structure which includes at least a p-type silicon carbide single crystal layer having an α-type crystal structure, containing aluminum at impurity concentration of 1×1019 cm−3 or higher, and having thickness of 50 μm or greater. Further provided is a method for producing the semiconductor structure of the present invention which method includes at least epitaxial growth step of introducing silicon carbide source and aluminum source and epitaxially growing p-type silicon carbide single crystal layer over a base layer made of silicon carbide single crystal having α-type crystal structure, wherein the epitaxial growth step is performed at temperature conditions of from 1,500° C. to 1,700° C., and pressure conditions of from 5×103 Pa to 25×103 Pa.

Abstract translation: 本发明提供一种半导体结构，其至少包括具有α型晶体结构的p型碳化硅单晶层，其含有杂质浓度为1×1019 cm -3以上的铝，厚度为50μm，或 更大 还提供了一种制造本发明的半导体结构的方法，该方法至少包括将碳化硅源和铝源引入并外延生长的p型碳化硅单晶层的外延生长步骤在由碳化硅单体制成的基底层上 具有α型晶体结构的晶体，其中外延生长步骤在1500℃至1,700℃的温度条件下进行，压力条件为5×10 3 Pa至25×10 3 Pa。

公开(公告)号：US20150214003A1

公开(公告)日：2015-07-30

申请号：US14416848

申请日：2013-06-12

Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY ,  LIFESEM INC.

Inventor： Toshihiko Ogura

IPC: H01J37/26 ,  G01N23/225

CPC classification number: H01J37/261 ,  G01N23/225 ,  H01J37/20 ,  H01J2237/004 ,  H01J2237/2003

Abstract: In an upper main body of a sample holder, a laminate of an insulative thin film and a secondary electron emission protective thin film is provided. An electron beam emitted from an electron gun enters the secondary electron emission protective thin film side. The undersurface of the insulative thin film is a sample adhesion surface, where a sample to be an observation target is held by adsorption or the like. The secondary electron emission protective thin film is made of a material having a low secondary electron emission coefficient δ and, preferably, is non-insulative. That is, the secondary electron emission protective thin film is conductive even though the electric resistance is high. Accordingly, the charge level of a site irradiated with the electron beam has a low charge level.

Abstract translation: 在样品保持器的上主体中，设置绝缘薄膜和二次电子发射保护薄膜的叠层体。 从电子枪发射的电子束进入二次电子发射保护薄膜一侧。 绝缘性薄膜的下表面是样品粘合面，通过吸附等保持作为观察对象物的样品。 二次电子发射保护薄膜由二次电子发射系数δ低的材料制成，优选为非绝缘性。 也就是说，即使电阻高，二次电子发射保护薄膜也是导电的。 因此，用电子束照射的部位的电荷水平具有低的电荷水平。

公开(公告)号：US09082970B2

公开(公告)日：2015-07-14

申请号：US14050987

申请日：2013-10-10

Applicant: National Institute of Advanced Industrial Science and Technology

Inventor： Susumu Soeya ,  Takahiro Odaka ,  Toshimichi Shintani ,  Junji Tominaga

IPC: H01L45/00 ,  C30B29/46 ,  C30B29/68 ,  H01L27/24

CPC classification number: H01L45/144 ,  C30B29/46 ,  C30B29/68 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1625 ,  Y10T428/24975

Abstract: A phase-change memory and a semiconductor recording reproducing device capable of reducing consumed power are provided. A SnxTe100-x/Sb2Te3 SL film obtained by depositing a SnxTe100-x film and a Sb2Te3 film layer by layer contains a SnTe/Sb2Te3 superlattice phase formed of SnTe and Sb2Te3, a SnSbTe alloy phase, and a Te phase. The SnTe/Sb2Te3 superlattice phase is diluted by the SnSbTe alloy phase and the Te phase. Here, X of the SnxTe100-x film is represented by 4 at. %≦X≦55 at. %.

Abstract translation: 提供了能够降低消耗功率的相变存储器和半导体记录再现装置。 通过层叠Sn x Te100-x膜和Sb 2 Te 3膜而形成的Sn xTe100-x / Sb 2 Te 3 SL膜包含由SnTe，Sb 2 Te 3，SnSbTe合金相和Te相形成的SnTe / Sb2Te3超晶格相。 SnTe / Sb2Te3超晶相被SnSbTe合金相和Te相稀释。 这里，SnxTe100-x膜的X由4at表示。 ％＆nlE; X＆nlE; 55 at。 ％。

公开(公告)号：US20150170948A1

公开(公告)日：2015-06-18

申请号：US14625508

申请日：2015-02-18

Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY (AIST)

Inventor： Shiro HARA ,  Hitoshi MAEKAWA

IPC: H01L21/677

CPC classification number: H01L21/67742 ,  A47B47/0091 ,  A47B81/00 ,  B65D51/28 ,  B65D2313/04 ,  H01L21/67379 ,  H01L21/6773 ,  H01L21/67745 ,  H01L21/67751 ,  H01L21/67772 ,  H01L21/67775

Abstract: A transfer box has a sealing structure hermetically sealable by means of tight coupling of a transfer box body and a transfer box door. The transfer box is structured in such a way that magnets on the transfer box body face magnetic bodies on the transfer box door when the transfer box door is closed on the transfer box body, with these magnets and magnetic bodies forming a magnetic closed circuit.

Abstract translation: 传送箱具有密封结构，其通过传送箱主体和传送箱门的紧密连接而可气密地密封。 传送箱的结构使得当传送箱门关闭在传送箱体上时，传送箱体上的磁体面对传送箱门上的磁体，这些磁体和磁体形成磁闭合电路。

公开(公告)号：US09059065B2

公开(公告)日：2015-06-16

申请号：US13845343

申请日：2013-03-18

Applicant: National Institute of Advanced Industrial Science and Technology ,  RICOH COMPANY, LTD.

Inventor： Yutaka Hayashi ,  Kazuhiro Yoneda ,  Hirofumi Watanabe ,  Katsuhiko Aisu ,  Takaaki Negoro ,  Toshitaka Ota ,  Yasushi Nagamune

IPC: H01L27/146 ,  H04N5/243 ,  H04N5/3745

CPC classification number: H01L27/14681 ,  H04N5/243 ,  H04N5/3745

Abstract: Provided is a method of varying the gain of an amplifying photoelectric conversion device and a variable gain photoelectric conversion device which are capable of achieving both signal processing under low illuminance and high-current processing under high light intensity, and thereby capable of securing a wide dynamic range. An amplifying photoelectric conversion part includes a photoelectric conversion element and amplification transistors forming a Darlington circuit. The sources and the drains of field-effect transistors are connected to the bases and the emitters of the amplification transistors, respectively. The gates of the field-effect transistors each function as a gain control part.

Abstract translation: 提供了一种改变放大光电转换装置和可变增益光电转换装置的增益的方法，其能够在高照度和高电流处理下在高光强度下实现信号处理，从而能够确保宽动态 范围。 放大光电转换部分包括形成达林顿电路的光电转换元件和放大晶体管。 场效应晶体管的源极和漏极分别连接到放大晶体管的基极和发射极。 场效应晶体管的栅极各自用作增益控制部分。

公开(公告)号：US20150148226A1

公开(公告)日：2015-05-28

申请号：US14610089

申请日：2015-01-30

Applicant: TANITA CORPORATION ,  NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventor： Narushi Ito ,  Jun Kimura ,  Masayuki Mizushina ,  Yohei Inaba ,  Kenji Yokoyama

IPC: B01J20/287 ,  B01J20/28

CPC classification number: B01J20/287 ,  B01D15/325 ,  B01D15/362 ,  B01J20/28004

Abstract: Aimed at readily and exactly separate 8-hydroxy-2′-deoxyguanosine (8-OHdG) contained in a sample, a column packing material used for separating 8-OHdG, which contains a packing material composed of a material having a straight-chain hydrocarbon group having 6 or more and 30 or less carbon atoms as a functional group, and having a carbon content over the surface of carrier of 18% or less by element ratio, wherein the packing material contains 1 cumulative percent or more and 20 cumulative percent or less, on the particle-count basis, of particles having a circle-equivalent diameter, measured using a flow-type particle image analyzer, of 0.5 μm or larger and 10 μm or smaller, is used.

Abstract translation: 针对样品中所含的8-羟基-2'-脱氧鸟苷（8-OHdG）容易且精确地分离，用于分离8-OHdG的柱填充材料，其包含由具有直链烃的材料组成的包装材料 具有6个或更多和30个或更少碳原子的官能团，并且在载体表面上的碳含量超过18％或更少的元素比，其中包装材料包含1个累积百分比或更多和20个累积百分比，或 使用0.5μm以上且10μm以下的使用流动型粒子图像分析仪测定的具有圆当量直径的粒子，以粒子计数为基准。

公开(公告)号：US20150144965A1

公开(公告)日：2015-05-28

申请号：US14404827

申请日：2013-03-18

Applicant: FUJI ELECTRIC CO., LTD. ,  NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventor： Takashi Tsuji ,  Akimasa Kinoshita ,  Noriyuki Iwamuro ,  Kenji Fukuda

IPC: H01L29/872 ,  H01L29/36 ,  H01L21/02 ,  H01L29/16 ,  H01L29/66

CPC classification number: H01L29/872 ,  H01L21/02529 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/08 ,  H01L29/1608 ,  H01L29/36 ,  H01L29/47 ,  H01L29/66143

Abstract: A p-type region, a p− type region, and a p+ type region are selectively disposed in a surface layer of a silicon carbide substrate base. The p-type region and the p− type region are disposed in a breakdown voltage structure portion that surrounds an active region. The p+ type region is disposed in the active region to make up a JBS structure. The p− type region surrounds the p-type region to make up a junction termination structure. A Schottky electrode forms a Schottky junction with an n-type silicon carbide epitaxial layer. The Schottky electrode overhangs an interlayer insulation film covering a portion of the p-type region and this overhanging portion acts as a field plate. The p+ type region has an acceptor concentration greater than or equal to a predetermined concentration and can make a forward surge current larger.

Abstract translation: p型区域，p型区域和p +型区域选择性地设置在碳化硅衬底基底的表面层中。 p型区域和p型区域设置在围绕有源区域的击穿电压结构部分。 p +型区域设置在活性区域中以构成JBS结构。 p型区域围绕p型区域以构成接合端接结构。 肖特基电极与n型碳化硅外延层形成肖特基结。 肖特基电极突出覆盖p型区域的一部分的层间绝缘膜，并且该突出部分用作场板。 p +型区域的受体浓度大于或等于预定浓度，并且可以使正向浪涌电流更大。

公开(公告)号：US20150137318A1

公开(公告)日：2015-05-21

申请号：US14568189

申请日：2014-12-12

Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED ,  NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventor： Takenori OSADA ,  Tomoyuki TAKADA ,  Masahiko HATA ,  Tetsuji YASUDA ,  Tatsuro MAEDA ,  Taro ITATANI

IPC: H01L29/267 ,  H01L21/306 ,  H01L21/02 ,  H01L29/16 ,  H01L29/20

CPC classification number: H01L29/267 ,  H01L21/02002 ,  H01L21/02395 ,  H01L21/02433 ,  H01L21/02441 ,  H01L21/02463 ,  H01L21/02524 ,  H01L21/02532 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/2007 ,  H01L21/30604 ,  H01L21/30612 ,  H01L21/8258 ,  H01L29/16 ,  H01L29/20 ,  H01L29/66522 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor wafer is provided. The semiconductor wafer comprises a sacrificial layer, a first semiconductor crystal layer, and a second semiconductor crystal layer above a semiconductor crystal layer forming wafer, wherein the semiconductor crystal layer forming wafer, the sacrificial layer, the first semiconductor crystal layer and the second semiconductor crystal layer are arranged in the order of the semiconductor crystal layer forming wafer, the sacrificial layer, the first semiconductor crystal layer and the second semiconductor crystal layer, a first atom of one type selected from a plurality of types of atoms constituting the semiconductor crystal layer forming wafer or the sacrificial layer is contained in the first semiconductor crystal layer and the second semiconductor crystal layer as an impurity, and the concentration of the first atom in the second semiconductor crystal layer is lower than the concentration of the first atom in the first semiconductor crystal layer.

Abstract translation: 提供半导体晶片。 半导体晶片包括半导体晶体层形成晶片之上的牺牲层，第一半导体晶体层和第二半导体晶体层，其中半导体晶体层形成晶片，牺牲层，第一半导体晶体层和第二半导体晶体 层以半导体晶体层形成晶片，牺牲层，第一半导体晶体层和第二半导体晶体层的顺序排列，从构成半导体晶体层的多种原子形成的一种类型的第一原子形成 晶片或牺牲层被包含在作为杂质的第一半导体晶体层和第二半导体晶体层中，并且第二半导体晶体层中的第一原子的浓度低于第一半导体晶体中的第一原子的浓度 层。

公开(公告)号：US20150118500A1

公开(公告)日：2015-04-30

申请号：US14581622

申请日：2014-12-23

Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventor： Takushi Sugino ,  Kinji Asaka ,  Isao Takahashi ,  Tomomasa Takatsuka

IPC: F03G7/00

Abstract: A conductive thin film is composed of a polymer gel including carbon nanotubes, an ionic liquid, and a polymer. At least one selected from the group consisting of fat and oil and a water repellent is included in the polymer gel or in a surface of the polymer gel.

Abstract translation: 导电薄膜由包含碳纳米管，离子液体和聚合物的聚合物凝胶构成。 在聚合物凝胶或聚合物凝胶的表面中包含选自脂肪和油和斥水剂组中的至少一种。

公开(公告)号：US09017146B2

公开(公告)日：2015-04-28

申请号：US14096226

申请日：2013-12-04

Applicant: Fujikoshi Machinery Corp. ,  National Institute of Advanced Industrial Science and Technology

Inventor： Yoshio Nakamura ,  Yoshio Otsuka ,  Takashi Okubo ,  Kazutaka Shibuya ,  Takayuki Fuse ,  Shiro Hara ,  Sommawan Khumpuang ,  Shinichi Ikeda

IPC: B24B37/34 ,  B24B7/22 ,  B24B37/16 ,  B24B53/017 ,  B24B37/10 ,  B24B37/26 ,  B24B37/30

CPC classification number: B24B7/228 ,  B24B37/105 ,  B24B37/16 ,  B24B37/26 ,  B24B37/30 ,  B24B37/345 ,  B24B53/017

Abstract: The wafer polishing apparatus comprises a polishing plate, a polishing head capable of holding a wafer, and a slurry supplying section. The polishing plate includes: a plurality of concentric polishing zones, each of which has a prescribed width for polishing the wafer and on each of which a polishing cloth is adhered; and a groove for discharging slurry being formed between the polishing zones. A head cleaning section, which cleans the polishing head, or a wafer cleaning section, which cleans the polished wafer, is provided to a center part of the polishing plate and located on the inner side of the innermost polishing zone.

Abstract translation: 晶片抛光装置包括抛光板，能够保持晶片的抛光头和浆料供应部分。 抛光板包括：多个同心抛光区，每个同心抛光区具有用于抛光晶片的规定宽度，并且其中每个抛光区附着有抛光布; 以及用于在抛光区之间形成的用于排出浆料的槽。 清洗抛光头的清洁部分或清洁抛光晶片的晶片清洁部分设置在抛光板的中心部分并位于最内侧抛光区的内侧。