公开(公告)号：US20110156227A1

公开(公告)日：2011-06-30

申请号：US12770028

申请日：2010-04-29

Applicant: Pang-Chun Lin ,  Chun-Yuan Li ,  Chien-Ping Huang ,  Chun-Chi Ke

Inventor： Pang-Chun Lin ,  Chun-Yuan Li ,  Chien-Ping Huang ,  Chun-Chi Ke

IPC: H01L23/495

CPC classification number: H01L23/495 ,  H01L21/4832 ,  H01L23/3107 ,  H01L23/4951 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/181 ,  Y10T29/49117 ,  Y10T29/49171 ,  Y10T29/49172 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package structure includes: a dielectric layer; a metal layer disposed on the dielectric layer and having a die pad and traces, the traces each including a trace body, a bond pad extending to the periphery of the die pad, and an opposite trace end; metal pillars penetrating the dielectric layer with one ends thereof connecting to the die pad and the trace ends while the other ends thereof protruding from the dielectric layer; a semiconductor chip mounted on the die pad and electrically connected to the bond pads through bonding wires; and an encapsulant covering the semiconductor chip, the bonding wires, the metal layer, and the dielectric layer. The invention is characterized by disposing traces with bond pads close to the die pad to shorten bonding wires and forming metal pillars protruding from the dielectric layer to avoid solder bridging encountered in prior techniques.

Abstract translation: 半导体封装结构包括：电介质层; 设置在电介质层上并具有芯片焊盘和迹线的金属层，每个迹线包括迹线体，延伸到管芯焊盘周边的接合焊盘和相对的迹线端; 金属柱贯穿电介质层，其一端连接到管芯焊盘并且其端部从电介质层突出; 半导体芯片，安装在芯片焊盘上，并通过接合线电连接到焊盘; 以及覆盖半导体芯片，接合线，金属层和电介质层的密封剂。 本发明的特征在于，将具有接合焊盘的迹线设置在芯片焊盘附近以缩短接合线并形成从电介质层突出的金属柱，以避免在现有技术中遇到的焊料桥接。

公开(公告)号：US20110129966A1

公开(公告)日：2011-06-02

申请号：US13023185

申请日：2011-02-08

Applicant: Yun-Lung Tsai ,  Yu-Chieh Tsai ,  Chien-Chih Chen ,  Chien-Ping Huang

Inventor： Yun-Lung Tsai ,  Yu-Chieh Tsai ,  Chien-Chih Chen ,  Chien-Ping Huang

IPC: H01L21/52

CPC classification number: H01L25/18 ,  H01L21/565 ,  H01L23/04 ,  H01L23/3121 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/15162 ,  H01L2924/181 ,  H01L2924/19105 ,  H05K3/284 ,  H05K2201/09127 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A semiconductor device and a fabrication method thereof are provided. An opening having at least one slanted side is formed on a substrate. At least one chip and at least one passive component are mounted on the substrate. An encapsulant having a cutaway corner is formed on the substrate to encapsulate the chip and the passive component, wherein the cutaway corner of the encapsulant is spaced apart from the slanted side of the opening by a predetermined distance. A singulation process is performed to cut the encapsulant to form a package with a chamfer. The package is embedded in a lid to form the semiconductor device, wherein a portion of the substrate located between the slanted side of the opening and the cutaway corner of the encapsulant is exposed from the encapsulant to form an exposed portion. The present invention also provides a carrier for the semiconductor device.

Abstract translation: 提供半导体器件及其制造方法。 具有至少一个倾斜侧的开口形成在基板上。 至少一个芯片和至少一个无源部件安装在基板上。 在基板上形成具有切口角的密封剂，以封装芯片和无源部件，其中密封剂的切口角与开口的倾斜侧隔开预定距离。 进行切割处理以切割密封剂以形成具有倒角的包装。 封装被嵌入盖子中以形成半导体器件，其中位于开口的倾斜侧和密封剂的切除角之间的基底的一部分从密封剂暴露出来以形成暴露部分。 本发明还提供了一种用于半导体器件的载体。

公开(公告)号：US07884456B2

公开(公告)日：2011-02-08

申请号：US12233170

申请日：2008-09-18

Applicant: Yun-Lung Tsai ,  Yu-Chieh Tsai ,  Chien-Chih Chen ,  Chien-Ping Huang

Inventor： Yun-Lung Tsai ,  Yu-Chieh Tsai ,  Chien-Chih Chen ,  Chien-Ping Huang

IPC: H01L23/02

CPC classification number: H01L25/18 ,  H01L21/565 ,  H01L23/04 ,  H01L23/3121 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/15162 ,  H01L2924/181 ,  H01L2924/19105 ,  H05K3/284 ,  H05K2201/09127 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A semiconductor device and a fabrication method thereof are provided. An opening having at least one slanted side is formed on a substrate. At least one chip and at least one passive component are mounted on the substrate. An encapsulant having a cutaway corner is formed on the substrate to encapsulate the chip and the passive component, wherein the cutaway corner of the encapsulant is spaced apart from the slanted side of the opening by a predetermined distance. A singulation process is performed to cut the encapsulant to form a package with a chamfer. The package is embedded in a lid to form the semiconductor device, wherein a portion of the substrate located between the slanted side of the opening and the cutaway corner of the encapsulant is exposed from the encapsulant to form an exposed portion. The present invention also provides a carrier for the semiconductor device.

Abstract translation: 提供半导体器件及其制造方法。 具有至少一个倾斜侧的开口形成在基板上。 至少一个芯片和至少一个无源部件安装在基板上。 在基板上形成具有切口角的密封剂，以封装芯片和无源部件，其中密封剂的切口角与开口的倾斜侧隔开预定距离。 进行切割处理以切割密封剂以形成具有倒角的包装。 封装被嵌入盖子中以形成半导体器件，其中位于开口的倾斜侧和密封剂的切除角之间的基底的一部分从密封剂暴露出来以形成暴露部分。 本发明还提供了一种用于半导体器件的载体。

公开(公告)号：US20100151631A1

公开(公告)日：2010-06-17

申请号：US12710450

申请日：2010-02-23

Applicant: Han-Ping Pu ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

Inventor： Han-Ping Pu ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC: H01L21/60

CPC classification number: H01L23/473 ,  H01L21/563 ,  H01L23/3157 ,  H01L2224/16225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253

Abstract: A semiconductor package with a heat dissipating device and a fabrication method of the semiconductor package are provided. A chip is mounted on a substrate. The heat dissipating device is mounted on the chip, and includes an accommodating room, and a first opening and a second opening that communicate with the accommodating room. An encapsulant is formed between the heat dissipating device and the substrate to encapsulate the chip. A cutting process is performed to remove a non-electrical part of structure and expose the first and second openings from the encapsulant. A cooling fluid is received in the accommodating room to absorb and dissipate heat produced by the chip. The heat dissipating device covers the encapsulant and the chip to provide a maximum heat transfer area for the semiconductor package.

Abstract translation: 提供了具有散热装置的半导体封装和半导体封装的制造方法。 芯片安装在基板上。 散热装置安装在芯片上，并且包括容纳室，以及与容纳室连通的第一开口和第二开口。 在散热装置和衬底之间形成密封剂以封装芯片。 执行切割处理以去除结构的非电气部分并且从密封剂暴露第一和第二开口。 冷却流体容纳在容纳室中以吸收和散发由芯片产生的热量。 散热装置覆盖密封剂和芯片，以为半导体封装提供最大的传热面积。

公开(公告)号：US07671466B2

公开(公告)日：2010-03-02

申请号：US11647832

申请日：2006-12-29

Applicant: Han-Ping Pu ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

Inventor： Han-Ping Pu ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC: H01L23/34 ,  H05K7/20 ,  H01L21/00

CPC classification number: H01L23/473 ,  H01L21/563 ,  H01L23/3157 ,  H01L2224/16225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253

Abstract: A semiconductor package with a heat dissipating device and a fabrication method of the semiconductor package are provided. A chip is mounted on a substrate. The heat dissipating device is mounted on the chip, and includes an accommodating room, and a first opening and a second opening that communicate with the accommodating room. An encapsulant is formed between the heat dissipating device and the substrate to encapsulate the chip. A cutting process is performed to remove a non-electrical part of structure and expose the first and second openings from the encapsulant. A cooling fluid is received in the accommodating room to absorb and dissipate heat produced by the chip. The heat dissipating device covers the encapsulant and the chip to provide a maximum heat transfer area for the semiconductor package.

Abstract translation: 提供了具有散热装置的半导体封装和半导体封装的制造方法。 芯片安装在基板上。 散热装置安装在芯片上，并且包括容纳室，以及与容纳室连通的第一开口和第二开口。 在散热装置和衬底之间形成密封剂以封装芯片。 执行切割处理以去除结构的非电气部分，并使第一和第二开口与密封剂暴露。 冷却流体容纳在容纳室中以吸收和散发由芯片产生的热量。 散热装置覆盖密封剂和芯片，以为半导体封装提供最大的传热面积。

公开(公告)号：US07666779B2

公开(公告)日：2010-02-23

申请号：US12060379

申请日：2008-04-01

Applicant: Chun-Chi Ke ,  Kook-Jui Tai ,  Chien-Ping Huang

Inventor： Chun-Chi Ke ,  Kook-Jui Tai ,  Chien-Ping Huang

IPC: H01L21/44

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01L2224/05548 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/1147 ,  H01L2224/13022 ,  H01L2224/13027 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/14104 ,  H01L2924/0001 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/013

Abstract: A semiconductor device and a fabrication method thereof are provided. A semiconductor substrate having a plurality of bonding pads is prepared, and a first passivation layer, a second passivation layer and a metallic layer are successively formed on the semiconductor substrate. A third passivation layer is further applied on the semiconductor substrate and has a plurality of openings for exposing a portion of the metallic layer, wherein each of the openings is shifted in position from a corresponding one of the bonding pads by a distance not exceeding a radius of the bonding pad. A plurality of solder bumps are bonded to the exposed portion of the metallic layer and have a larger contact area with the third passivation layer. This provides better buffer to reduce stress exerted on the solder bumps, thereby preventing problems of cracking and delamination as in the prior art.

Abstract translation: 提供半导体器件及其制造方法。 制备具有多个接合焊盘的半导体衬底，并且在半导体衬底上依次形成第一钝化层，第二钝化层和金属层。 第三钝化层进一步施加在半导体衬底上并且具有用于暴露金属层的一部分的多个开口，其中每个开口从对应的一个焊盘移位一定距离不超过半径 的焊盘。 多个焊料凸点与金属层的露出部分接合，并且与第三钝化层具有较大的接触面积。 这提供了更好的缓冲器以减少施加在焊料凸块上的应力，从而防止了现有技术中的开裂和分层问题。

公开(公告)号：US20100041181A1

公开(公告)日：2010-02-18

申请号：US12567611

申请日：2009-09-25

Applicant: Chien-Ping Huang ,  Cheng-Hsu Hsiao

Inventor： Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC: H01L21/78

CPC classification number: H01L23/3675 ,  H01L21/4871 ,  H01L21/50 ,  H01L21/561 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3677 ,  H01L23/4334 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/92147 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A heat dissipating package structure includes a chip carrier; a semiconductor chip mounted and electrically connected to the chip carrier; a heat spreader having a first surface, an opposed second surface and a hollow structure, the second surface of the heat spreader being mounted on the chip, wherein the chip is larger in size than the hollow structure such that the chip is partly exposed to the hollow structure; an encapsulant formed between the heat spreader and the chip carrier, for encapsulating the chip, wherein the first surface and sides of the heat spreader are exposed from the encapsulant to dissipate heat produced from the chip; and a plurality of conductive elements disposed on the chip carrier, for electrically connecting the chip to an external device. The present invention also provides a method for fabricating the heat dissipating package structure.

Abstract translation: 散热封装结构包括芯片载体; 安装并电连接到芯片载体的半导体芯片; 具有第一表面，相对的第二表面和中空结构的散热器，散热器的第二表面安装在芯片上，其中芯片的尺寸大于中空结构，使得芯片部分地暴露于 中空结构; 在散热器和芯片载体之间形成的用于封装芯片的密封剂，其中散热器的第一表面和侧面从密封剂暴露以散发从芯片产生的热量; 以及设置在芯片载体上的多个导电元件，用于将芯片电连接到外部设备。 本发明还提供一种制造散热封装结构的方法。

公开(公告)号：US20090294959A1

公开(公告)日：2009-12-03

申请号：US12315787

申请日：2008-12-04

Applicant: Cheng-Chia Chiang ,  Chin-Huang Chang ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Jung-Pin Huang

Inventor： Cheng-Chia Chiang ,  Chin-Huang Chang ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Jung-Pin Huang

IPC: H01L23/522 ,  H01L23/532 ,  H01L23/28 ,  H01L23/31

CPC classification number: H01L23/4334 ,  H01L21/486 ,  H01L23/31 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49827 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2224/81

Abstract: A semiconductor package device, a semiconductor package structure, and fabrication methods thereof are provided, which mainly includes disposing a plurality of semiconductor chips on a wafer formed with TSVs (Through Silicon Vias) and electrically connecting the semiconductor chips to the TSVs; encapsulating the semiconductor chips with an encapsulant; and disposing a hard component on the encapsulant. The hard component ensures flatness of the wafer during a solder bump process and provides support to the wafer during a singulation process such that the wafer can firmly lie on a singulation carrier, thereby overcoming the drawbacks of the prior art, namely difficulty in mounting of solder bumps, and difficulty in cutting of the wafer.

Abstract translation: 提供了一种半导体封装器件，半导体封装结构及其制造方法，其主要包括在形成有TSV（透硅通孔）的晶片上设置多个半导体芯片，并将半导体芯片与TSV电连接; 用密封剂封装半导体芯片; 并将硬组分设置在密封剂上。 硬组件确保了在焊料凸块工艺期间晶片的平整度，并且在单独化处理期间提供对晶片的支撑，使得晶片可以牢固地位于单个载体上，从而克服现有技术的缺点，即难以安装焊料 碰撞，切割晶片难度大。

公开(公告)号：US07615862B2

公开(公告)日：2009-11-10

申请号：US11161882

申请日：2005-08-19

Applicant: Chien-Ping Huang ,  Cheng-Hsu Hsiao

Inventor： Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC: H01L23/34 ,  H01L23/10

CPC classification number: H01L23/3675 ,  H01L21/4871 ,  H01L21/50 ,  H01L21/561 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3677 ,  H01L23/4334 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/92147 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A heat dissipating package structure includes a chip carrier; a semiconductor chip mounted and electrically connected to the chip carrier; a heat spreader having a first surface, an opposed second surface and a hollow structure, the second surface of the heat spreader being mounted on the chip, wherein the chip is larger in size than the hollow structure such that the chip is partly exposed to the hollow structure; an encapsulant formed between the heat spreader and the chip carrier, for encapsulating the chip, wherein the first surface and sides of the heat spreader are exposed from the encapsulant to dissipate heat produced from the chip; and a plurality of conductive elements disposed on the chip carrier, for electrically connecting the chip to an external device. The present invention also provides a method for fabricating the heat dissipating package structure.

Abstract translation: 散热封装结构包括芯片载体; 安装并电连接到芯片载体的半导体芯片; 具有第一表面，相对的第二表面和中空结构的散热器，散热器的第二表面安装在芯片上，其中芯片的尺寸大于中空结构，使得芯片部分地暴露于 中空结构; 在散热器和芯片载体之间形成的用于封装芯片的密封剂，其中散热器的第一表面和侧面从密封剂暴露以散发从芯片产生的热量; 以及设置在芯片载体上的多个导电元件，用于将芯片电连接到外部设备。 本发明还提供一种制造散热封装结构的方法。

公开(公告)号：US20090093089A1

公开(公告)日：2009-04-09

申请号：US12241847

申请日：2008-09-30

Applicant: Chien-Ping Huang ,  Chih-Ming Huang

Inventor： Chien-Ping Huang ,  Chih-Ming Huang

IPC: H01L21/02

CPC classification number: H01L23/3677 ,  H01L21/4871 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/3733 ,  H01L23/4334 ,  H01L23/49548 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/351 ,  Y10T29/49126 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A heat dissipating semiconductor package and a fabrication method thereof are provided. A semiconductor chip is mounted on a chip carrier. A heat sink is mounted on the chip, and includes an insulating core layer, a thin metallic layer formed on each of an upper surface and a lower surface of the insulating core layer and a thermal via hole formed in the insulating core layer. A molding process is performed to encapsulate the chip and the heat sink with an encapsulant to form a package unit. A singulation process is performed to peripherally cut the package unit. A part of the encapsulant above the thin metallic layer on the upper surface of the heat sink is removed, such that the thin metallic layer on the upper surface of the heat sink is exposed, and heat generated by the chip can be dissipated through the heat sink.

Abstract translation: 提供散热半导体封装及其制造方法。 半导体芯片安装在芯片载体上。 散热器安装在芯片上，并且包括绝缘芯层，形成在绝缘芯层的上表面和下表面中的每一个上的薄金属层和形成在绝缘芯层中的热通孔。 进行成型工艺以用密封剂封装芯片和散热器以形成封装单元。 执行单个处理以周边地切割包装单元。 在散热器的上表面上的薄金属层上方的一部分密封剂被去除，使得散热器上表面上的薄金属层被暴露，并且由芯片产生的热量可以通过热量散发 水槽。