公开(公告)号：US20080238323A1

公开(公告)日：2008-10-02

申请号：US11730404

申请日：2007-04-02

Applicant: Benson Chan ,  John E. Kozol ,  John M. Lauffer ,  How T. Lin

Inventor： Benson Chan ,  John E. Kozol ,  John M. Lauffer ,  How T. Lin

IPC: H01J7/44

CPC classification number: F21V29/70 ,  F21K9/00 ,  F21K9/69 ,  F21V29/85 ,  F21W2131/202 ,  F21W2131/205 ,  F21Y2115/10 ,  H05K1/189 ,  H05K3/284 ,  H05K2201/10106

Abstract: An LED lighting assembly including a plurality of individual LEDs mounted on a common, bendable heat sinking member designed to remove heat from the LEDs during operation and also to be formed (bent) to provide the desired light direction and intensity. Several such assemblies may be used within an LED lamp, as also provided herein. The lamp is ideal for use within medical and dental environments to assure optimal light onto a patient located at a specified distance from the lamp.

Abstract translation: 一种LED照明组件，包括安装在公共的可弯曲的散热构件上的多个单独的LED，该散热构件被设计成在操作期间从LED移除热量并且还被形成（弯曲）以提供期望的光的方向和强度。 如本文也提供的，LED灯内可以使用若干这样的组件。 该灯是理想的在医疗和牙科环境中使用，以确保最佳的光照射到距离灯具指定距离的患者。

公开(公告)号：US07429510B2

公开(公告)日：2008-09-30

申请号：US11352276

申请日：2006-02-13

Applicant: Rabindra N. Das ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

Inventor： Rabindra N. Das ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

IPC: H01L21/8242 ,  H05K1/16

CPC classification number: H05K1/162 ,  H05K1/113 ,  H05K3/0023 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2203/0568

Abstract: A method of forming a capacitive substrate in which at least one capacitive dielectric layer of material is screen or ink jet printed onto a conductor and the substrate is thereafter processed further, including the addition of thru-holes to couple selected elements within the substrate to form at least two capacitors as internal elements of the substrate. Photoimageable material is used to facilitate positioning of the capacitive dielectric being printed. The capacitive substrate may be incorporated within a larger circuitized substrate, e.g., to form an electrical assembly. A method of making an information handling system including such substrates is also provided.

Abstract translation: 一种形成电容衬底的方法，其中材料的至少一个电容介电层被屏幕或喷墨印刷到导体上，然后进一步处理衬底，包括添加通孔以将所选择的元件耦合到衬底内以形成 至少两个电容器作为衬底的内部元件。 可光成像材料用于促进正在印刷的电容电介质的定位。 电容性衬底可以结合在更大的电路化衬底内，例如以形成电组件。 还提供了一种制造包括这种基板的信息处理系统的方法。

公开(公告)号：US06827505B2

公开(公告)日：2004-12-07

申请号：US10320844

申请日：2002-12-16

Applicant: Subhash L. Shinde ,  L. Wynn Herron ,  Mario J. Interrante ,  How T. Lin ,  Steven P. Ostrander ,  Sudipta K. Ray ,  William E. Sablinski ,  Hilton Toy

Inventor： Subhash L. Shinde ,  L. Wynn Herron ,  Mario J. Interrante ,  How T. Lin ,  Steven P. Ostrander ,  Sudipta K. Ray ,  William E. Sablinski ,  Hilton Toy

IPC: G02B636

CPC classification number: G02B6/4201 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014

Abstract: An optical-electronic package for an electronic device provides electrical connections to the electronic device and optical fiber connections to the electronic device. The package includes a high thermal conductivity base which has a pedestal to support and provide heat transfer connection to the electronic device. A seal band is formed on the base and a casing is bonded to the seal band. The casing has side feedthroughs for the electrical connections from the electronic device, and the casing has top feedthroughs or grooves for the optical fiber connections from the electronic device. A lid is hermetically sealed to the top of the casing. The lid has retractable means for forming a bend in the optical fibers to provide strain relief when the lid is placed on the casing. The retractable means for forming a bend in the optical fibers is retractable once the lid is sealed on the casing.

公开(公告)号：US07713767B2

公开(公告)日：2010-05-11

申请号：US11907004

申请日：2007-10-09

Applicant: Benson Chan ,  How T. Lin ,  Roy H. Magnuson ,  Voya R. Markovich ,  Mark D. Poliks

Inventor： Benson Chan ,  How T. Lin ,  Roy H. Magnuson ,  Voya R. Markovich ,  Mark D. Poliks

IPC: H01L21/77 ,  H01L21/00 ,  G02B6/02 ,  G02B6/12 ,  G03G15/00

CPC classification number: G02B6/43 ,  G02B6/132 ,  G02B6/136 ,  H05K1/0274

Abstract: A method of making a circuitized substrate (e.g., PCB) including at least one and possibly several internal optical pathways as part thereof such that the resulting substrate will be capable of transmitting and/or receiving both electrical and optical signals. The method involves forming at least one opening between a side of the optical core and an adjacent upstanding member such that the opening is defined by at least one angular sidewall. Light passing through the optical core material (or into the core from above) is reflected off this angular sidewall. The medium (e.g., air) within the opening thus also serves as a reflecting medium due to its own reflective index in comparison to that of the adjacent optical core material. The method utilizes many processes used in conventional PCB manufacturing, thereby keeping costs to a minimum. The formed substrate is capable of being both optically and electrically coupled to one or more other substrates possessing similar capabilities, thereby forming an electro-optical assembly of such substrates.

Abstract translation: 一种制造电路化衬底（例如PCB）的方法，其包括至少一个可能的几个内部光学路径作为其一部分，使得所得到的衬底将能够传输和/或接收电信号和光信号。 该方法包括在光学核心的一侧和相邻的直立构件之间形成至少一个开口，使得开口由至少一个角形侧壁限定。 通过光学芯材料（或从上方进入芯体）的光从该角形侧壁反射。 因此，开口内的介质（例如空气）由于其相对于相邻的光学芯材料的反射率而与反射介质一样起作用。 该方法利用了常规PCB制造中使用的许多工艺，从而将成本降至最低。 所形成的基底能够光学和电耦合到具有相似能力的一个或多个其它基底，从而形成这种基底的电光学组件。

公开(公告)号：US07326643B2

公开(公告)日：2008-02-05

申请号：US11808596

申请日：2007-06-12

Applicant: Subahu D. Desai ,  How T. Lin ,  John M. Lauffer ,  Voya R. Markovich ,  David L. Thomas

Inventor： Subahu D. Desai ,  How T. Lin ,  John M. Lauffer ,  Voya R. Markovich ,  David L. Thomas

IPC: H01L21/4751

CPC classification number: G11C11/22 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K1/16 ,  H05K2201/0166 ,  H05K2201/0179 ,  H05K2201/09763 ,  H05K2201/10159 ,  H01L2224/0401

Abstract: A method of making circuitized substrate comprised of at least one dielectric material having an electrically conductive pattern thereon. At least part of the pattern is used as the first layer of an organic memory device which further includes at least a second dielectric layer over the pattern and a second pattern aligned with respect to the lower part for achieving several points of contact to thus form the device.

Abstract translation: 一种制造电路化衬底的方法，所述电路化衬底由其上具有导电图案的至少一种电介质材料组成。 图案的至少一部分被用作有机存储器件的第一层，该有机存储器件还包括在图案上方的至少第二介电层和相对于下部对准的第二图案，用于实现几个接触点，从而形成 设备。

公开(公告)号：US07253502B2

公开(公告)日：2007-08-07

申请号：US10900385

申请日：2004-07-28

Applicant: Subahu D. Desai ,  How T. Lin ,  John M. Lauffer ,  Voya R. Markovich ,  David L. Thomas

Inventor： Subahu D. Desai ,  How T. Lin ,  John M. Lauffer ,  Voya R. Markovich ,  David L. Thomas

IPC: H01L23/58

CPC classification number: G11C11/22 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K1/16 ,  H05K2201/0166 ,  H05K2201/0179 ,  H05K2201/09763 ,  H05K2201/10159 ,  H01L2224/0401

Abstract: A circuitized substrate comprised of at least one dielectric material having an electrically conductive pattern thereon. At least part of the pattern is used as the first layer of an organic memory device which further includes at least a second dielectric layer over the pattern and a second pattern aligned with respect to the lower part for achieving several points of contact to thus form the device. The substrate is preferably combined with other dielectric-circuit layered assemblies to form a multilayered substrate on which can be positioned discrete electronic components (e.g., a logic chip) coupled to the internal memory device to work in combination therewith. An electrical assembly capable of using the substrate is also provided, as is an information handling system adapted for using one or more such electrical assemblies as part thereof.

Abstract translation: 一种电路化衬底，由至少一层具有导电图案的电介质材料构成。 图案的至少一部分被用作有机存储器件的第一层，该有机存储器件还包括在图案上方的至少第二介电层和相对于下部对准的第二图案，用于实现几个接触点，从而形成 设备。 衬底优选地与其它介电电路分层组件组合以形成多层衬底，在多层衬底上，可以将耦合到内部存储器件的分立电子部件（例如，逻辑芯片）放置在其上以与之组合工作。 还提供了能够使用基板的电气组件，以及适于使用一个或多个这样的电气组件作为其一部分的信息处理系统。

公开(公告)号：US06982387B2

公开(公告)日：2006-01-03

申请号：US09884778

申请日：2001-06-19

Applicant: Richard R. Hall ,  How T. Lin ,  Christopher J. Majka ,  Matthew F. Seward ,  Ronald V. Smith

Inventor： Richard R. Hall ,  How T. Lin ,  Christopher J. Majka ,  Matthew F. Seward ,  Ronald V. Smith

IPC: H01R12/04 ,  H05K1/11

CPC classification number: H05K3/4046 ,  H05K3/4614 ,  H05K2201/0382 ,  H05K2201/096 ,  H05K2201/10234 ,  H05K2201/10416

Abstract: A method and associated structure for forming a conductive path within a laminate. A conductive element is presses into an opening in the laminate such that portion of at least one end of the conductive element extends beyond a surface of the laminate. A compressive pressure is applied to the portion of the at least one end of the conductive element. The compressive pressure applied to the at least one end of the conductive element forms a contact pad extending beyond the surface of the laminate. The conductive element may include an inner element covered by an outer element.

Abstract translation: 一种用于在层压板内形成导电路径的方法和相关结构。 导电元件被压入层压板中的开口中，使得导电元件的至少一端的一部分延伸超过层压体的表面。 对导电元件的至少一个端部的部分施加压缩压力。 施加到导电元件的至少一个端部的压缩压力形成延伸超过层压体表面的接触垫。 导电元件可以包括被外部元件覆盖的内部元件。

公开(公告)号：US06828514B2

公开(公告)日：2004-12-07

申请号：US10354000

申请日：2003-01-30

Applicant: Benson Chan ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich ,  David L. Thomas

Inventor： Benson Chan ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich ,  David L. Thomas

IPC: H05K706

CPC classification number: H05K3/4688 ,  H01L23/3128 ,  H01L23/5383 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/024 ,  H05K1/113 ,  H05K3/4623 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2203/061 ,  Y10T29/49126 ,  Y10T29/49165 ,  H01L2224/0401

Abstract: A multilayered PCB including two multilayered portions, one of these able to electrically connect electronic components mounted on the PCB to assure high frequency connections therebetween. The PCB further includes a conventional PCB portion to reduce costs while assuring a structure having a satisfactory overall thickness for use in the PCB field. Coupling is also possible to the internal portion from these components. Methods of making these structures have also been provided.

Abstract translation: 包括两个多层部分的多层PCB，其中之一能够电连接安装在PCB上的电子部件，以确保其间的高频连接。 PCB还包括常规PCB部分以降低成本，同时确保具有令人满意的整体厚度的结构以用于PCB领域。 这些组件的内部部分也可以进行耦合。 也提供了制造这些结构的方法。

公开(公告)号：US06527457B2

公开(公告)日：2003-03-04

申请号：US09775725

申请日：2001-02-01

Applicant: Benson Chan ,  Richard R. Hall ,  How T. Lin ,  John H. Sherman

Inventor： Benson Chan ,  Richard R. Hall ,  How T. Lin ,  John H. Sherman

IPC: G02B636

CPC classification number: G02B6/4249 ,  G02B6/3644 ,  G02B6/3664 ,  G02B6/3696 ,  G02B6/3834 ,  G02B6/3847 ,  G02B6/3855 ,  G02B6/4224 ,  G02B6/4238 ,  G02B6/424 ,  G02B6/4257 ,  G02B6/4267

Abstract: An optical fiber guide includes a matrix of holes integrated directly into a substrate on which one or more optical chips are mounted. The substrate therefore functions both as a guide for optically coupling a plurality of optical fibers to an optical chip, as well as a carrier for the optical chip itself. The size of the fiber guide and its integration density is therefore improved over conventional fiber connectors. The substrate is preferably made of a material having a coefficient of thermal expansion substantially similar to the coefficient of thermal expansion of the optical chip. This ensures that the optical fibers will remain optically coupled to the chip through the matrix of holes in the substrate regardless of external temperature influences. If desired, integrated circuits may be mounted onto the substrate to increase the functionality of the fiber guide. A method for making the fiber guide has fewer process steps than conventional methods because fiber guide has fewer parts than conventional fiber-optic connectors.

公开(公告)号：US5290992A

公开(公告)日：1994-03-01

申请号：US957969

申请日：1992-10-07

Applicant: How T. Lin ,  Mark V. Pierson

Inventor： How T. Lin ,  Mark V. Pierson

IPC: B23K26/06 ,  B23K26/067 ,  G03F7/20

CPC classification number: B23K26/0673 ,  B23K26/066 ,  B23K26/067 ,  G03F7/2002 ,  G03F7/70291 ,  G03F7/70991

Abstract: The present invention is an apparatus and method for maximizing light beam utilization in patterning applications by positioning a plurality of mask mirrors in the light beam path to form patterned light onto a plurality of work pieces. Each mask mirror is designed so that a portion of the light beam area needed for exposing a work piece to patterned light is reflected from the mask mirror, while the remainder is passed through the mask mirror to another mask mirror. Alternatively, each mask mirror can be designed so that a portion of the light beam area needed for exposing a work piece to patterned light is passed through the mask mirror, while the remainder is reflected to another mask mirror.

Abstract translation: 本发明是一种用于通过在光束路径中定位多个掩模反射镜以在多个工件上形成图案化光来最大化图案化应用中的光束利用的装置和方法。 每个掩模镜被设计成使得用于将工件暴露于图案化光所需的光束区域的一部分从掩模反射镜反射，而其余部分通过掩模镜到另一个掩模反射镜。 或者，每个掩模反射镜可被设计成使得将工件暴露于图案化光所需的光束区域的一部分通过掩模反射镜，而剩余部分被反射到另一个掩模反射镜。