公开(公告)号：US09647165B2

公开(公告)日：2017-05-09

申请号：US14830870

申请日：2015-08-20

Applicant: GLOBALFOUNDRIES INC.

Inventor： Steven M. Shank ,  John J. Ellis-Monaghan ,  Marwan H. Khater ,  Jason S. Orcutt

IPC: H01L31/105 ,  H01L31/0232 ,  H01L31/109 ,  H01L31/028 ,  H01L31/0352 ,  H01L31/18

CPC classification number: H01L31/1812 ,  H01L31/022408 ,  H01L31/028 ,  H01L31/0312 ,  H01L31/035272 ,  H01L31/03529 ,  H01L31/03921 ,  H01L31/1037 ,  H01L31/109 ,  H01L31/1864 ,  H01L31/1872 ,  Y02E10/50

Abstract: Various particular embodiments include a method for forming a photodetector, including: forming a structure including a barrier layer disposed between a layer of doped silicon (Si) and a layer of germanium (Ge), the barrier layer including a crystallization window; and annealing the structure to convert, via the crystallization window, the Ge to a first composition of silicon germanium (SiGe) and the doped Si to a second composition of SiGe.

公开(公告)号：US09466753B1

公开(公告)日：2016-10-11

申请号：US14837812

申请日：2015-08-27

Applicant: GLOBALFOUNDRIES INC.

Inventor： John J. Ellis-Monaghan ,  John C. S. Hall ,  Marwan H. Khater ,  Edward W. Kiewra ,  Steven M. Shank

IPC: H01L31/18 ,  H01L31/103 ,  H01L31/0203 ,  H01L31/028 ,  H01L27/144

CPC classification number: H01L31/1808 ,  H01L27/1443 ,  H01L27/1446 ,  H01L27/14629 ,  H01L31/0203 ,  H01L31/02161 ,  H01L31/02327 ,  H01L31/028 ,  H01L31/103 ,  H01L31/105 ,  H01L31/1872

Abstract: Disclosed are a method of forming a photodetector and a photodetector structure. In the method, a polycrystalline or amorphous light-absorbing layer is formed on a dielectric layer such that it is in contact with a monocrystalline semiconductor core of an optical waveguide. The light-absorbing layer is then encapsulated in one or more strain-relief layers and a rapid melting growth (RMG) process is performed to crystallize the light-absorbing layer. The strain-relief layer(s) are tuned for controlled strain relief so that, during the RMG process, the light-absorbing layer remains crack-free. The strain-relief layer(s) are then removed and an encapsulation layer is formed over the light-absorbing layer (e.g., filling in surface pits that developed during the RMG process). Subsequently, dopants are implanted through the encapsulation layer to form diffusion regions for PIN diode(s). Since the encapsulation layer is relatively thin, desired dopant profiles can be achieved within the diffusion regions.

Abstract translation: 公开了一种形成光电检测器和光电检测器结构的方法。 在该方法中，在电介质层上形成多晶或非晶光吸收层，使其与光波导的单晶半导体芯接触。 然后将光吸收层封装在一个或多个应变消除层中，并进行快速熔融生长（RMG）工艺以使光吸收层结晶。 调节应变消除层以控制应变消除，使得在RMG过程期间，光吸收层保持无裂纹。 然后去除应变消除层，并且在光吸收层上形成封装层（例如，填充在RMG工艺期间产生的表面凹坑中）。 随后，通过封装层注入掺杂剂以形成用于PIN二极管的扩散区域。 由于封装层相对较薄，所以可以在扩散区域内实现所需的掺杂分布。

公开(公告)号：US09397203B2

公开(公告)日：2016-07-19

申请号：US14677460

申请日：2015-04-02

Applicant: GLOBALFOUNDRIES INC.

Inventor： John Z. Colt, Jr. ,  John J. Ellis-Monaghan ,  Leah M. Pastel ,  Steven M. Shank

IPC: H01L29/66 ,  H01L29/737 ,  H01L29/735 ,  H01L29/06 ,  H01L29/10 ,  H01L29/08 ,  H01L29/73

CPC classification number: H01L29/737 ,  H01L29/0649 ,  H01L29/0821 ,  H01L29/1008 ,  H01L29/66242 ,  H01L29/6625 ,  H01L29/66265 ,  H01L29/7317 ,  H01L29/735

Abstract: Device structures, fabrication methods, and design structures for a bipolar junction transistor. A first terminal of the bipolar junction transistor is formed from a section of a device layer of a semiconductor-on-insulator wafer. An intrinsic base of the bipolar junction transistor is formed from an epitaxially-grown section of a first semiconductor layer, which is coextensive with a sidewall of the section of the device layer. A second terminal of the bipolar junction transistor is formed from a second semiconductor layer that is coextensive with the epitaxially-grown section of the first semiconductor layer. The epitaxially-grown section of a first semiconductor layer defines a first junction with the section of the device layer, and the second semiconductor layer defines a second junction with the epitaxially-grown section of the first semiconductor layer.

公开(公告)号：US20210057462A1

公开(公告)日：2021-02-25

申请号：US16544074

申请日：2019-08-19

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Anthony K. Stamper ,  Vibhor Jain ,  Steven M. Shank ,  John J. Ellis-Monaghan ,  John J. Pekarik

IPC: H01L27/144 ,  H01L29/04 ,  H01L29/165 ,  H01L29/737 ,  H01L29/06 ,  H01L29/66 ,  H01L31/0312 ,  H01L31/02 ,  H01L31/105 ,  H01L31/18

Abstract: Structures including a photodiode and methods of fabricating such structures. A substrate has a top surface, a well, and a trench extending from the top surface to the well. A photodiode is positioned in the trench. The photodiode includes an electrode that is provided by a first portion of the well. A bipolar junction transistor has an emitter that is positioned over the top surface of the substrate and a subcollector that is positioned below the top surface of the substrate. The subcollector is provided by a second portion of the well.

公开(公告)号：US10833072B1

公开(公告)日：2020-11-10

申请号：US16404161

申请日：2019-05-06

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Siva P. Adusumilli ,  Anthony K. Stamper ,  Mark Levy ,  Vibhor Jain ,  John J. Ellis-Monaghan

IPC: H01L27/082 ,  H01L29/737 ,  H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L21/8222 ,  H01L21/225 ,  H01L21/311 ,  H01L27/06 ,  H01L21/762 ,  H01L23/544

Abstract: Structures for a heterojunction bipolar transistor and methods of fabricating such structures. A hardmask is formed that includes an opening over a first portion of a substrate in a first device region and a shape over a second portion of the substrate in a second device region. An oxidized region in the first portion of the substrate while the shape blocks oxidation of the second portion of the substrate. The oxidized region is subsequently removed from the first portion of the substrate to define a recess. A first base and a first emitter of a first heterojunction bipolar transistor are formed over the first portion of the substrate in the first device region, and a second base and a second emitter of a second heterojunction bipolar transistor are formed in the recess over the second portion of the substrate in the second device region.

公开(公告)号：US10712498B2

公开(公告)日：2020-07-14

申请号：US16216321

申请日：2018-12-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： John J. Ellis-Monaghan ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Kirk D. Peterson ,  Jed H. Rankin

IPC: G02B27/01 ,  A61B3/113 ,  G02B6/34 ,  G02B6/42 ,  G02F1/29 ,  G02F1/313 ,  G06K9/00 ,  G06K9/62 ,  G02B27/00 ,  G02F1/31 ,  G02B6/122 ,  G02B6/136 ,  G02B6/125 ,  G02B6/132 ,  G02B6/12 ,  G02B1/04

Abstract: Methods and structures for shielding optical waveguides are provided. A method includes forming a first optical waveguide core and forming a second optical waveguide core adjacent to the first optical waveguide core. The method also includes forming an insulator layer over the first optical waveguide core and the second optical waveguide core. The method further includes forming a shielding structure in the insulator layer between the first optical waveguide core and the second optical waveguide core.

公开(公告)号：US10651281B1

公开(公告)日：2020-05-12

申请号：US16207915

申请日：2018-12-03

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Siva P. Adusumilli ,  John J. Ellis-Monaghan ,  Anthony K. Stamper ,  Ian McCallum-Cook ,  Mark Goldstein

IPC: H01L29/32 ,  H01L29/66 ,  H01L29/786 ,  H01L21/265 ,  C23C16/48 ,  H01L21/762 ,  C23C16/40 ,  H01L29/04 ,  H01L21/266

Abstract: Structures with altered crystallinity beneath semiconductor devices and methods associated with forming such structures. A semiconductor layer is implanted over a first depth range of an inert gas species to modify the crystal structure of a semiconductor material of the semiconductor layer and form a first modified region. The semiconductor layer is annealed with a first annealing process to convert the semiconductor material within the first modified region to a non-single-crystal layer. The semiconductor layer is also implanted with ions of an element over a second depth range to modify the crystal structure of the semiconductor material of the semiconductor layer and form a second modified region containing a concentration of the element. The semiconductor layer is annealed with a second annealing process to convert the semiconductor material within the second modified region to an insulator layer containing the element.

公开(公告)号：US20200058734A1

公开(公告)日：2020-02-20

申请号：US16103357

申请日：2018-08-14

Applicant: GlobalFoundries Inc.

Inventor： Anupam DUTTA ,  John J. Ellis-Monaghan

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/66

Abstract: The present disclosure relates to a semiconductor device, and more particularly, to a junctionless/accumulation mode transistor with dynamic control and method of manufacturing. The circuit includes a channel region and a threshold voltage control on at least one side of the channel region, the threshold voltage control being configured to provide dynamic control of a voltage threshold, leakage current, and breakdown voltage of the circuit, wherein the threshold voltage control is a different dopant or material of a source region and a drain region of the circuit.

公开(公告)号：US10197730B1

公开(公告)日：2019-02-05

申请号：US15806931

申请日：2017-11-08

Applicant: GLOBALFOUNDRIES INC.

Inventor： Yves T. Ngu ,  Vibhor Jain ,  John J. Ellis-Monaghan ,  Sebastian Theodore Ventrone ,  Saurabh Sirohi

IPC: G02B6/12 ,  G02B6/293 ,  G02F1/01 ,  G02F1/025

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to optical via connections in chip-to-chip transmission in a 3D chip stack structure using an optical via, and methods of manufacture. The structure has a first wafer, including a first waveguide coupled to an optical resonator in the first wafer, and a second wafer, including a second waveguide, located over the first wafer. The structure also includes an optical via extending between the optical resonator of the first wafer and the second waveguide of the second wafer to optically couple the first and second waveguides.

公开(公告)号：US10163955B2

公开(公告)日：2018-12-25

申请号：US15671223

申请日：2017-08-08

Applicant: GLOBALFOUNDRIES INC.

Inventor： John J. Ellis-Monaghan ,  Qizhi Liu ,  Steven M. Shank

IPC: H01L27/146 ,  H01L31/101 ,  G02B6/42 ,  H01L31/0232 ,  H01L21/762

Abstract: Disclosed are structures and methods of forming the structures so as to have a photodetector isolated from a substrate by stacked trench isolation regions. In one structure, a first trench isolation region is in and at the top surface of a substrate and a second trench isolation region is in the substrate below the first. A photodetector is on the substrate aligned above the first and second trench isolation regions. In another structure, a semiconductor layer is on an insulator layer and laterally surrounded by a first trench isolation region. A second trench isolation region is in and at the top surface of a substrate below the insulator layer and first trench isolation region. A photodetector is on the semiconductor layer and extends laterally onto the first trench isolation region. The stacked trench isolation regions provide sufficient isolation below the photodetector to allow for direct coupling with an off-chip optical fiber.