Sacrificial dielectric planarization layer
    32.
    发明授权
    Sacrificial dielectric planarization layer 失效
    牺牲电介质平坦化层

    公开(公告)号:US06908863B2

    公开(公告)日:2005-06-21

    申请号:US10674579

    申请日:2003-09-29

    摘要: A method of forming a microelectronic structure and its associated structures is described. In one embodiment, a substrate is provided with a sacrificial layer disposed on a hard mask layer, and a metal layer disposed in a trench of the substrate and on the sacrificial layer. The metal layer is then removed at a first removal rate wherein a dishing is induced on a top surface of the metal layer until the sacrificial layer is exposed, and simultaneously removing the metal layer and the sacrificial layer at a second removal rate without substantially removing the hard mask.

    摘要翻译: 描述了形成微电子结构及其相关结构的方法。 在一个实施例中,衬底设置有设置在硬掩模层上的牺牲层,以及设置在衬底的沟槽中和牺牲层上的金属层。 然后以第一去除速率去除金属层,其中在金属层的顶表面上诱导凹陷,直到牺牲层被暴露,同时以第二移除速率去除金属层和牺牲层,而基本上不去除 硬面膜

    Through-pad slurry delivery for chemical-mechanical polish
    33.
    发明授权
    Through-pad slurry delivery for chemical-mechanical polish 有权
    用于化学机械抛光的通垫浆料输送

    公开(公告)号:US06705928B1

    公开(公告)日:2004-03-16

    申请号:US10262285

    申请日:2002-09-30

    申请人: Chris E. Barns

    发明人: Chris E. Barns

    IPC分类号: B24B100

    摘要: The present invention describes an apparatus that includes a polish pad, the polish pad including a first through-opening; a vertical distribution layer located below the polish pad, the vertical distribution layer connected to the through-opening; a lateral distribution layer located below the vertical distribution layer, the lateral distribution layer connected to the vertical distribution layer; and a slurry dispense located over a front-side of the polish pad, the slurry dispense to provide a slurry to be transported through the polish pad to the lateral distribution layer. The present invention further describes a method including dispensing a slurry at a front-side of a polish pad; flowing the slurry to a location below the polish pad; flowing the slurry upwards and outwards, towards edges of the polish pad; and distributing the slurry to an upper surface of the polish pad.

    摘要翻译: 本发明描述了一种包括抛光垫的装置,抛光垫包括第一通孔; 位于抛光垫下方的垂直分布层,垂直分布层连接到通孔; 位于所述垂直分布层下方的横向分布层,所述横向分布层连接到所述垂直分布层; 以及位于抛光垫的前侧上的浆料分配,浆料分配以提供待通过抛光垫输送到侧向分布层的浆料。本发明还描述了一种方法,包括在前端分配浆料, 抛光垫的一面 将浆料流到抛光垫下方的位置; 将浆料向上和向外流向抛光垫的边缘; 并将浆料分配到抛光垫的上表面。

    Semiconductor substrate polishing methods and equipment
    35.
    发明授权
    Semiconductor substrate polishing methods and equipment 有权
    半导体衬底抛光方法和设备

    公开(公告)号:US07205236B2

    公开(公告)日:2007-04-17

    申请号:US10952655

    申请日:2004-09-28

    IPC分类号: H01L21/461 H01L21/302

    摘要: According to one aspect of the present invention, a method of electrochemically polishing a semiconductor substrate may be provided. A semiconductor substrate processing fluid, having a plurality of abrasive particles therein, may be placed between the surface of the semiconductor substrate and the polish head. The polish head may be moved relative to the surface of the semiconductor substrate to cause the abrasive particles to polish the surface of the semiconductor substrate. According to a second aspect of the present invention, a method for electro-polishing a semiconductor substrate may be provided. A semiconductor substrate may be placed in an electrolytic solution. A surface of the semiconductor substrate may be contacted with at least one conductive member. A voltage may be applied across the electrolytic solution and the at least one conductive member. The at least one conductive member may be moved across the surface of the semiconductor substrate.

    摘要翻译: 根据本发明的一个方面,可以提供一种电化学抛光半导体衬底的方法。 可以在半导体衬底的表面和抛光头之间放置其中具有多个磨料颗粒的半导体衬底处理流体。 抛光头可以相对于半导体衬底的表面移动,以使研磨颗粒抛光半导体衬底的表面。 根据本发明的第二方面,可以提供一种用于电抛光半导体衬底的方法。 可以将半导体衬底放置在电解液中。 半导体衬底的表面可以与至少一个导电构件接触。 可以在电解液和至少一个导电构件之间施加电压。 至少一个导电构件可以跨过半导体衬底的表面移动。

    REDUCTION OF LINE EDGE ROUGHNESS BY CHEMICAL MECHANICAL POLISHING
    36.
    发明申请
    REDUCTION OF LINE EDGE ROUGHNESS BY CHEMICAL MECHANICAL POLISHING 审中-公开
    通过化学机械抛光减少线边缘粗糙度

    公开(公告)号:US20080160256A1

    公开(公告)日:2008-07-03

    申请号:US11618752

    申请日:2006-12-30

    IPC分类号: G03F7/26 B32B1/00

    摘要: The present invention describes a method including: providing a wafer; applying a photoresist over the wafer; forming a first set of features in the photoresist; etching a hard mask below the photoresist to form a second set of features in the hard mask; removing the photoresist; etching a polysilicon below the hardmask to form a third set of features in the polysilicon; removing the hard mask; and reducing a line edge roughness in the third set of features.

    摘要翻译: 本发明描述了一种方法,包括:提供晶片; 在晶片上施加光致抗蚀剂; 在光致抗蚀剂中形成第一组特征; 蚀刻光致抗蚀剂下方的硬掩模以在硬掩模中形成第二组特征; 去除光致抗蚀剂; 在硬掩模之下蚀刻多晶硅以在多晶硅中形成第三组特征; 去除硬面膜; 并减少第三组特征中的线边缘粗糙度。

    Selectively converted inter-layer dielectric
    37.
    发明授权
    Selectively converted inter-layer dielectric 有权
    选择性转换的层间电介质

    公开(公告)号:US07239019B2

    公开(公告)日:2007-07-03

    申请号:US11170322

    申请日:2005-06-28

    IPC分类号: H01L23/48 H01L23/52 H01L29/40

    摘要: An inter-layer dielectric structure and method of making such structure are disclosed. A composite dielectric layer, initially comprising a porous matrix and a porogen, is formed. Subsequent to other processing treatments, the porogen is decomposed and removed from at least a portion of the porous matrix, leaving voids defined by the porous matrix in areas previously occupied by the porogen. The resultant structure has a desirably low k value as a result of the porosity and materials comprising the porous matrix and porogen. The composite dielectric layer may be used in concert with other dielectric layers of varying porosity, dimensions, and material properties to provide varied mechanical and electrical performance profiles.

    摘要翻译: 公开了一种层间电介质结构及其制造方法。 形成初始包含多孔基质和致孔剂的复合介电层。 在其它处理处理之后,致孔剂从多孔基体的至少一部分分解和除去,留下由多孔基质定义的空隙,其中先前由致孔剂占据的区域。 所得结构由于孔隙率和包含多孔基质和致孔剂的材料而具有期望的低k值。 复合介电层可以与具有不同孔隙率,尺寸和材料性质的其它电介质层一起使用,以提供不同的机械和电气性能轮廓。

    Polysilicon opening polish
    38.
    发明授权
    Polysilicon opening polish 有权
    多晶硅开口抛光

    公开(公告)号:US07144816B2

    公开(公告)日:2006-12-05

    申请号:US10799996

    申请日:2004-03-12

    IPC分类号: H01L21/302

    摘要: Fabricating a semiconductor structure includes providing a semiconductor substrate, forming a silicide layer over the substrate, and removing a portion of the silicide layer by chemical mechanical polishing. The fabrication of the structure can also include forming a dielectric layer after forming the silicide layer, and removing a portion of the dielectric layer by chemical mechanical polishing before removing the portion of the silicide layer.

    摘要翻译: 制造半导体结构包括提供半导体衬底,在衬底上形成硅化物层,以及通过化学机械抛光去除硅化物层的一部分。 结构的制造还可以包括在形成硅化物层之后形成电介质层,以及在除去硅化物层的部分之前通过化学机械抛光除去介电层的一部分。

    Sacrificial dielectric planarization layer
    39.
    发明授权
    Sacrificial dielectric planarization layer 失效
    牺牲电介质平坦化层

    公开(公告)号:US07109557B2

    公开(公告)日:2006-09-19

    申请号:US10963839

    申请日:2004-10-12

    摘要: A method of forming a microelectronic structure and its associated structures is described. In one embodiment, a substrate is provided with a sacrificial layer disposed on a hard mask layer, and a metal layer disposed in a trench of the substrate and on the sacrificial layer. The metal layer is then removed at a first removal rate wherein a dishing is induced on a top surface of the metal layer until the sacrificial layer is exposed, and simultaneously removing the metal layer and the sacrificial layer at a second removal rate without substantially removing the hard mask.

    摘要翻译: 描述了形成微电子结构及其相关结构的方法。 在一个实施例中,衬底设置有设置在硬掩模层上的牺牲层,以及设置在衬底的沟槽中和牺牲层上的金属层。 然后以第一去除速率去除金属层,其中在金属层的顶表面上诱导凹陷,直到牺牲层被暴露,同时以第二移除速率去除金属层和牺牲层,而基本上不去除 硬面膜