公开(公告)号：US07928581B2

公开(公告)日：2011-04-19

申请号：US11630162

申请日：2005-10-17

申请人： Kazumasa Tanida ,  Osamu Miyata

发明人： Kazumasa Tanida ,  Osamu Miyata

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/49833 ,  H01L21/563 ,  H01L23/49805 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01078 ,  H05K3/0052 ,  H05K3/284 ,  H05K3/403 ,  H05K3/42 ,  H05K2201/0394 ,  H05K2201/09181 ,  H05K2203/1581 ,  H01L2924/00 ,  H01L2224/0401

摘要： A manufacture method for semiconductor device (1, 21) including: a sealing-resin-layer forming step of forming a sealing resin layer (7) on a conductive member (13) formed at lest on one surface of a base substrate (11) formed with a plurality of wiring boards (2) therein, the conductive member spanning a boundary between a respective pair of adjoining wiring boards; and a step of moving the base substrate and a cutting tool (B) relative to each other in a manner to allow the cutting tool to pass through the base substrate from the other surface (2b) opposite from the one surface thereof toward the one surface thereof, thereby cutting the base substrate along the boundary between the respective pair of adjoining wiring boards.

摘要翻译： 一种半导体器件（1,21）的制造方法，包括：密封树脂层形成步骤，在基底基板（11）的一个表面上形成的导电部件（13）上形成密封树脂层（7） 在其中形成有多个布线板（2），所述导电构件跨越相应的一对相邻布线板之间的边界; 以及相对于彼此移动所述基底基板和切割工具（B）的步骤，以使得所述切削工具能够从与所述基板的一个表面相反的另一个表面（2b）朝向所述一个表面 从而沿着相邻的一对相邻布线板之间的边界切割基底基板。

公开(公告)号：US07452751B2

公开(公告)日：2008-11-18

申请号：US11281727

申请日：2005-11-18

申请人： Yoshihiko Nemoto ,  Kazumasa Tanida ,  Kenji Takahashi

发明人： Yoshihiko Nemoto ,  Kazumasa Tanida ,  Kenji Takahashi

IPC分类号： H01L21/00

CPC分类号： H01L25/50 ,  H01L21/56 ,  H01L21/8221 ,  H01L23/3107 ,  H01L23/481 ,  H01L24/81 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L27/0688 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/19043 ,  H01L2224/81 ,  H01L2224/05599

摘要： Semiconductor device includes a pair of substrates (1, 2) disposed oppositely, semiconductor elements (5, 6) formed in the substrates (1, 2), respectively, and having semiconductor circuits (3, 4) and electrodes (7, 8), respectively, a wiring conductor (9) interposed between the electrodes (7, 8), and a through electrode (12) extending through one substrate (1) and connected to the electrode (7) via the wiring conductor (9). The other substrate (2) is disposed laterally of the through electrode (12). Surface of the through electrode (12) projecting from the one substrate (1) and lateral surface of the element (6) are coated with an insulation material (13). The through electrode (12) has one end exposed in a back surface of the one substrate (1), while other end is positioned flush with a back surface of the other substrate (2), being exposed.

摘要翻译： 半导体器件包括分别相对设置的形成在基板（1,2）中并具有半导体电路（3,4）和电极（7,8）的半导体元件（5,6）的一对基板（1,2） 分别插入在电极（7,8）之间的布线导体（9）和延伸穿过一个基板（1）并经由布线导体（9）连接到电极（7）的通孔（12）。 另一基板（2）设置在贯通电极（12）的横向。 从一个基板（1）伸出的贯通电极（12）和元件（6）的侧面的表面涂有绝缘材料（13）。 通孔电极（12）的一端暴露在一个基板（1）的背面，另一端与另一个基板（2）的背面齐平，露出。

公开(公告)号：US07306972B2

公开(公告)日：2007-12-11

申请号：US11353192

申请日：2006-02-14

申请人： Mitsuo Umemoto ,  Kazumasa Tanida

发明人： Mitsuo Umemoto ,  Kazumasa Tanida

IPC分类号： H01L21/00

CPC分类号： H01L25/0657 ,  H01L23/481 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2924/01004 ,  H01L2924/01078

摘要： The invention realizes excellent electrical and mechanical connection between electrodes in a packaging structure where a plurality of semiconductor chips having electrodes are connected with each other through the low-melting metallic members. Bump electrodes are formed on a front surface of a first semiconductor chip. Penetrating holes are formed in a second semiconductor chip, and a penetrating electrode having a gap in a center is formed in each of the penetrating holes. Low-melting metallic members are interposed between connecting surfaces of the bump electrodes and the penetrating electrodes, and a part of each of the low-melting metallic members flows in each of the gaps of the penetrating electrodes when dissolved. This prevents short-circuiting between the bump electrodes which is caused by oversupplying the low-melting metallic members between the adjacent bump electrodes.

摘要翻译： 本发明实现了具有电极的多个半导体芯片通过低熔点金属部件彼此连接的封装结构中的电极之间的优异的电气和机械连接。 凸起电极形成在第一半导体芯片的前表面上。 穿透孔形成在第二半导体芯片中，并且在每个穿透孔中形成有在中心具有间隙的穿透电极。 低熔点金属构件插入在凸块电极和穿透电极的连接面之间，并且每个低熔点金属构件的一部分在溶解时在贯通电极的每个间隙中流动。 这防止了在相邻的凸起电极之间的低熔点金属构件供应过大引起的突起电极之间的短路。

公开(公告)号：US20070018320A1

公开(公告)日：2007-01-25

申请号：US11518889

申请日：2006-09-12

申请人： Kazumasa Tanida ,  Yoshihiko Nemoto ,  Naotaka Tanaka

发明人： Kazumasa Tanida ,  Yoshihiko Nemoto ,  Naotaka Tanaka

IPC分类号： H01L23/48

CPC分类号： H01L25/50 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/11 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099

摘要： A semiconductor chip production method including the steps of: forming a front side recess in a semiconductor substrate; depositing a metal material in the front side recess to form a front side electrode electrically connected to a functional device formed on the front surface; removing a rear surface portion of the semiconductor substrate to reduce the thickness of the semiconductor substrate to a thickness greater than the depth of the front side recess; forming a rear side recess communicating with the front side recess in the rear surface of the semiconductor substrate after the thickness reducing step; and depositing a metal material in the rear side recess to form a rear side electrode electrically connected to the front side electrode for formation of a through-electrode.

摘要翻译： 一种半导体芯片制造方法，包括以下步骤：在半导体衬底中形成前侧凹部; 在所述前侧凹部中沉积金属材料，以形成与形成在所述前表面上的功能元件电连接的前侧电极; 去除半导体衬底的后表面部分以将半导体衬底的厚度减小到大于前侧凹槽的深度的厚度; 在所述厚度减小步骤之后形成与所述半导体衬底的后表面中的所述前侧凹部连通的后侧凹部; 以及在后侧凹部中沉积金属材料，以形成与前侧电极电连接以形成贯通电极的后侧电极。

公开(公告)号：US20050230804A1

公开(公告)日：2005-10-20

申请号：US11085265

申请日：2005-03-22

申请人： Kazumasa Tanida ,  Mitsuo Umemoto ,  Yukiharu Akiyama

发明人： Kazumasa Tanida ,  Mitsuo Umemoto ,  Yukiharu Akiyama

IPC分类号： H01L25/18 ,  H01L21/70 ,  H01L23/48 ,  H01L25/065 ,  H01L25/07 ,  H01L27/00

CPC分类号： H01L25/0657 ,  H01L23/481 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05026 ,  H01L2224/05147 ,  H01L2224/1134 ,  H01L2224/13021 ,  H01L2224/13025 ,  H01L2224/13144 ,  H01L2224/16145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A manufacturing method for a semiconductor device includes: the step of preparing a semiconductor chip which is provided with a functional element formed on a front surface side of a semiconductor substrate, a feedthrough electrode which is placed within a through hole that penetrates the semiconductor substrate, a front surface side connection member which protrudes from the front surface, and a rear surface side connection member which has a joining surface within a recess that is formed in a rear surface; the step of preparing a solid state device where a solid state device side connection member for connection to the front surface side connection member is formed on one surface; and the joining step of making the front surface of the semiconductor chip face the first surface of the solid state device by holding the rear surface of the semiconductor chip, and of joining the front surface side connection member to the solid state device side connection member.

摘要翻译： 半导体装置的制造方法包括：准备半导体芯片的步骤，该半导体芯片设置有形成在半导体基板的正面侧的功能元件，放置在贯通半导体基板的通孔内的馈通电极， 从前表面突出的前表面侧连接构件和在形成在后表面的凹部内具有接合表面的后表面侧连接构件; 制备固态器件的步骤，其中在一个表面上形成用于连接到前表面侧连接部件的固态器件侧连接部件; 并且通过保持半导体芯片的后表面并将前表面侧连接构件接合到固态器件侧连接构件，使半导体芯片的前表面面向固态器件的第一表面的接合步骤。

公开(公告)号：US08704337B2

公开(公告)日：2014-04-22

申请号：US12880838

申请日：2010-09-13

申请人： Eiji Takano ,  Hideo Numata ,  Kazumasa Tanida

发明人： Eiji Takano ,  Hideo Numata ,  Kazumasa Tanida

IPC分类号： H01L23/00 ,  H01L31/0232

CPC分类号： H01L27/14618 ,  H01L21/78 ,  H01L27/14683 ,  H01L2224/13

摘要： In one embodiment, a method for manufacturing a semiconductor device includes following steps. An aperture is formed in an interlayer insulating film formed on a semiconductor wafer apart from an integrated circuit portion by etching process. The interlayer insulating film has a dielectric constant smaller than a silicon oxide film (SiO2), and the width of the aperture is larger than a dicing region. A resin layer is embedded in the aperture. An adhesive layer is formed on the interlayer insulating film and the resin layer. The semiconductor wafer is attached to a glass substrate using the adhesive layer by Face Down method. The semiconductor wafer, the resin layer, and the adhesive layer on a dicing region are cut by blade dicing. The semiconductor wafer and the glass substrate adhered to the semiconductor wafer are cut into pieces by the blade dicing of the glass substrate under the dicing region.

摘要翻译： 在一个实施例中，制造半导体器件的方法包括以下步骤。 在通过蚀刻工艺与集成电路部分隔开的半导体晶片上形成的层间绝缘膜中形成开口。 层间绝缘膜的介电常数小于氧化硅膜（SiO 2），并且孔径的宽度大于切割区域。 树脂层嵌入孔中。 在层间绝缘膜和树脂层上形成粘接层。 半导体晶片通过Face Down方法使用粘合剂层附着到玻璃基板上。 通过刀片切割切割切割区域上的半导体晶片，树脂层和粘合剂层。 通过在切割区域下方的玻璃基板的切片将切割半导体晶片和粘附到半导体晶片的玻璃基板切割成片。

公开(公告)号：US20120068290A1

公开(公告)日：2012-03-22

申请号：US13220001

申请日：2011-08-29

申请人： Takashi Shirono ,  Kazumasa Tanida ,  Naoko Yamaguchi ,  Satoshi Hongo ,  Tsuyoshi Matsumura

发明人： Takashi Shirono ,  Kazumasa Tanida ,  Naoko Yamaguchi ,  Satoshi Hongo ,  Tsuyoshi Matsumura

IPC分类号： H01L31/0232 ,  B32B9/04 ,  H01L21/762

CPC分类号： H01L27/14618 ,  H01L27/1464 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to one embodiment, an insulation film is formed over the surface, backside, and sides of a first substrate. Next, the insulation film formed over the surface of the first substrate is removed. Then, a joining layer is formed over the surface of the first substrate, from which the insulation film has been removed. Subsequently, the first substrate is bonded to a second substrate via a joining layer.

摘要翻译： 根据一个实施例，在第一基板的表面，背面和侧面上形成绝缘膜。 接下来，去除在第一基板的表面上形成的绝缘膜。 然后，在第一基板的表面上形成接合层，绝缘膜已经从该表面移除。 随后，第一基板经由接合层与第二基板接合。

公开(公告)号：US20110317050A1

公开(公告)日：2011-12-29

申请号：US13169548

申请日：2011-06-27

申请人： Takashi Shirono ,  Mie Matsuo ,  Hideo Numata ,  Kazumasa Tanida ,  Tsuyoshi Matsumura

发明人： Takashi Shirono ,  Mie Matsuo ,  Hideo Numata ,  Kazumasa Tanida ,  Tsuyoshi Matsumura

IPC分类号： H04N5/335 ,  H01L29/02 ,  H01L21/18

CPC分类号： H01L27/14683 ,  H01L27/14625 ,  H01L27/14632 ,  H01L27/1464

摘要： According to an embodiment, a method of manufacturing a semiconductor device includes polishing a peripheral portion of the semiconductor substrate, and forming a protective film to be an insulating film, on a surface of the semiconductor substrate including a surface exposed by the polishing.

摘要翻译： 根据实施例，制造半导体器件的方法包括在半导体衬底的包括通过抛光暴露的表面的表面上抛光半导体衬底的周边部分并形成作为绝缘膜的保护膜。

公开(公告)号：US20110073983A1

公开(公告)日：2011-03-31

申请号：US12883674

申请日：2010-09-16

申请人： Kazumasa Tanida ,  Chiaki Takubo ,  Hideo Numata ,  Yoshihisa Imori

发明人： Kazumasa Tanida ,  Chiaki Takubo ,  Hideo Numata ,  Yoshihisa Imori

IPC分类号： H01L31/16 ,  H01L31/18

CPC分类号： H01L27/14603 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14683

摘要： According to an embodiment, there is provided a semiconductor device including a semiconductor substrate having a first surface on which an active layer having a light receiving portion is provided and a second surface to be a light receiving surface for the light receiving portion, a wiring layer provided on the active layer, an insulating layer provided to cover the wiring layer, and a supporting substrate joined to the semiconductor substrate via the insulating layer to face the first surface of the semiconductor substrate. A joined body of the semiconductor substrate and the supporting substrate includes an intercalated portion provided between its outer peripheral surface and the active surface. The intercalated portion is provided to penetrate the semiconductor substrate and the insulating layer from the second surface of the semiconductor substrate and to reach inside the supporting substrate.

摘要翻译： 根据实施例，提供了一种半导体器件，其包括具有第一表面的半导体衬底，在该第一表面上设置有具有光接收部分的有源层和作为光接收部分的光接收表面的第二表面，布线层 设置在有源层上，设置为覆盖布线层的绝缘层，以及经由绝缘层与半导体基板接合以与半导体基板的第一表面相对的支撑基板。 半导体衬底和支撑衬底的接合体包括设置在其外周表面和活性表面之间的插入部分。 插入部分被设置为从半导体衬底的第二表面穿透半导体衬底和绝缘层并到达支撑衬底内部。

公开(公告)号：US20100038741A1

公开(公告)日：2010-02-18

申请号：US12539037

申请日：2009-08-11

申请人： Kazumasa Tanida ,  Hideko Mukaida ,  Susumu Harada ,  Chiaki Takubo

发明人： Kazumasa Tanida ,  Hideko Mukaida ,  Susumu Harada ,  Chiaki Takubo

IPC分类号： H01L31/02 ,  H01L23/48 ,  H01L21/768

CPC分类号： H01L27/14618 ,  H01L23/481 ,  H01L24/13 ,  H01L27/14683 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/0557 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2224/05599

摘要： A semiconductor apparatus includes, a semiconductor substrate having first and second main surfaces and a thought hole connecting the first and second main surfaces; a first insulation layer arranged on the first main surface, and having an opening corresponding to the thought hole; a first conductive layer arranged on the first insulation layer, and covering the thought hole; a second insulation layer arranged on an inner wall of the thought hole and the second surface; a second conductive layer arranged in the thought hole and on the second insulation layer, the second conductive layer contacting the first conductive layer; and a filling member arranged on the second conductive layer in the through hole, and having a gap between the second conductive layer on the first main surface side.

摘要翻译： 半导体装置包括具有第一和第二主表面的半导体衬底和连接第一和第二主表面的思想孔; 布置在所述第一主表面上的第一绝缘层，并且具有与所述思想孔对应的开口; 布置在所述第一绝缘层上并覆盖所述思想孔的第一导电层; 布置在思想孔和第二表面的内壁上的第二绝缘层; 布置在思想孔和第二绝缘层上的第二导电层，第二导电层与第一导电层接触; 以及填充构件，其布置在所述通孔中的所述第二导电层上，并且在所述第一主表面侧上的所述第二导电层之间具有间隙。