Abstract:
Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.
Abstract:
Showerheads for independently delivering different, mutually-reactive process gases to a wafer processing space are provided. The showerheads include a first gas distributor that has multiple plenum structures that are separated from one another by a gap, as well as a second gas distributor positioned above the first gas distributor. Isolation gas from the second gas distributor may be flowed down onto the first gas distributor and through the gaps in between the plenum structures of the first gas distributor, thereby establishing an isolation gas curtain that prevents the process gases released from each plenum structure from parasitically depositing on the plenum structures that provide other gases.
Abstract:
Methods and techniques for fabricating metal interconnects, lines, or vias by subtractive etching and liner deposition methods are provided. Methods involve depositing a blanket copper layer, removing regions of the blanket copper layer to form a pattern, treating the patterned metal, depositing a copper-dielectric interface material such that the copper-dielectric interface material adheres only to the patterned copper, depositing a dielectric barrier layer on the substrate, and depositing a dielectric bulk layer on the substrate.
Abstract:
Dielectric composite films characterized by a dielectric constant (k) of less than about 7 and having a density of at least about 2.5 g/cm3 are deposited on partially fabricated semiconductor devices to serve as etch stop layers. The dielectric composite film in one embodiment includes Al, Si, and O and has a thickness of between about 10-100 Å. The dielectric composite film can reside between two layers of inter-layer dielectric, and may be in contact with metal layers. An apparatus for depositing such dielectric composite films includes a process chamber, a conduit for delivering an aluminum containing precursor to the process chamber, a second conduit for delivering a silicon-containing precursor to the process chamber and a controller having program instructions for depositing the dielectric composite film from these precursors, e.g., by reacting the precursors adsorbed to the substrate with an oxygen-containing species.
Abstract:
Dielectric composite films characterized by a dielectric constant (k) of less than about 7 and having a density of at least about 2.5 g/cm3 are deposited on partially fabricated semiconductor devices to serve as etch stop layers. The composite films in one embodiment include at least two elements selected from the group consisting of Al, Si, and Ge, and at least one element selected from the group consisting of O, N, and C. In one embodiment the composite film includes Al, Si and O. In one implementation, a substrate containing an exposed dielectric layer (e.g., a ULK dielectric) and an exposed metal layer is contacted with an aluminum-containing compound (such as trimethylaluminum) and, sequentially, with a silicon-containing compound. Adsorbed compounds are then treated with an oxygen-containing plasma (e.g., plasma formed in a CO2-containing gas) to form a film that contains Al, Si, and O.
Abstract:
Dielectric composite films characterized by a dielectric constant (k) of less than about 7 and having a density of at least about 2.5 g/cm3 are deposited on partially fabricated semiconductor devices to serve as etch stop layers. The composite films in one embodiment include at least two elements selected from the group consisting of Al, Si, and Ge, and at least one element selected from the group consisting of O, N, and C. In one embodiment the composite film includes Al, Si and O. In one implementation, a substrate containing an exposed dielectric layer (e.g., a ULK dielectric) and an exposed metal layer is contacted with an aluminum-containing compound (such as trimethylaluminum) and, sequentially, with a silicon-containing compound. Adsorbed compounds are then treated with an oxygen-containing plasma (e.g., plasma formed in a CO2-containing gas) to form a film that contains Al, Si, and O.
Abstract:
Dielectric AlO, AlOC, AlON and AlOCN films characterized by a dielectric constant (k) of less than about 10 and having a density of at least about 2.5 g/cm3 are deposited on partially fabricated semiconductor devices to serve as etch stop layers and/or diffusion barriers. In one implementation, a substrate containing an exposed dielectric layer (e.g., a ULK dielectric) and an exposed metal layer is contacted with an aluminum-containing compound (such as trimethylaluminum) in an iALD process chamber and the aluminum-containing compound is allowed to adsorb onto the surface of the substrate. This step is performed in an absence of plasma. Next, the unadsorbed aluminum-containing compound is removed from the process chamber, and the substrate is treated with a process gas containing CO2 or N2O, and an inert gas in a plasma to form an AlO, AlOC, or AlON layer. These steps are then repeated.
Abstract:
A dielectric diffusion barrier is deposited on a substrate that has a via and an overlying trench etched into an exposed layer of inter-layer dielectric, wherein there is exposed metal from the underlying interconnect at the bottom of the via. In order to provide a conductive path from the underlying metallization layer to the metallization layer that is being formed over it, the dielectric diffusion barrier is formed selectively on the inter-layer dielectric and not on the exposed metal at the bottom of the via. In one example a dielectric SiNC diffusion barrier layer is selectively deposited on the inter-layer dielectric using a remote plasma deposition and a precursor that contains both silicon and nitrogen atoms. Generally, a variety of dielectric diffusion barrier materials with dielectric constants of between about 3.0-20.0 can be selectively formed on inter-layer dielectric.
Abstract:
Methods and techniques for fabricating metal interconnects, lines, or vias by subtractive etching and liner deposition methods are provided. Methods involve depositing a blanket copper layer, removing regions of the blanket copper layer to form a pattern, treating the patterned metal, depositing a copper-dielectric interface material such that the copper-dielectric interface material adheres only to the patterned copper, depositing a dielectric barrier layer on the substrate, and depositing a dielectric bulk layer on the substrate.
Abstract:
Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.