公开(公告)号：US20060270804A1

公开(公告)日：2006-11-30

申请号：US11136853

申请日：2005-05-25

Applicant: Ping Xu ,  Jack Hegenbarth ,  Xin Chen ,  Jian Hou

Inventor： Ping Xu ,  Jack Hegenbarth ,  Xin Chen ,  Jian Hou

IPC: C08F8/00

CPC classification number: C08J3/24 ,  C08F6/16 ,  C08F6/22 ,  C08F214/18 ,  C08J2327/18 ,  Y10T428/139 ,  C08L27/12

Abstract: Crosslinkable perfluoroelastomer compositions having low metal content and low compression set when crosslinked, and processes for producing the same, are provided. Compositions comprising terpolymers of TFE, PAVE, and CNVE having a metal content of less than 3000 ppb may be formed into high purity transparent perfluoroelastomer parts.

公开(公告)号：US07117064B2

公开(公告)日：2006-10-03

申请号：US11358793

申请日：2006-02-21

Applicant: Srinivas D Nemani ,  Li-Qun Xia ,  Dian Sugiarto ,  Ellie Yieh ,  Ping Xu ,  Francimar Campana-Schmitt ,  Jia Lee

Inventor： Srinivas D Nemani ,  Li-Qun Xia ,  Dian Sugiarto ,  Ellie Yieh ,  Ping Xu ,  Francimar Campana-Schmitt ,  Jia Lee

IPC: G06F19/00 ,  C23C16/00 ,  H05H1/24 ,  H01L21/31 ,  H01L21/469

CPC classification number: H01L21/76834 ,  C23C16/325 ,  H01L21/0332 ,  H01L21/3081 ,  H01L21/31144 ,  H01L21/314 ,  H01L21/3148 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/7681 ,  H01L21/76826 ,  H01L21/76829 ,  Y10S438/931

Abstract: A method of forming a silicon carbide layer for use in integrated circuit fabrication processes is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a dopant in the presence of an electric field. The as-deposited silicon carbide layer has a compressibility that varies as a function of the amount of dopant present in the gas mixture during later formation.

公开(公告)号：US20060205206A1

公开(公告)日：2006-09-14

申请号：US11407758

申请日：2006-04-20

Applicant: Ping Xu ,  Li-Qun Xia ,  Larry Dworkin ,  Mehul Naik

Inventor： Ping Xu ,  Li-Qun Xia ,  Larry Dworkin ,  Mehul Naik

IPC: H01L21/4763

CPC classification number: H01L21/0234 ,  C23C16/325 ,  C23C16/401 ,  G03F7/16 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/3105 ,  H01L21/31144 ,  H01L21/312 ,  H01L21/3148 ,  H01L21/7681 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76832 ,  Y10S257/914

Abstract: A method is provided for processing a substrate including treating a surface of a dielectric layer comprising silicon and carbon by exposing the dielectric layer comprising silicon and carbon to a plasma of an inert gas, and depositing a photoresist on the dielectric layer comprising silicon and carbon. The dielectric layer may comprise a first dielectric layer comprising silicon, carbon, and nitrogen, and a second layer of nitrogen-free silicon and carbon containing material in situ on the first dielectric layer, and a third dielectric layer comprising silicon, oxygen, and carbon on the second dielectric layer.

公开(公告)号：US20060141805A1

公开(公告)日：2006-06-29

申请号：US11358793

申请日：2006-02-21

Applicant: Srinivas Nemani ,  Li-Qun Xia ,  Dian Sugiarto ,  Ellie Yieh ,  Ping Xu ,  Francimar Campana-Schmitt ,  Jia Lee

Inventor： Srinivas Nemani ,  Li-Qun Xia ,  Dian Sugiarto ,  Ellie Yieh ,  Ping Xu ,  Francimar Campana-Schmitt ,  Jia Lee

IPC: H01L21/31 ,  H01L21/469

CPC classification number: H01L21/76834 ,  C23C16/325 ,  H01L21/0332 ,  H01L21/3081 ,  H01L21/31144 ,  H01L21/314 ,  H01L21/3148 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/7681 ,  H01L21/76826 ,  H01L21/76829 ,  Y10S438/931

Abstract: A method of forming a silicon carbide layer for use in integrated circuit fabrication processes is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a dopant in the presence of an electric field. The as-deposited silicon carbide layer has a compressibility that varies as a function of the amount of dopant present in the gas mixture during later formation.

公开(公告)号：US20050233576A1

公开(公告)日：2005-10-20

申请号：US11118678

申请日：2005-04-28

Applicant: Ju-Hyung Lee ,  Ping Xu ,  Shankar Venkataraman ,  Li-Qun Xia ,  Fei Han ,  Ellie Yieh ,  Srinivas Nemani ,  Kangsub Yim ,  Farhad Moghadam ,  Ashok Sinha ,  Yi Zheng

Inventor： Ju-Hyung Lee ,  Ping Xu ,  Shankar Venkataraman ,  Li-Qun Xia ,  Fei Han ,  Ellie Yieh ,  Srinivas Nemani ,  Kangsub Yim ,  Farhad Moghadam ,  Ashok Sinha ,  Yi Zheng

IPC: C23C16/42 ,  C23C16/30 ,  C23C16/40 ,  C23C16/56 ,  H01L21/311 ,  H01L21/312 ,  H01L21/316 ,  H01L21/768 ,  H01L23/522 ,  H01L21/314

CPC classification number: H01L21/76834 ,  C23C16/30 ,  C23C16/401 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/312 ,  H01L21/3122 ,  H01L21/3127 ,  H01L21/31633 ,  H01L21/76807 ,  H01L21/7681 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76829

Abstract: Methods are provided for depositing an oxygen-doped dielectric layer. The oxygen-doped dielectric layer may be used for a barrier layer or a hardmask. In one aspect, a method is provided for processing a substrate including positioning the substrate in a processing chamber, introducing a processing gas comprising an oxygen-containing organosilicon compound, carbon dioxide, or combinations thereof, and an oxygen-free organosilicon compound to the processing chamber, and reacting the processing gas to deposit an oxygen-doped dielectric material on the substrate, wherein the dielectric material has an oxygen content of about 15 atomic percent or less. The oxygen-doped dielectric material may be used as a barrier layer in damascene or dual damascene applications.

公开(公告)号：US06553932B2

公开(公告)日：2003-04-29

申请号：US09853397

申请日：2001-05-11

Applicant: Kuo-Shih Liu ,  Ramana Veerasingam ,  Zhi Xu ,  Ping Xu ,  Mario Dave Silvetti ,  Gang Chen

Inventor： Kuo-Shih Liu ,  Ramana Veerasingam ,  Zhi Xu ,  Ping Xu ,  Mario Dave Silvetti ,  Gang Chen

IPC: C23C1600

CPC classification number: C23C16/45565 ,  C23C16/45591 ,  C23C16/509 ,  H01J37/3244 ,  H01J37/32623 ,  H01J37/32642 ,  H01J37/32935

Abstract: An appparatus for confining plasma within a process zone of a substrate processing chamber. In one aspect, an apparatus comprises an annular member having an upper mounting surface, an inner confinement wall, and an outer confinement wall. The apparatus is disposed on or otherwise connected to a gas distribution assembly of the processing chamber to prevent plasma edge effects on the surface of a substrate. The apparatus provides a plasma choke aperture that reduces the volume of the process zone around the periphery of the substrate thereby eliminating uneven deposition of material around the edge of the substrate.

Abstract translation: 一种用于将等离子体限制在衬底处理室的处理区内的设备。 一方面，一种装置包括具有上安装表面，内限制壁和外约束壁的环形构件。 该设备设置在处理室的气体分配组件上或以其他方式连接到处理室的气体分配组件，以防止等离子体对基板表面的影响。 该装置提供等离子体扼流圈，其减小了基板周边周围处理区的体积，从而消除了材料在基板边缘周围的不均匀沉积。

公开(公告)号：US6011443A

公开(公告)日：2000-01-04

申请号：US116646

申请日：1998-07-16

Applicant: Jason Chen ,  Ping Xu

Inventor： Jason Chen ,  Ping Xu

IPC: H03B5/20 ,  H03K3/03 ,  H03K3/354 ,  H03B5/24

CPC classification number: H03K3/03 ,  H03K3/354

Abstract: A CMOS voltage controlled oscillator (VCO) having an improved voltage-to-current converter and an active MOS load operating in the triode region to provide improved performance characteristics including a small differential logic swing and a high frequency output. The voltage-to-current converter of the CMOS VCO comprises a pair of MOS transistors, one of which has an aspect ratio (W.sub.P /L.sub.P) and the other of which has an aspect ratio (W.sub.P /L.sub.P)/n, wherein 1

Abstract translation: 具有改进的电压 - 电流转换器和在三极管区域中工作的有源MOS负载的CMOS压控振荡器（VCO），以提供改进的性能特性，包括小的差分逻辑摆幅和高频输出。 CMOS VCO的电压 - 电流转换器包括一对MOS晶体管，其中一个具有纵横比（WP / LP），另一个具有纵横比（WP / LP）/ n，其中1 < n <4。 该配置使得电压 - 电流转换器中的第三MOS晶体管仅在三极管区域中工作。 CMOS VCO还包括具有以环形配置连接的多个延迟级的ICO部分。 每个延迟级包括一对输入MOS晶体管和一对负载MOS晶体管。 根据本发明，电压 - 电流转换器使每个负载MOS晶体管在三极管区域中工作。

公开(公告)号：US5856753A

公开(公告)日：1999-01-05

申请号：US624925

申请日：1996-03-29

Applicant: Ping Xu ,  John W. Kizziar

Inventor： Ping Xu ,  John W. Kizziar

IPC: H03K5/02 ,  H03K5/13

CPC classification number: H03K5/023

Abstract: The present invention provides an analog biased pre-driver and pad as well as a duty cycle adjustment cell prior to the pre-driver and pad. The pre-driver and pad may operate in either a 3 volt mode, a 5 volt mode or any voltage in between depending only on the power supply voltage present. No production configuration or post-production configuration is required. The present invention utilizes a special bias circuit to reduce the Vcc, temperature and other processing variations. A duty cycle cell produces a range of duty cycles when the circuit is operating between a 3 volt and 5 volt range.

Abstract translation: 本发明在预驱动器和焊盘之前提供模拟偏置预驱动器和焊盘以及占空比调整单元。 预驱动器和焊盘可以在3伏模式，5伏模式或其间的任何电压下工作，仅取决于存在的电源电压。 不需要生产配置或后期制作配置。 本发明利用特殊的偏置电路来降低Vcc，温度和其它处理变化。 当电路工作在3伏和5伏范围之间时，占空比单元产生占空比的范围。

公开(公告)号：US5690870A

公开(公告)日：1997-11-25

申请号：US544202

申请日：1995-10-17

Applicant: Hisao Hachisuka ,  Ping Xu ,  Tomomi Ohara

Inventor： Hisao Hachisuka ,  Ping Xu ,  Tomomi Ohara

IPC: B01D67/00 ,  B01D71/64 ,  B29C47/00 ,  B29C47/06 ,  B29C67/20 ,  B29C70/68

CPC classification number: B29C47/0004 ,  B01D67/0011 ,  B01D67/0013 ,  B01D71/64 ,  B01D2323/08 ,  B01D2323/12 ,  B01D2323/30 ,  B01D2325/022 ,  B01D2325/32 ,  B29C47/0021

Abstract: Polyimide resin dope having at least three fluorine atoms in a repeating molecular unit and an organic solvent (A) are extruded in a tube form or coating the dope on a supporting body. The polyimide resin dope is then immersed in a solvent (B), which the organic solvent (A) is miscible with the solvent (B). Thus, a polyimide-type gas separation membrane including fluorine is virtually defect free in the skin layer, and manufactured cost-effectively by a simple manufacturing method.

Abstract translation: 在重复分子单元中具有至少三个氟原子的聚酰亚胺树脂涂料和有机溶剂（A）以管形式挤出或将涂料涂布在支撑体上。 然后将聚酰亚胺树脂涂料浸入有机溶剂（A）与溶剂（B）混溶的溶剂（B）中。 因此，包含氟的聚酰亚胺型气体分离膜在皮肤层中几乎无缺陷，并且通过简单的制造方法成本有效地制造。

公开(公告)号：US09139669B2

公开(公告)日：2015-09-22

申请号：US12410050

申请日：2009-03-24

Applicant: Ping Xu ,  Jack J. Hegenbarth ,  Xin Kang Chen

Inventor： Ping Xu ,  Jack J. Hegenbarth ,  Xin Kang Chen

IPC: C08F14/26 ,  C08F214/26 ,  B29C55/00 ,  C08J9/14 ,  C08J9/40 ,  C08J9/228 ,  B29K27/18 ,  B29K105/04

CPC classification number: C08F14/26 ,  B29C55/005 ,  B29K2027/18 ,  B29K2105/04 ,  C08F214/26 ,  C08F214/262 ,  C08J9/141 ,  C08J9/228 ,  C08J9/40 ,  C08J9/405 ,  C08J2201/03 ,  C08J2327/18 ,  C08F2/22

Abstract: A functional TFE copolymer fine powder is described, wherein the TFE copolymer is a polymer of TFE and at least one functional comonomer, and wherein the TFE copolymer has functional groups that are pendant to the polymer chain. The functional TFE copolymer fine powder resin is paste extrudable and expandable. Methods for making the functional TFE copolymer are also described. The expanded functional TFE copolymer material may be post-reacted after expansion.