公开(公告)号：US09147743B2

公开(公告)日：2015-09-29

申请号：US14185231

申请日：2014-02-20

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Fu-Wei Yao ,  Chun-Wei Hsu ,  Chen-Ju Yu ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang ,  Chih-Wen Hsiung ,  King-Yuen Wong

IPC: H01L21/338 ,  H01L29/66 ,  H01L29/40 ,  H01L29/778 ,  H01L29/20

CPC classification number: H01L29/402 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

Abstract: A method comprises epitaxially growing a gallium nitride (GaN) layer over a silicon substrate, epitaxially growing a donor-supply layer over the GaN layer, and etching a portion of the donor-supply layer. The method also comprises depositing a passivation layer over the donor-supply layer and filling the etched portion of the donor-supply layer, forming a source and a drain on the donor-supply layer, and forming a gate structure between the source and the etched portion of the donor-supply layer. The method further comprises depositing contacts over the gate structure, the source, and the drain.

Abstract translation: 一种方法包括在硅衬底上外延生长氮化镓（GaN）层，在GaN层上外延生长施主供体层，以及蚀刻供体供体层的一部分。 该方法还包括在施主供体层上沉积钝化层，并填充供体供体层的蚀刻部分，在供体供体层上形成源极和漏极，并在源极和蚀刻层之间形成栅极结构 供体层的一部分。 该方法还包括在栅极结构，源极和漏极之上沉积接触。

公开(公告)号：US12131944B2

公开(公告)日：2024-10-29

申请号：US17460929

申请日：2021-08-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Chun-Wei Hsu ,  Chih-Chieh Chang ,  Yi-Sheng Lin ,  Jian-Ci Lin ,  Jeng-Chi Lin ,  Ting-Hsun Chang ,  Liang-Guang Chen ,  Ji Cui ,  Kei-Wei Chen ,  Chi-Jen Liu

IPC: H01L21/768 ,  C09G1/02 ,  H01L23/522

CPC classification number: H01L21/7684 ,  C09G1/02 ,  H01L21/76877 ,  H01L23/5226

Abstract: A slurry composition, a semiconductor structure and a method for forming a semiconductor structure are provided. The slurry composition includes a slurry and a precipitant dispensed in the slurry. The semiconductor structure comprises a blocking layer including at least one element of the precipitant. The method includes using the slurry composition with the precipitant to polish a conductive layer and causing the precipitant to flow into the gap.

公开(公告)号：US11133247B2

公开(公告)日：2021-09-28

申请号：US16525186

申请日：2019-07-29

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chia-Wei Ho ,  Chun-Wei Hsu ,  Chi-Hsiang Shen ,  Chi-Jen Liu ,  Yi-Sheng Lin ,  Yang-Chun Cheng ,  William Weilun Hong ,  Liang-Guang Chen ,  Kei-Wei Chen

IPC: H01L23/522 ,  H01L23/528 ,  H01L21/768 ,  H01L21/02 ,  H01L23/532 ,  H01L21/311 ,  H01L21/027 ,  H01L21/3213 ,  H01L21/321 ,  H01L23/00

Abstract: A semiconductor device includes a first dielectric layer over a substrate, the first dielectric layer including a first dielectric material extending from a first side of the first dielectric layer distal from the substrate to a second side of the first dielectric layer opposing the first side; a second dielectric layer over the first dielectric layer; a conductive line in the first dielectric layer, the conductive line including a first conductive material, an upper surface of the conductive line being closer to the substrate than an upper surface of the first dielectric layer; a metal cap in the first dielectric layer, the metal cap being over and physically connected to the conductive line, the metal cap including a second conductive material different from the first conductive material; and a via in the second dielectric layer and physically connected to the metal cap, the via including the second conductive material.

公开(公告)号：US11114339B2

公开(公告)日：2021-09-07

申请号：US16686682

申请日：2019-11-18

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ling-Fu Nieh ,  Chun-Wei Hsu ,  Pinlei Edmund Chu ,  Chi-Jen Liu ,  Liang-Guang Chen ,  Yi-Sheng Lin

IPC: H01L21/768 ,  H01L29/78 ,  H01L21/321 ,  H01L21/8238 ,  H01L23/485 ,  H01L29/08 ,  C09G1/02 ,  H01L21/02 ,  H01L29/417 ,  H01L21/8234

Abstract: A method of manufacturing a device includes exposing at least one of a source/drain contact plug or a gate contact plug to a metal ion source solution during a manufacturing process, wherein a constituent metal of a metal ion in the metal ion source solution and the at least one source/drain contact plug or gate contact plug is the same. If the source/drain contact plug or the gate contact plug is formed of cobalt, the metal ion source solution includes a cobalt ion source solution. If the source/drain contact plug or the gate contact plug is formed of tungsten, the metal ion source solution includes a tungsten ion source solution.

公开(公告)号：US20190161711A1

公开(公告)日：2019-05-30

申请号：US16152965

申请日：2018-10-05

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Pinlei Edmund Chu ,  Chun-Wei Hsu ,  Ling-Fu Nieh ,  Chi-Jen Liu ,  Liang-Guang Chen ,  Yi-Sheng Lin

IPC: C11D11/00 ,  H01L21/02 ,  C11D7/26

Abstract: A semiconductor cleaning solution for cleaning a surface of a semiconductor device, and a method of use and a method of manufacture of the cleaning solution are disclosed. In an embodiment, a material is polished away from a first surface of the semiconductor device and the first surface is cleaned with the cleaning solution. The cleaning solution may include a host having at least one ring. The host may have a hydrophilic exterior and a hydrophobic interior.

公开(公告)号：US10020361B2

公开(公告)日：2018-07-10

申请号：US15201130

申请日：2016-07-01

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chen-Ju Yu ,  Chih-Wen Hsiung ,  Fu-Wei Yao ,  Chun-Wei Hsu ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang

IPC: H01L29/788 ,  H01L29/06 ,  H01L29/778 ,  H01L29/20 ,  H01L29/66 ,  H01L21/02 ,  H01L21/3065 ,  H01L29/205 ,  H01L21/306

CPC classification number: H01L29/0661 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/30621 ,  H01L21/3065 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7786 ,  H01L29/7787

Abstract: A method of making a circuit structure includes growing a bulk layer over a substrate, and growing a donor-supply layer over the bulk layer. The method further includes depositing a doped layer over the donor-supply layer, and patterning the doped layer to form a plurality of islands. The method further includes forming a gate structure over the donor-supply layer, wherein the gate structure is partially over a largest island of the plurality of islands. The method further includes forming a drain over the donor-supply layer, wherein at least one island of the plurality of islands is between the gate structure and the drain.

公开(公告)号：US09985103B2

公开(公告)日：2018-05-29

申请号：US15362465

申请日：2016-11-28

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Fu-Wei Yao ,  Chen-Ju Yu ,  King-Yuen Wong ,  Chun-Wei Hsu ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang ,  Chun-Lin Tsai

IPC: H01L29/66 ,  H01L29/45 ,  H01L29/20 ,  H01L29/205 ,  H01L21/02 ,  H01L21/285 ,  H01L29/417 ,  H01L29/778 ,  H01L29/08

CPC classification number: H01L29/452 ,  H01L21/0254 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/28575 ,  H01L29/0843 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/41725 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/7787

Abstract: A high electron mobility transistor (HEMT) includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A salicide source feature and a salicide drain feature are in contact with the first III-V compound layer through the second III-V compound layer. A gate electrode is disposed over a portion of the second III-V compound layer between the salicide source feature and the salicide drain feature.

公开(公告)号：US20170338316A1

公开(公告)日：2017-11-23

申请号：US15670135

申请日：2017-08-07

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Fu-Wei Yao ,  Chun-Wei Hsu ,  Chen-Ju Yu ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang ,  Chih-Wen Hsiung ,  King-Yuen Wong

IPC: H01L29/40 ,  H01L29/20 ,  H01L29/66 ,  H01L29/778

CPC classification number: H01L29/402 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

Abstract: A transistor includes a first layer over a substrate. The transistor also includes a second layer over the first layer. The transistor further includes a carrier channel layer at an interface of the first layer and the second layer. The transistor additionally includes a gate structure, a drain, and a source over the second layer. The transistor also includes a passivation material in the second layer between an edge of the gate structure and an edge of the drain in a top-side view. The carrier channel layer has a smaller surface area than the first layer between the edge of the gate structure and the edge of the drain in the top-side view.

公开(公告)号：US09502311B2

公开(公告)日：2016-11-22

申请号：US14872197

申请日：2015-10-01

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： King-Yuen Wong ,  Chun-Wei Hsu ,  Chen-Ju Yu ,  Fu-Wei Yao ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang ,  Po-Chih Chen

IPC: H01L29/778 ,  H01L21/8252 ,  H01L29/66 ,  H01L29/10 ,  H01L27/06 ,  H01L27/02 ,  H01L21/02 ,  H01L21/265 ,  H01L21/306 ,  H01L21/768 ,  H01L29/20

CPC classification number: H01L27/0255 ,  H01L21/02381 ,  H01L21/0254 ,  H01L21/26513 ,  H01L21/26546 ,  H01L21/30612 ,  H01L21/76877 ,  H01L21/76898 ,  H01L21/8252 ,  H01L21/8258 ,  H01L23/5226 ,  H01L27/0605 ,  H01L29/1075 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/6609 ,  H01L29/66462 ,  H01L29/7787 ,  H01L29/861

Abstract: A silicon substrate having a III-V compound layer disposed thereon is provided. A diode is formed in the silicon substrate through an ion implantation process. The diode is formed proximate to an interface between the silicon substrate and the III-V compound layer. An opening is etched through the III-V compound layer to expose the diode. The opening is filled with a conductive material. Thereby, a via is formed that is coupled to the diode. A High Electron Mobility Transistor (HEMT) device is formed at least partially in the III-V compound layer.

Abstract translation: 提供了其上设置III-V化合物层的硅衬底。 通过离子注入工艺在硅衬底中形成二极管。 二极管形成在硅衬底和III-V化合物层之间的界面附近。 通过III-V化合物层蚀刻开口以暴露二极管。 开口填充有导电材料。 由此，形成与二极管耦合的通孔。 至少部分地在III-V化合物层中形成高电子迁移率晶体管（HEMT）器件。

公开(公告)号：US08884308B2

公开(公告)日：2014-11-11

申请号：US13650610

申请日：2012-10-12

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chen-Ju Yu ,  Chih-Wen Hsiung ,  Fu-Wei Yao ,  Chun-Wei Hsu ,  King-Yuen Wong ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang

IPC: H01L29/66 ,  H01L29/20 ,  H01L29/778 ,  H01L29/16 ,  H01L21/02

CPC classification number: H01L29/66462 ,  H01L21/0254 ,  H01L21/2258 ,  H01L21/3065 ,  H01L21/32051 ,  H01L21/321 ,  H01L21/32133 ,  H01L21/324 ,  H01L29/0653 ,  H01L29/0843 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/205 ,  H01L29/42316 ,  H01L29/66431 ,  H01L29/7787

Abstract: A high electron mobility transistor (HEMT) includes a silicon substrate, an unintentionally doped gallium nitride (UID GaN) layer over the silicon substrate. The HEMT further includes a donor-supply layer over the UID GaN layer, a gate structure, a drain, and a source over the donor-supply layer. The HEMT further includes a dielectric layer having one or more dielectric plug portions in the donor-supply layer and top portions between the gate structure and the drain over the donor-supply layer. A method for making the HEMT is also provided.

Abstract translation: 高电子迁移率晶体管（HEMT）包括硅衬底，硅衬底上的无意掺杂的氮化镓（UID GaN）层。 HEMT还包括在供体层上的UID GaN层上的施主供体层，栅极结构，漏极和源极。 HEMT还包括在供体供体层中具有一个或多个电介质塞部分的电介质层和在供体层上的栅极结构和漏极之间的顶部。 还提供了制造HEMT的方法。