Semiconductor device and method for manufacturing the same
    31.
    发明授权
    Semiconductor device and method for manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号:US09202817B2

    公开(公告)日:2015-12-01

    申请号:US14161372

    申请日:2014-01-22

    Abstract: The present disclosure provides a semiconductor device and a method for manufacturing the same. The semiconductor device includes a substrate, at least one split gate memory device, and at least one logic device. The split gate memory device is disposed on the substrate. The logic device is disposed on the substrate. At least one of a select gate and a main gate of the split gate memory device and a logic gate of the logic device are made of metal. The method for manufacturing the semiconductor device includes forming at least one split gate stack and at least one logic gate stack and respectively replacing at least one of a dummy gate layer and a main gate layer in the split gate stack and the dummy gate layer in the logic gate stack with at least one metal memory gate and a metal logic gate.

    Abstract translation: 本发明提供一种半导体器件及其制造方法。 半导体器件包括衬底,至少一个分离栅极存储器件和至少一个逻辑器件。 分离栅极存储器件设置在衬底上。 逻辑器件设置在衬底上。 分离栅极存储器件的选择栅极和主栅极中的至少一个以及逻辑器件的逻辑门由金属制成。 半导体器件的制造方法包括形成至少一个分离栅极堆叠和至少一个逻辑门极堆叠,并且分别替代分离栅极堆叠中的伪栅极层和主栅极层中的至少一个以及虚拟栅极层中的至少一个 具有至少一个金属存储器栅极和金属逻辑门的逻辑门极堆叠。

    Contact Pad for Semiconductor Device

    公开(公告)号:US20230112750A1

    公开(公告)日:2023-04-13

    申请号:US18064371

    申请日:2022-12-12

    Abstract: A device and method of manufacture is provided that utilize a dummy pad feature adjacent contact pads. The contact pads may be contact pads in an integrated fan-out package in which a molding compound is placed along sidewalls of a die and the contact pads extend over the die and the molding compound. The contact pads are electrically coupled to the die using one or more redistribution layers. The dummy pad features are electrically isolated from the contact pads. In some embodiments, the dummy pad features partially encircle the contact pads and are located in a corner region of the molding compound, a corner region of the die, and/or an interface region between an edge of the die and the molding compound.

    Semiconductor device and manufacturing method thereof

    公开(公告)号:US10937879B2

    公开(公告)日:2021-03-02

    申请号:US16195680

    申请日:2018-11-19

    Abstract: A semiconductor device includes a semiconductor substrate, a control gate, a select gate, a charge trapping structure, and a dielectric structure. The semiconductor substrate has a drain region, a source region, and a channel region between the drain region and the source region. The control gate is over the channel region of the semiconductor substrate. The select gate is over the channel region of the semiconductor substrate and separated from the control gate. The charge trapping structure is between the control gate and the semiconductor substrate. The dielectric structure is between the select gate and the semiconductor substrate. The dielectric structure has a first part and a second part, the first part is between the charge trapping structure and the second part, and the second part is thicker than the first part.

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