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    Method for manufacturing multilayer printed circuit board with plated through holes
    31.
    发明授权
    Method for manufacturing multilayer printed circuit board with plated through holes 失效
    具有电镀通孔的多层印刷电路板的制造方法

    公开(公告)号：US08302300B2

    公开(公告)日：2012-11-06

    申请号：US13095877

    申请日：2011-04-28

    申请人： Ye-Ning Chen

    发明人： Ye-Ning Chen

    IPC分类号： H01K3/10

    CPC分类号： H05K3/0008 ,  H05K1/0266 ,  H05K3/429 ,  H05K3/4652 ,  H05K2201/0969 ,  Y10T29/49126 ,  Y10T29/49131 ,  Y10T29/49133 ,  Y10T29/49165

    摘要： A method for manufacturing multilayer printed circuit board includes steps below. A first copper clad laminate includes a central portion and a peripheral portion is provided. A group of concentric copper annular collars is formed by etching the peripheral portion. A second copper clad laminate and an adhesive layer is laminated on to the first copper clad laminate in a manner that the adhesive is sandwiched between the first copper clad laminate and the second copper clad laminate to form a multilayer substrate. A detection hole is formed run through the multilayer substrate. An offset distance is determined and plated through holes in the central portion of the multilayer substrate is formed based on the offset distance.

    摘要翻译： 一种制造多层印刷电路板的方法包括以下步骤。 第一覆铜层压板包括中心部分和周边部分。 通过蚀刻周边部分形成一组同心铜环形环。 将第二覆铜层压板和粘合剂层以将粘合剂夹在第一覆铜层压板和第二覆铜层压板之间的方式层压到第一覆铜层压板上以形成多层基板。 穿过多层基板形成检测孔。 确定偏移距离，并且基于偏移距离形成多层基板的中心部分中的孔的电镀。

    Method of manufacturing a multi-layer substrate
    32.
    发明授权
    Method of manufacturing a multi-layer substrate 有权
    多层基板的制造方法

    公开(公告)号：US08266797B2

    公开(公告)日：2012-09-18

    申请号：US13092319

    申请日：2011-04-22

    申请人： Chih-Kuang Yang ,  Cheng-Yi Chang

    发明人： Chih-Kuang Yang ,  Cheng-Yi Chang

    IPC分类号： H01K3/10

    CPC分类号： H05K3/28 ,  H05K3/0058 ,  H05K3/381 ,  H05K3/4682 ,  H05K2201/0154 ,  H05K2203/016 ,  H05K2203/065 ,  H05K2203/0759 ,  H05K2203/095 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

    摘要： Disclosed are a multi-layer substrate and a manufacturing method of the multi-layer substrate. By employing a carrier to alternately form dielectric layers and metal structure layers thereon. Each dielectric layer adheres with the adjacent dielectric layer to embed the metal structure layers in the dielectric layers corresponding thereto. Comparing with prior arts, which have to use prepregs when hot pressing and adhering different layers of different materials, the present invention takes fewer processes, thus, fewer kinds of materials without using prepregs. Therefore, the present invention can promote the entire quality and yield of manufacturing the multi-layer substrate to satisfy mechanical characteristic matching of the multi-layer substrate and to reduce cost of the whole manufacturing process. Significantly, the multi-layer substrate having thin dielectric layers according to the present invention can satisfy the concern of impedance matching therefore, and can reduce crosstalk influence to keep good signal integrity therein.

    摘要翻译： 公开了多层基板的多层基板和多层基板的制造方法。 通过使用载体交替地在其上形成介电层和金属结构层。 每个电介质层与相邻的电介质层粘合以将金属结构层嵌入与其对应的电介质层中。 与现有技术相比，当热压和粘附不同材料的不同层时，必须使用预浸料，本发明采用较少的工艺，因此在不使用预浸料的情况下，材料种类较少。 因此，本发明可以提高制造多层基板的整体质量和产率，以满足多层基板的机械特性匹配并降低整个制造工艺的成本。 重要的是，根据本发明的具有薄介电层的多层基板因此可以满足阻抗匹配的关注，并且可以减少串扰影响以保持良好的信号完整性。

    FEEDTHROUGH HAVING A NON-LINEAR CONDUCTOR
    33.
    发明申请
    FEEDTHROUGH HAVING A NON-LINEAR CONDUCTOR 有权
    有线非线性导体

    公开(公告)号：US20120221078A1

    公开(公告)日：2012-08-30

    申请号：US13034470

    申请日：2011-02-24

    申请人： C. Roger Leigh ,  Mark A. Von Huben ,  Grahame M. D. Walling

    发明人： C. Roger Leigh ,  Mark A. Von Huben ,  Grahame M. D. Walling

    IPC分类号： A61F11/04 ,  H01K3/10 ,  A61N1/36

    CPC分类号： A61N1/3754 ,  A61N1/36036 ,  Y10T29/49165

    摘要： The implantable medical device including a hermetic enclosure including at least one feedthrough having at least one electrically conductive path through the feedthrough. The at least one feedthrough includes an insulator having an entry face and an exit face, and at least one non-linear conductor is configured to extend, within the insulator, from the entry face to the exit face to provide the conductive path, wherein the entry and exit faces are not substantially parallel opposite faces of the insulator.

    摘要翻译： 所述可植入医疗装置包括密封外壳，其包括至少一个馈通，所述至少一个馈通具有穿过所述馈通的至少一个导电路径。 所述至少一个馈通包括具有入口面和出射面的绝缘体，并且至少一个非线性导体构造成在绝缘体内从入射面延伸到出射面以提供导电路径，其中， 入口和出口面不是绝缘体的基本平行的相对面。

    Method of manufacturing a printed circuit board
    34.
    发明授权
    Method of manufacturing a printed circuit board 有权
    印刷电路板的制造方法

    公开(公告)号：US08250751B2

    公开(公告)日：2012-08-28

    申请号：US12070811

    申请日：2008-02-20

    申请人： Rajwant Sidhu ,  Paul Walker

    发明人： Rajwant Sidhu ,  Paul Walker

    IPC分类号： H01K3/10

    CPC分类号： H05K1/115 ,  H05K1/0201 ,  H05K3/423 ,  H05K3/427 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/0347 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2203/1476 ,  Y10T29/4913 ,  Y10T29/49156 ,  Y10T29/49165

    摘要： Printed circuit boards have circuit layers with one or more copper filled through-holes and methods of manufacturing the same. An aspect of an embodiment of the present invention enhances thermal characteristics of filled through-holes of printed circuit boards to provide extra reliability to the printed circuit boards. In one embodiment, a printed circuit broad has a plurality of through-holes to connect copper patterns on different layers of the printed circuits broad. Here, at least one of the through-holes is copper plated closed at both ends with at least 70% volume of the through-hole plated with copper to, e.g., enhance thermal characteristics of the through-hole, thereby providing extra reliability to the printed circuit board. In one embodiment, the printed circuit board includes a surface conductor (or cap) that is directly plated over the copper filled barrel plated through-hole.

    摘要翻译： 印刷电路板具有带有一个或多个铜填充通孔的电路层及其制造方法。 本发明的实施例的一个方面提高了印刷电路板的填充通孔的热特性，从而为印刷电路板提供了额外的可靠性。 在一个实施例中，印刷电路布线具有多个通孔，以连接印刷电路的不同层上的铜图案。 这里，至少一个通孔在两端被镀铜封闭，至少70％体积的通孔镀有铜，例如增强了通孔的热特性，从而为 印刷电路板。 在一个实施例中，印刷电路板包括直接电镀在铜填充的圆柱形电镀通孔上的表面导体（或帽）。

    METHOD FOR MANUFACTURING MULTILAYER CIRCUIT BOARD
    35.
    发明申请
    METHOD FOR MANUFACTURING MULTILAYER CIRCUIT BOARD 审中-公开
    制造多层电路板的方法

    公开(公告)号：US20120174394A1

    公开(公告)日：2012-07-12

    申请号：US13346278

    申请日：2012-01-09

    申请人： Tae-Eun CHANG ,  Sukwon Lee ,  Francis Sohn ,  Changgun Oh

    发明人： Tae-Eun CHANG ,  Sukwon Lee ,  Francis Sohn ,  Changgun Oh

    IPC分类号： H01K3/10

    CPC分类号： H05K3/4682 ,  H05K3/0097 ,  H05K2203/1536 ,  Y10T29/49165

    摘要： Disclosed herein is a method for manufacturing a multilayer circuit board, and more particularly, is a method for manufacturing a coreless multilayer circuit board that forms a support including a separating layer made of a thermoplastic resin and allowing the support to be simply separated, thereby being advantageous in processing a subsequent process, regardless of a size of the board, and economical in the manufacturing process of the support and the manufacturing costs thereof.

    摘要翻译： 本发明公开了一种多层电路板的制造方法，更具体地说，涉及一种无芯多层电路基板的制造方法，该无芯多层电路基板形成由热塑性树脂构成的分离层的支承体，并且能够简单地分离支承体， 有利于处理后续过程，而不管板的尺寸，并且在支撑的制造过程中的经济性及其制造成本。

    Insulating material and printed circuit board having the same
    36.
    发明授权
    Insulating material and printed circuit board having the same 失效
    绝缘材料和具有相同的印刷电路板

    公开(公告)号：US08209862B2

    公开(公告)日：2012-07-03

    申请号：US13137935

    申请日：2011-09-21

    申请人： Jong-Seok Song

    发明人： Jong-Seok Song

    IPC分类号： H01K3/10

    CPC分类号： H05K1/0346 ,  H05K1/0366 ,  H05K3/381 ,  H05K3/426 ,  H05K3/4644 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49227 ,  Y10T442/20

    摘要： An insulating material formed by impregnating a base material with a liquid composition and curing the liquid composition, the liquid composition being 20 to 50 parts by weight of a PMDA-ODA mixture, the PMDA-ODA mixture including pyromellitic dianhydride (PMDA) and oxydianiline (ODA) mixed in a weight ratio of 40:60 to 60:40; 50 to 80 parts by weight of a triazine derivative; and 300 to 600 parts by weight of an organic solvent. A printed circuit board includes an insulator formed of the above insulating material; a circuit pattern formed on one or either side of the insulator; and a via penetrating the insulator.

    摘要翻译： 通过用液体组合物浸渍基材并固化液体组合物形成的绝缘材料，液体组合物为20至50重量份的PMDA-ODA混合物，PMDA-ODA混合物包括均苯四酸二酐（PMDA）和氧化二苯胺（ ODA）以40:60至60:40的重量比混合; 50〜80重量份的三嗪衍生物; 和300〜600重量份的有机溶剂。 印刷电路板包括由上述绝缘材料形成的绝缘体; 形成在绝缘体的一侧或两侧的电路图案; 以及穿过绝缘体的通孔。

    Method for fabricating an interlayer conducting structure of an embedded circuitry
    39.
    发明授权
    Method for fabricating an interlayer conducting structure of an embedded circuitry 有权
    一种用于制造嵌入式电路的层间导电结构的方法

    公开(公告)号：US08161639B2

    公开(公告)日：2012-04-24

    申请号：US12895824

    申请日：2010-09-30

    申请人： Chien-Wei Chang ,  Ting-Hao Lin ,  Yu-Te Lu

    发明人： Chien-Wei Chang ,  Ting-Hao Lin ,  Yu-Te Lu

    IPC分类号： H01K3/10

    CPC分类号： H05K3/4679 ,  H05K1/0269 ,  H05K3/0035 ,  H05K3/421 ,  H05K3/4658 ,  H05K2201/09918 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49155 ,  Y10T29/49165

    摘要： A method for fabricating an interlayer conducting structure of an embedded circuitry is disclosed. In accordance with the method for fabricating an interlayer conducting structure of an embedded circuitry of the present invention, there is no laser conformal mask formed prior to laminating the first and second lamination plates. Instead, after the first and second lamination plates are laminated, a laser boring process is directly conducted to form a via hole. In such a way, even when there is an offset between the first and the second lamination plates in alignment, the risk of short circuit between different layers of lamination plates can be lowered without improving an interlayer offset value.

    摘要翻译： 公开了一种用于制造嵌入式电路的层间导电结构的方法。 根据本发明的嵌入式电路的层间导电结构的制造方法，在层叠第一和第二层压板之前不形成激光共形掩模。 相反，在第一和第二层压板层压之后，直接进行激光钻孔工艺以形成通孔。 以这种方式，即使在第一和第二层压板之间存在偏移对准的情况下，也可以在不改善层间偏移值的情况下降低层压板的不同层之间短路的风险。