中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

237 records (took 0.112 seconds)

    Thermal CVD/PECVD reactor and use for thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process
    44.
    发明授权
    Thermal CVD/PECVD reactor and use for thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process 失效

    公开(公告)号：US06167834A

    公开(公告)日：2001-01-02

    申请号：US07928642

    申请日：1992-08-13

    Applicant: David Nin-Kou Wang ,  John M. White ,  Kam S. Law ,  Cissy Leung ,  Salvador P. Umotoy ,  Kenneth S. Collins ,  John A. Adamik ,  Ilya Perlov ,  Dan Maydan

    Inventor： David Nin-Kou Wang ,  John M. White ,  Kam S. Law ,  Cissy Leung ,  Salvador P. Umotoy ,  Kenneth S. Collins ,  John A. Adamik ,  Ilya Perlov ,  Dan Maydan

    IPC: C23C1600

    CPC classification number: C23C16/45565 ,  C23C16/402 ,  C23C16/455 ,  C23C16/45521 ,  C23C16/5096 ,  C23C16/54 ,  H01J37/32082 ,  H01J37/3244 ,  H01L21/31604

    Abstract: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surfaces. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust gases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, the TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either alone or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.

    Process for etching oxides in an electromagnetically coupled planar plasma apparatus
    45.
    发明授权
    Process for etching oxides in an electromagnetically coupled planar plasma apparatus 失效
    在电磁耦合平面等离子体装置中蚀刻氧化物的方法

    公开(公告)号：US6090303A

    公开(公告)日：2000-07-18

    申请号：US761045

    申请日：1996-12-05

    Applicant: Kenneth S. Collins ,  Jeffrey Marks

    Inventor： Kenneth S. Collins ,  Jeffrey Marks

    IPC: H01L21/00 ,  H05H1/00

    CPC classification number: H01J37/32871

    Abstract: In an apparatus for producing an electromagnetically coupled planar plasma comprising a chamber having a dielectric shield in a wall thereof and a planar coil outside of said chamber and adjacent to said window coupled to a radio frequency source, the improvement whereby a scavenger for fluorine is mounted in or added to said chamber. When a silicon oxide is etched with a plasma of a fluorohydrocarbon gas, the fluorine scavenger reduces the free fluorine radicals, thereby improving the selectivity and anisotropy of etching and improving the etch rate while reducing particle formation.

    Abstract translation: 在一种用于制造电磁耦合平面等离子体的装置中，包括在其壁中具有介电屏蔽的腔室和在所述腔室外面的平面线圈，并且与耦合到射频源的所述窗口相邻，其中安装有用于氟的清除剂的改进 进入或添加到所述室中。 当用氟烃气体的等离子体蚀刻氧化硅时，氟清除剂减少游离氟自由基，从而提高蚀刻的选择性和各向异性，并且在减少颗粒形成的同时提高蚀刻速率。

Patent Agency Ranking