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41.
公开(公告)号:US07271493B2
公开(公告)日:2007-09-18
申请号:US11112108
申请日:2005-04-21
申请人: Chien Ping Huang , Yu-Po Wang , Chih-Ming Huang
发明人: Chien Ping Huang , Yu-Po Wang , Chih-Ming Huang
IPC分类号: H01L29/40
CPC分类号: H01L21/4857 , H01L21/4832 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L23/142 , H01L23/3121 , H01L23/3128 , H01L23/49816 , H01L23/4985 , H01L24/48 , H01L24/49 , H01L24/81 , H01L24/85 , H01L24/97 , H01L2221/68345 , H01L2224/05554 , H01L2224/16 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/49171 , H01L2224/81801 , H01L2224/85001 , H01L2224/85439 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/18165 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in turn deposited over the dielectric material layer and solder materials, and the first and second copper layers are patterned to form a plurality of conductive traces each of which has a terminal coated with a metal layer. A chip is mounted on the conductive traces and electrically connected to the terminals by bonding wires, with the dielectric material layer and solder materials being exposed to the outside. This package structure can flexibly arrange the conductive traces and effectively shorten the bonding wires, thereby improve trace routability and quality of electrical connection for the semiconductor package.
摘要翻译: 提供一种半导体封装及其制造方法,其中使用形成有多个开口的电介质材料层,并且将焊料材料施加到每个开口中。 第一铜层和第二铜层又沉积在介电材料层和焊料材料上,并且第一和第二铜层被图案化以形成多个导电迹线,每个导电迹线具有涂覆有金属层的端子。 芯片安装在导电迹线上,并通过接合线电连接到端子,电介质材料层和焊料材料暴露于外部。 该封装结构可以灵活地布置导电迹线并有效地缩短接合线,从而提高半导体封装的迹线布线性和电连接质量。
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公开(公告)号:US20070164386A1
公开(公告)日:2007-07-19
申请号:US11648045
申请日:2006-12-28
IPC分类号: H01L31/0203 , H01L21/56
CPC分类号: H01L27/14687 , H01L24/97 , H01L27/14618 , H01L2224/48091 , H01L2224/48227 , H01L2224/8592 , H01L2224/97 , H01L2924/01033 , H01L2924/15311 , H01L2924/16195 , H01L2224/85 , H01L2924/00014
摘要: A semiconductor device and the fabrication method thereof are provided. The fabrication method includes providing a substrate module plate having a plurality of substrates; attaching at least one sensor chip to each of the substrates of the substrate module plate; electrically connecting each of the sensor chips to each of the substrates through bonding wires; forming an insulating layer between each sensor chip on the substrate module plate, wherein the height of the insulating layers are not greater than the thickness of the sensor chips so as to prevent flash from the insulating layers from contaminating the sensor chips; forming an adhesive lip on the insulating layer or forming a second insulating layer followed by forming the adhesive layer, wherein the adhesive layer or the second insulating layer is higher than the highest loop-height of the bonding wires; adhering a light transmitting cover to each adhesive layer to cover the sensor chip; and cutting the substrate module plate to separate the substrates to form a plurality of semiconductor devices each integrated with at least one sensor chip. As the adhesive layers are not in contact with the bonding wires, the problems of damaging or breaking the bonding wires can be prevented in the process of adhering the light transmitting cover.
摘要翻译: 提供半导体器件及其制造方法。 该制造方法包括提供具有多个基板的基板模块板; 将至少一个传感器芯片附接到所述基板模块板的每个基板; 通过接合线将每个传感器芯片电连接到每个基板; 在衬底模块板上的每个传感器芯片之间形成绝缘层,其中绝缘层的高度不大于传感器芯片的厚度,以防止来自绝缘层的闪光污染传感器芯片; 在所述绝缘层上形成粘合剂唇缘或形成第二绝缘层,接着形成所述粘合剂层,其中所述粘合剂层或所述第二绝缘层高于所述接合线的最高环高度; 将透光盖粘附到每个粘合剂层以覆盖传感器芯片; 以及切割所述基板模块板以分离所述基板以形成多个半导体器件,每个半导体器件与至少一个传感器芯片集成。 由于粘合层不与接合线接触,所以在粘接透光罩的过程中可以防止损坏或断裂接合线的问题。
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公开(公告)号:US20060267125A1
公开(公告)日:2006-11-30
申请号:US11162135
申请日:2005-08-30
IPC分类号: H01L29/84
CPC分类号: H01L27/14683 , H01L27/14618 , H01L2224/24226
摘要: A sensor semiconductor device and a method for fabricating the same are proposed. A sensor chip is mounted on a substrate, and a dielectric layer and a circuit layer are formed on the substrate, wherein the circuit layer is electrically connected to the substrate and the sensor chip. The dielectric layer is formed with an opening for exposing a sensor region of the sensor chip. A light-penetrable lid covers the opening of the dielectric layer, such that light is able to penetrate the light-penetrable lid to reach the sensor region and activate the sensor chip. The sensor chip can be electrically connected to an external device via a plurality of solder balls implanted on a surface of the substrate not for mounting the sensor chip. Therefore, the sensor semiconductor device is fabricated in a cost-effective manner, and circuit cracking and a know good die (KGD) problem are prevented.
摘要翻译: 提出了一种传感器半导体器件及其制造方法。 传感器芯片安装在基板上,并且在基板上形成电介质层和电路层,其中电路层电连接到基板和传感器芯片。 电介质层形成有用于暴露传感器芯片的传感器区域的开口。 透光盖子覆盖电介质层的开口,使得光线能够穿透透光盖子到达传感器区域并激活传感器芯片。 传感器芯片可以通过植入在基板的表面上的多个焊球电连接到外部设备,而不用于安装传感器芯片。 因此,传感器半导体器件以成本有效的方式制造,并且防止了电路破裂和知道的裸芯片(KGD)问题。
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公开(公告)号:US20060125088A1
公开(公告)日:2006-06-15
申请号:US11267632
申请日:2005-11-03
申请人: Chien-Ping Huang , Chih-Ming Huang
发明人: Chien-Ping Huang , Chih-Ming Huang
IPC分类号: H01L23/34
CPC分类号: H01L23/3677 , H01L21/4871 , H01L21/561 , H01L23/3107 , H01L23/3128 , H01L23/367 , H01L23/3733 , H01L23/4334 , H01L23/49548 , H01L23/49816 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2224/16225 , H01L2224/16245 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/48247 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/351 , Y10T29/49126 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A heat dissipating semiconductor package and a fabrication method thereof are provided. A semiconductor chip is mounted on a chip carrier. A heat sink is mounted on the chip, and includes an insulating core layer, a thin metallic layer formed on each of an upper surface and a lower surface of the insulating core layer and a thermal via hole formed in the insulating core layer. A molding process is performed to encapsulate the chip and the heat sink with an encapsulant to form a package unit. A singulation process is performed to peripherally cut the package unit. A part of the encapsulant above the thin metallic layer on the upper surface of the heat sink is removed, such that the thin metallic layer on the upper surface of the heat sink is exposed, and heat generated by the chip can be dissipated through the heat sink.
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公开(公告)号:US06830957B2
公开(公告)日:2004-12-14
申请号:US10452488
申请日:2003-05-30
申请人: Han-Ping Pu , Chien-Ping Huang , Chih-Ming Huang
发明人: Han-Ping Pu , Chien-Ping Huang , Chih-Ming Huang
IPC分类号: H01L2144
CPC分类号: H01L24/97 , H01L21/565 , H01L23/3128 , H01L2224/16 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2224/81 , H01L2924/00 , H01L2224/0401
摘要: A method of fabricating BGA (Ball Grid Array) packages is proposed, which utilizes a specially-designed carrier to serve as an auxiliary tool to package semiconductor chips on substrates. The carrier is formed with a plurality of cavities respective for receiving a substrate and in communication with an injection gate, such that no injection gate is required on the substrate, thereby not restricting the trace routability on the substrate. Moreover, a two-piece type of mold is allowed being used to form a number of encapsulation bodies at one time, making the fabrication more productive and cost-effective. Furthermore, the proposed BGA fabrication method can be implemented without having to provide an air outlet in the substrate but allows the resulted encapsulation body to be free of voids to assure the quality of the packages. The proposed BGA fabrication method is therefore more advantageous to use than the prior art.
摘要翻译: 提出了一种制造BGA(球栅阵列)封装的方法,该封装采用专门设计的载体作为将半导体芯片封装在衬底上的辅助工具。 载体形成有多个腔体,分别用于接收衬底并与注入栅极连通,使得在衬底上不需要注入栅极,从而不限制衬底上的迹线布线性。 此外,允许两件式的模具一次用于形成多个包封体,使得制造更加生产和成本有效。 此外,可以实现所提出的BGA制造方法,而不必在衬底中提供空气出口,但是允许所得到的封装体没有空隙以确保包装的质量。 因此,提出的BGA制造方法比现有技术更有利于使用。
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公开(公告)号:US08564115B2
公开(公告)日:2013-10-22
申请号:US13492220
申请日:2012-06-08
IPC分类号: H01L23/04
CPC分类号: H01L21/02 , B81B7/007 , B81B2207/07 , H01L23/52 , H01L29/84 , H01L2224/02166 , H01L2224/48091 , H01L2224/48465 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
摘要: Proposed is a package structure having a micro-electromechanical (MEMS) element, including a chip having a plurality of electrical connecting pads and a MEMS element formed thereon; a lid disposed on the chip for covering the MEMS element; a stud bump disposed on each of the electrical connecting pads; an encapsulant formed on the chip with part of the stud bumps being exposed from the encapsulant; and a metal conductive layer formed on the encapsulant and connected to the stud bumps. The invention is characterized by completing the packaging process on the wafer directly to enable thinner and cheaper package structures to be fabricated within less time. This invention further provides a method for fabricating the package structure as described above.
摘要翻译: 提出具有微机电(MEMS)元件的封装结构,其包括具有多个电连接焊盘和形成在其上的MEMS元件的芯片; 设置在所述芯片上用于覆盖所述MEMS元件的盖; 设置在每个电连接焊盘上的螺柱凸块; 形成在芯片上的密封剂,其中一部分柱状凸块从密封剂暴露出来; 以及金属导电层,形成在密封剂上并连接到凸块上。 本发明的特征在于直接完成晶片上的封装工艺,以便在更短的时间内制造更薄和更便宜的封装结构。 本发明还提供如上所述的用于制造封装结构的方法。
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公开(公告)号:US08420430B2
公开(公告)日:2013-04-16
申请号:US12769087
申请日:2010-04-28
申请人: Chi-Hsin Chiu , Chih-Ming Huang , Chang-Yueh Chan , Hsin-Yi Liao , Chun-Chi Ke
发明人: Chi-Hsin Chiu , Chih-Ming Huang , Chang-Yueh Chan , Hsin-Yi Liao , Chun-Chi Ke
CPC分类号: B81B7/0064 , B81B7/007 , B81B2207/095 , H01L21/56 , H01L23/315 , H01L23/552 , H01L24/48 , H01L2224/48227 , H01L2224/48465 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01046 , H01L2924/01079 , H01L2924/09701 , H01L2924/12042 , H01L2924/1461 , H01L2924/181 , H01L2924/3025 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A fabrication method of a package structure having at least an MEMS element is provided, including: preparing a wafer having electrical connection pads and the at least an MEMS element; disposing lids for covering the at least an MEMS element, the lids having a metal layer formed thereon; electrically connecting the electrical connection pads and the metal layer with bonding wires; forming an encapsulant for covering the lids, bonding wires, electrical connection pads and metal layer; removing portions of the encapsulant to separate the bonding wires each into first and second sub-bonding wires, wherein top ends of the first and second sub-bonding wires are exposed, the first sub-bonding wires electrically connecting to the electrical connection pads, and the second sub-bonding wires electrically connecting to the metal layer; forming metallic traces on the encapsulant for electrically connecting to the first sub-bonding wires; forming bumps on the metallic traces; and performing a singulation process.
摘要翻译: 提供具有至少MEMS元件的封装结构的制造方法,包括:制备具有电连接焊盘和所述至少MEMS元件的晶片; 设置用于覆盖所述至少一个MEMS元件的盖,所述盖具有在其上形成的金属层; 电连接焊盘和金属层与接合线; 形成用于覆盖盖子,接合线,电连接垫和金属层的密封剂; 去除所述密封剂的部分以将所述接合线分别分离成第一和第二子接合线,其中所述第一和第二次接合线的顶端被暴露,所述第一子接合线电连接到所述电连接焊盘,以及 所述第二子接合线电连接到所述金属层; 在所述密封剂上形成用于电连接到所述第一子接合线的金属迹线; 在金属痕迹上形成凸块; 并执行单独处理。
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公开(公告)号:US08183092B2
公开(公告)日:2012-05-22
申请号:US12829704
申请日:2010-07-02
申请人: Chien-Ping Huang , Chih-Ming Huang , Han-Ping Pu , Yu-Po Wang , Cheng-Hsu Hsiao
发明人: Chien-Ping Huang , Chih-Ming Huang , Han-Ping Pu , Yu-Po Wang , Cheng-Hsu Hsiao
CPC分类号: H01L23/3128 , H01L21/561 , H01L21/565 , H01L23/16 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0657 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48235 , H01L2224/49175 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06572 , H01L2225/06586 , H01L2924/00014 , H01L2924/01033 , H01L2924/15174 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/1815 , H01L2924/19107 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A stacked semiconductor structure and fabrication method thereof are provided. The method includes mounting and connecting electrically a semiconductor chip to a first substrate, mounting on the first substrate a plurality of supporting members corresponding in position to a periphery of the semiconductor chip, mounting a second substrate having a first surface partially covered with a tape and a second surface opposite to the first surface on the supporting members via the second surface, connecting electrically the first and second substrates by bonding wires, forming on the first substrate an encapsulant for encapsulating the semiconductor chip, the supporting members, the second substrate, the bonding wires, and the tape with an exposed top surface, and removing the tape to expose the first surface of the second substrate and allow an electronic component to be mounted thereon. The present invention prevents reflow-induced contamination, spares a special mold, and eliminates flash.
摘要翻译: 提供了堆叠半导体结构及其制造方法。 该方法包括将半导体芯片电连接到第一基板上,在第一基板上安装多个对应于半导体芯片的周边的支撑部件,安装第二基板,该第二基板具有部分被带覆盖的第一表面, 经由第二表面与支撑构件上的第一表面相对的第二表面,通过接合线电连接第一和第二基板,在第一基板上形成用于封装半导体芯片的密封剂,支撑构件,第二基板, 接合线和具有暴露的顶表面的带,并且移除带以露出第二基板的第一表面并允许电子部件安装在其上。 本发明防止回流引起的污染,备有特殊的模具,并消除闪光。
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公开(公告)号:US20100267202A1
公开(公告)日:2010-10-21
申请号:US12829704
申请日:2010-07-02
申请人: Chien-Ping Huang , Chih-Ming Huang , Han-Ping Pu , Yu-Po Wang , Cheng-Hsu Hsiao
发明人: Chien-Ping Huang , Chih-Ming Huang , Han-Ping Pu , Yu-Po Wang , Cheng-Hsu Hsiao
IPC分类号: H01L21/50
CPC分类号: H01L23/3128 , H01L21/561 , H01L21/565 , H01L23/16 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0657 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48235 , H01L2224/49175 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06572 , H01L2225/06586 , H01L2924/00014 , H01L2924/01033 , H01L2924/15174 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/1815 , H01L2924/19107 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A stacked semiconductor structure and fabrication method thereof are provided. The method includes mounting and connecting electrically a semiconductor chip to a first substrate, mounting on the first substrate a plurality of supporting members corresponding in position to a periphery of the semiconductor chip, mounting a second substrate having a first surface partially covered with a tape and a second surface opposite to the first surface on the supporting members via the second surface, connecting electrically the first and second substrates by bonding wires, forming on the first substrate an encapsulant for encapsulating the semiconductor chip, the supporting members, the second substrate, the bonding wires, and the tape with an exposed top surface, and removing the tape to expose the first surface of the second substrate and allow an electronic component to be mounted thereon. The present invention prevents reflow-induced contamination, spares a special mold, and eliminates flash.
摘要翻译: 提供了堆叠半导体结构及其制造方法。 该方法包括将半导体芯片电连接到第一基板上,在第一基板上安装多个对应于半导体芯片的周边的支撑部件,安装第二基板,该第二基板具有部分被带覆盖的第一表面, 经由第二表面与支撑构件上的第一表面相对的第二表面,通过接合线电连接第一和第二基板,在第一基板上形成用于封装半导体芯片的密封剂,支撑构件,第二基板, 接合线和具有暴露的顶表面的带,并且移除带以露出第二基板的第一表面并允许电子部件安装在其上。 本发明防止回流引起的污染,备有特殊的模具,并消除闪光。
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公开(公告)号:US07772685B2
公开(公告)日:2010-08-10
申请号:US11591974
申请日:2006-11-01
申请人: Chien-Ping Huang , Chih-Ming Huang , Han-Ping Pu , Yu-Po Wang , Cheng-Hsu Hsiao
发明人: Chien-Ping Huang , Chih-Ming Huang , Han-Ping Pu , Yu-Po Wang , Cheng-Hsu Hsiao
IPC分类号: H01L23/02
CPC分类号: H01L23/3128 , H01L21/561 , H01L21/565 , H01L23/16 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0657 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48235 , H01L2224/49175 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06572 , H01L2225/06586 , H01L2924/00014 , H01L2924/01033 , H01L2924/15174 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/1815 , H01L2924/19107 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A stacked semiconductor structure and fabrication method thereof are provided. The method includes mounting and connecting electrically a semiconductor chip to a first substrate, mounting on the first substrate a plurality of supporting members corresponding in position to a periphery of the semiconductor chip, mounting a second substrate having a first surface partially covered with a tape and a second surface opposite to the first surface on the supporting members via the second surface, connecting electrically the first and second substrates by bonding wires, forming on the first substrate an encapsulant for encapsulating the semiconductor chip, the supporting members, the second substrate, the bonding wires, and the tape with an exposed top surface, and removing the tape to expose the first surface of the second substrate and allow an electronic component to be mounted thereon. The present invention prevents reflow-induced contamination, spares a special mold, and eliminates flash.
摘要翻译: 提供了堆叠半导体结构及其制造方法。 该方法包括将半导体芯片电连接到第一基板上,在第一基板上安装多个对应于半导体芯片的周边的支撑部件,安装第二基板,该第二基板具有部分被带覆盖的第一表面, 经由第二表面与支撑构件上的第一表面相对的第二表面,通过接合线电连接第一和第二基板,在第一基板上形成用于封装半导体芯片的密封剂,支撑构件,第二基板, 接合线和具有暴露的顶表面的带,并且移除带以露出第二基板的第一表面并允许电子部件安装在其上。 本发明防止回流引起的污染,备有特殊的模具,并消除闪光。
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