中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

78 records (took 0.018 seconds)

    SEMICONDUCTOR DEVICE, WIRELESS SENSOR, AND ELECTRONIC DEVICE
    42.
    发明申请
    SEMICONDUCTOR DEVICE, WIRELESS SENSOR, AND ELECTRONIC DEVICE 有权
    半导体器件，无线传感器和电子器件

    公开(公告)号：US20160094236A1

    公开(公告)日：2016-03-31

    申请号：US14862284

    申请日：2015-09-23

    Applicant: Semiconductor Energy Laboratory Co., LTD.

    Inventor： Yutaka SHIONOIRI ,  Kiyoshi KATO ,  Tomoaki ATSUMI

    IPC: H03M1/00 ,  H03M1/12 ,  H03M1/38

    CPC classification number: H03M1/002 ,  G11C27/02 ,  H03M1/1245 ,  H03M1/466

    Abstract: An object is to reduce power consumption of an analog-digital converter circuit. An analog potential obtained in a sensor or the like is held in a sample-and-hold circuit including a transistor with an extremely low off-state current. In the sample-and-hold circuit, the analog potential is held in a node which is able to hold a charge by turning off the transistor. Then, power supply to a buffer circuit or the like included in the sample-and-hold circuit is stopped to reduce power consumption. In a structure where a potential is held in each node, power consumption can be further reduced when a transistor with an extremely low off-state current is connected to a node holding a potential of a comparator, a successive approximation register, a digital-analog converter circuit, or the like, and power supply to these circuits is stopped.

    Abstract translation: 目的是减少模数转换器电路的功耗。 在传感器等中获得的模拟电位保持在包括极低截止电流的晶体管的采样保持电路中。 在采样保持电路中，模拟电位保持在能够通过关断晶体管来保持电荷的节点。 然后，停止对包含在取样保持电路中的缓冲电路等的电力供给，以降低功耗。 在每个节点中保持电位的结构中，当具有非常低的截止电流的晶体管连接到保持比较器的电位的节点，逐次逼近寄存器，数字模拟 转换器电路等，停止对这些电路的供电。

    SEMICONDUCTOR DEVICE
    44.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20150255139A1

    公开(公告)日：2015-09-10

    申请号：US14637542

    申请日：2015-03-04

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Tomoaki ATSUMI ,  Shuhei NAGATSUKA ,  Tamae MORIWAKA ,  Yuta ENDO

    IPC: G11C11/24 ,  H01L27/115 ,  H01L27/12 ,  H01L29/24 ,  H01L29/786

    CPC classification number: H01L27/115 ,  G11C7/16 ,  G11C8/14 ,  G11C11/24 ,  G11C11/403 ,  G11C11/4085 ,  H01L27/0688 ,  H01L27/11551 ,  H01L27/1156 ,  H01L29/24 ,  H01L29/7869

    Abstract: [Problem] To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device with improved operating speed.[Solving Means] A semiconductor device including a memory cell including first to cth (c is a natural number of 2 or more) sub memory cells, wherein: the jth sub memory cell includes a first transistor, a second transistor, and a capacitor; a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor include an oxide semiconductor; one of terminals of the capacitor is electrically connected to a gate electrode included in the second transistor; the gate electrode included in the second transistor is electrically connected to one of a source electrode and a drain electrode which are included in the first transistor; and when j≧2, the jth sub memory cell is arranged over the j−1th sub memory cell.

    Abstract translation: 提供适于小型化的半导体器件。 提供高度可靠的半导体器件。 提供具有改善的操作速度的半导体器件。 [解决方案]一种半导体器件，包括第一至第C（c是2个或更多个的自然数）子存储单元的存储单元，其中：第j子存储单元包括第一晶体管，第二晶体管和电容器; 包括在第一晶体管中的第一半导体层和包括在第二晶体管中的第二半导体层包括氧化物半导体; 电容器的端子之一电连接到包括在第二晶体管中的栅电极; 包括在第二晶体管中的栅电极电连接到包括在第一晶体管中的源电极和漏极之一; 并且当j≥2时，第j个子存储单元布置在第j-1个子存储单元上。

    SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE
    46.
    发明公开
    SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE 审中-公开

    公开(公告)号：US20240088162A1

    公开(公告)日：2024-03-14

    申请号：US18519294

    申请日：2023-11-27

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei YAMAZAKI ,  Kiyoshi KATO ,  Tomoaki ATSUMI

    IPC: H01L27/12 ,  H10B12/00

    CPC classification number: H01L27/1225 ,  H01L27/1255 ,  H10B12/20

    Abstract: A novel semiconductor device formed with single-polarity circuits using OS transistors is provided. Thus, connection between different layers in a memory circuit is unnecessary. This can reduce the number of connection portions and improve the flexibility of circuit layout and the reliability of the OS transistors. In particular, many memory cells are provided; thus, the memory cells are formed with single-polarity circuits, whereby the number of connection portions can be significantly reduced. Further, by providing a driver circuit in the same layer as the cell array, many wirings for connecting the driver circuit and the cell array can be prevented from being provided between layers, and the number of connection portions can be further reduced. An interposer provided with a plurality of integrated circuits can function as one electronic component.

    SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE
    48.
    发明申请
    SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE 有权

    公开(公告)号：US20210384228A1

    公开(公告)日：2021-12-09

    申请号：US17400264

    申请日：2021-08-12

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei YAMAZAKI ,  Kiyoshi KATO ,  Tomoaki ATSUMI

    IPC: H01L27/12 ,  H01L27/108

    Abstract: A novel semiconductor device formed with single-polarity circuits using OS transistors is provided. Thus, connection between different layers in a memory circuit is unnecessary. This can reduce the number of connection portions and improve the flexibility of circuit layout and the reliability of the OS transistors. In particular, many memory cells are provided; thus, the memory cells are formed with single-polarity circuits, whereby the number of connection portions can be significantly reduced. Further, by providing a driver circuit in the same layer as the cell array, many wirings for connecting the driver circuit and the cell array can be prevented from being provided between layers, and the number of connection portions can be further reduced. An interposer provided with a plurality of integrated circuits can function as one electronic component.

    SEMICONDUCTOR DEVICE
    49.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210367078A1

    公开(公告)日：2021-11-25

    申请号：US16975309

    申请日：2019-02-21

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Shunpei YAMAZAKI ,  Kiyoshi KATO ,  Tomoaki ATSUMI ,  Shuhei NAGATSUKA ,  Hitoshi KUNITAKE ,  Yoko TSUKAMOTO

    IPC: H01L29/786 ,  H01L29/24 ,  H01L29/66

    Abstract: A semiconductor device in which an electrification phenomenon that leads to characteristic fluctuations, element deterioration, abnormality in shape, or dielectric breakdown is inhibited is provided.
    The semiconductor device includes a first region and a second region over the same plane. The first region includes a transistor. The second region includes a dummy transistor. The transistor includes a first wiring layer, a semiconductor layer including an oxide and provided above the first wiring layer, a second wiring layer provided above the semiconductor layer, and a third wiring layer provided above the second wiring layer. The dummy transistor has the same area as one or more selected from the first wiring layer, the second wiring layer, the semiconductor layer, and the third wiring layer.

Patent Agency Ranking