公开(公告)号：US10811530B2

公开(公告)日：2020-10-20

申请号：US15638707

申请日：2017-06-30

Applicant: Texas Instruments Incorporated

Inventor： Marie Denison ,  Sameer Pendharkar ,  Guru Mathur

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/10 ,  H01L29/08 ,  H01L21/8234 ,  H01L29/40 ,  H01L29/06 ,  H01L29/423 ,  H01L21/225 ,  H01L21/283 ,  H01L21/324 ,  H01L29/51

Abstract: A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define vertical drift regions of the transistor, so that each vertical drift region is bounded on at least two opposite sides by the deep trench structures. The deep trench structures are spaced so as to form RESURF regions for the drift region. Trench gates are formed in trenches in the substrate over the vertical drift regions. The body regions are located in the substrate over the vertical drift regions.

公开(公告)号：US10128219B2

公开(公告)日：2018-11-13

申请号：US13870770

申请日：2013-04-25

Applicant: Texas Instruments Incorporated

Inventor： Marie Denison ,  Richard Saye ,  Takahiko Kudoh ,  Satyendra Singh Chauhan

IPC: H01L25/07 ,  H01L23/495 ,  H01L23/31

Abstract: A Multi-Chip Module (MCM) package includes a substrate having a plurality of metal terminals and at least a first die attach area. An encapsulant is around the substrate including on at least a portion of the topside and at least a portion of the bottomside of the package. At least a first device including at least two device terminals is attached face up on the first die attach area. At least a second device including at least two device terminals is flip-chip attached and stacked on the first device. At least one of the first device and second device include a transistor. At least one metal clip is between the first device and second device including a plurality of clip portions isolated from one another connecting at least one device terminal of each of the first device and second device to respective metal terminals of the plurality of metal terminals.

公开(公告)号：US10062777B2

公开(公告)日：2018-08-28

申请号：US15485892

申请日：2017-04-12

Applicant: Texas Instruments Incorporated

Inventor： Marie Denison ,  Sameer Pendharkar ,  Guru Mathur

IPC: H01L29/78 ,  H01L29/40 ,  H01L29/10 ,  H01L29/06 ,  H01L29/51

CPC classification number: H01L29/7813 ,  H01L21/225 ,  H01L21/283 ,  H01L21/324 ,  H01L21/823487 ,  H01L29/063 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/404 ,  H01L29/407 ,  H01L29/408 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/51 ,  H01L29/511 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66734 ,  H01L29/7809

Abstract: A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define vertical drift regions of the transistor, so that each vertical drift region is bounded on at least two opposite sides by the deep trench structures. The deep trench structures are spaced so as to form RESURF regions for the drift region. Trench gates are formed in trenches in the substrate over the vertical drift regions. The body regions are located in the substrate over the vertical drift regions.

公开(公告)号：US20170373184A1

公开(公告)日：2017-12-28

申请号：US15638707

申请日：2017-06-30

Applicant: Texas Instruments Incorporated

Inventor： Marie Denison ,  Sameer Pendharkar ,  Guru Mathur

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/40 ,  H01L29/51 ,  H01L29/06

Abstract: A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define vertical drift regions of the transistor, so that each vertical drift region is bounded on at least two opposite sides by the deep trench structures. The deep trench structures are spaced so as to form RESURF regions for the drift region. Trench gates are formed in trenches in the substrate over the vertical drift regions. The body regions are located in the substrate over the vertical drift regions.

公开(公告)号：US09698075B2

公开(公告)日：2017-07-04

申请号：US15210970

申请日：2016-07-15

Applicant: Texas Instruments Incorporated

Inventor： Archana Venugopal ,  Marie Denison ,  Luigi Colombo ,  Hiep Nguyen ,  Darvin Edwards

IPC: H01L23/373 ,  H01L23/00 ,  H01L21/48 ,  H01L23/367

CPC classification number: H01L23/373 ,  H01L21/4871 ,  H01L21/4889 ,  H01L23/367 ,  H01L23/3675 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/94 ,  H01L2224/03416 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0361 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05073 ,  H01L2224/05078 ,  H01L2224/05082 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05193 ,  H01L2224/05558 ,  H01L2224/05578 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05687 ,  H01L2224/05693 ,  H01L2224/08165 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83447 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/04941 ,  H01L2924/014 ,  H01L2924/01006 ,  H01L2924/0503 ,  H01L2924/01005 ,  H01L2924/01074 ,  H01L2224/45099 ,  H01L2224/03

Abstract: A microelectronic device includes semiconductor device with a component at a front surface of the semiconductor device and a backside heat spreader layer on a back surface of the semiconductor device. The backside heat spreader layer is 100 nanometers to 3 microns thick, has an in-plane thermal conductivity of at least 150 watts/meter-° K, and an electrical resistivity less than 100 micro-ohm-centimeters.

公开(公告)号：US20160322277A1

公开(公告)日：2016-11-03

申请号：US15210970

申请日：2016-07-15

Applicant: Texas Instruments Incorporated

Inventor： Archana Venugopal ,  Marie Denison ,  Luigi Colombo ,  Hiep Nguyen ,  Darvin Edwards

IPC: H01L23/373 ,  H01L23/00 ,  H01L21/48 ,  H01L23/367

CPC classification number: H01L23/373 ,  H01L21/4871 ,  H01L21/4889 ,  H01L23/367 ,  H01L23/3675 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/94 ,  H01L2224/03416 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0361 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05073 ,  H01L2224/05078 ,  H01L2224/05082 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05193 ,  H01L2224/05558 ,  H01L2224/05578 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05687 ,  H01L2224/05693 ,  H01L2224/08165 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83447 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/04941 ,  H01L2924/014 ,  H01L2924/01006 ,  H01L2924/0503 ,  H01L2924/01005 ,  H01L2924/01074 ,  H01L2224/45099 ,  H01L2224/03

Abstract: A microelectronic device includes semiconductor device with a component at a front surface of the semiconductor device and a backside heat spreader layer on a back surface of the semiconductor device. The backside heat spreader layer is 100 nanometers to 3 microns thick, has an in-plane thermal conductivity of at least 150 watts/meter-° K, and an electrical resistivity less than 100 micro-ohm-centimeters.

Abstract translation: 微电子器件包括在半导体器件的前表面处具有部件的半导体器件和在半导体器件的背面上的背面散热器层。 背面散热器层为100纳米至3微米厚，面内热导率至少为150瓦特/米-2°K，电阻率小于100微欧姆厘米。

公开(公告)号：US20160163855A1

公开(公告)日：2016-06-09

申请号：US15013412

申请日：2016-02-02

Applicant: Texas Instruments Incorporated

Inventor： Philip Leland Hower ,  Sameer Pendharkar ,  Marie Denison

IPC: H01L29/78 ,  H01L27/088 ,  H01L29/10 ,  H01L29/06 ,  H01L29/08

CPC classification number: H01L29/66681 ,  H01L21/2253 ,  H01L21/266 ,  H01L27/088 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0642 ,  H01L29/0646 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/0886 ,  H01L29/1095 ,  H01L29/66659 ,  H01L29/7816 ,  H01L29/7835

Abstract: An integrated circuit and method having an extended drain MOS transistor with a buried drift region, a drain diffused link, a channel diffused link, and an isolation link which electrically isolated the source, where the isolation diffused link is formed by implanting through segmented areas to dilute the doping to less than two-thirds the doping in the drain diffused link.

公开(公告)号：US20160093552A1

公开(公告)日：2016-03-31

申请号：US14499222

申请日：2014-09-28

Applicant: Texas Instruments Incorporated

Inventor： Archana Venugopal ,  Marie Denison ,  Luigi Colombo ,  Hiep Nguyen ,  Darvin Edwards

IPC: H01L23/373 ,  H01L21/48 ,  H01L23/498

CPC classification number: H01L23/373 ,  H01L21/4871 ,  H01L21/4889 ,  H01L23/367 ,  H01L23/3675 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/94 ,  H01L2224/03416 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0361 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05073 ,  H01L2224/05078 ,  H01L2224/05082 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05193 ,  H01L2224/05558 ,  H01L2224/05578 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05687 ,  H01L2224/05693 ,  H01L2224/08165 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83447 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/04941 ,  H01L2924/014 ,  H01L2924/01006 ,  H01L2924/0503 ,  H01L2924/01005 ,  H01L2924/01074 ,  H01L2224/45099 ,  H01L2224/03

Abstract: A microelectronic device includes semiconductor device with a component at a front surface of the semiconductor device and a backside heat spreader layer on a back surface of the semiconductor device. The backside heat spreader layer is 100 nanometers to 3 microns thick, has an in-plane thermal conductivity of at least 150 watts/meter-° K, and an electrical resistivity less than 100 micro-ohm-centimeters.

公开(公告)号：US09299832B2

公开(公告)日：2016-03-29

申请号：US14567196

申请日：2014-12-11

Applicant: Texas Instruments Incorporated

Inventor： Philip Leland Hower ,  Sameer Pendharkar ,  Marie Denison

IPC: H01L29/66 ,  H01L21/336 ,  H01L29/78 ,  H01L29/08 ,  H01L29/10 ,  H01L29/06 ,  H01L21/266 ,  H01L21/225

CPC classification number: H01L29/66681 ,  H01L21/2253 ,  H01L21/266 ,  H01L27/088 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0642 ,  H01L29/0646 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/0886 ,  H01L29/1095 ,  H01L29/66659 ,  H01L29/7816 ,  H01L29/7835

Abstract: An integrated circuit and method having an extended drain MOS transistor with a buried drift region, a drain diffused link, a channel diffused link, and an isolation link which electrically isolated the source, where the isolation diffused link is formed by implanting through segmented areas to dilute the doping to less than two-thirds the doping in the drain diffused link.

Abstract translation: 一种集成电路和方法，其具有具有埋入漂移区域的扩展漏极MOS晶体管，漏极扩散链路，沟道扩散链路和电隔离源极的隔离链路，其中通过分割区域注入形成隔离扩散链路 将掺杂稀释到漏极扩散链路中的掺杂的三分之二以下。

公开(公告)号：US09224854B2

公开(公告)日：2015-12-29

申请号：US14044915

申请日：2013-10-03

Applicant: Texas Instruments Incorporated

Inventor： Marie Denison ,  Sameer Pendharkar ,  Guru Mathur

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/10 ,  H01L29/08

CPC classification number: H01L29/7813 ,  H01L21/225 ,  H01L21/283 ,  H01L21/324 ,  H01L21/823487 ,  H01L29/063 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/404 ,  H01L29/407 ,  H01L29/408 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/51 ,  H01L29/511 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66734 ,  H01L29/7809

Abstract: A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define vertical drift regions of the transistor, so that each vertical drift region is bounded on at least two opposite sides by the deep trench structures. The deep trench structures are spaced so as to form RESURF regions for the drift region. Trench gates are formed in trenches in the substrate over the vertical drift regions. The body regions are located in the substrate over the vertical drift regions.

Abstract translation: 具有垂直漏极延伸MOS晶体管的半导体器件可以通过形成深沟槽结构以形成晶体管的垂直漂移区域而形成，使得每个垂直漂移区域通过深沟槽结构在至少两个相对侧上界定。 深沟槽结构被间隔开以形成漂移区域的RESURF区域。 在垂直漂移区域上的衬底中的沟槽中形成沟槽栅极。 身体区域位于垂直漂移区域上的衬底中。