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    PRECURSOR COMPOSITIONS FOR ALD/CVD OF GROUP II RUTHENATE THIN FILMS
    51.
    发明申请
    PRECURSOR COMPOSITIONS FOR ALD/CVD OF GROUP II RUTHENATE THIN FILMS 有权
    用于II组RUTHENATE薄膜的ALD / CVD的前体组合物

    公开(公告)号：US20100095865A1

    公开(公告)日：2010-04-22

    申请号：US12523704

    申请日：2007-03-12

    申请人： Chongying Xu ,  Bryan C. Hendrix ,  Thomas M. Cameron ,  Jeffrey F. Roeder ,  Matthias Stender ,  Tianniu Chen

    发明人： Chongying Xu ,  Bryan C. Hendrix ,  Thomas M. Cameron ,  Jeffrey F. Roeder ,  Matthias Stender ,  Tianniu Chen

    IPC分类号： C23C16/18 ,  C23C16/30

    CPC分类号： C07F17/02

    摘要： Precursor compositions useful for atomic layer deposition (ALD) and chemical vapor deposition (CVD) of strontium ruthenium oxide (SrRuO3) thin films, e.g., in the manufacture of microelectronic devices, as well as processes of making and using such precursors, and precursor supply systems containing such precursor compositions in packaged form. Cyclopentadienyl compounds of varied type are described, including cyclopentadienyl as well as non cyclopentadienyl ligands coordinated to ruthenium, strontium or barium central atoms. The precursors of the invention are useful for forming contacts for microelectronic memory device structures, and in a specific aspect for selectively coating copper metallization without deposition on associated dielectric, under deposition conditions in a forming gas ambient.

    摘要翻译： 用于原子层沉积（ALD）和氧化钌氧化物（SrRuO 3）薄膜的化学气相沉积（CVD）的前体组合物，例如在微电子器件的制造中，以及制备和使用这些前体的方法以及前体供应 含有包装形式的前体组合物的体系。 描述了不同类型的环戊二烯基化合物，包括环戊二烯基以及与钌，锶或钡中心原子配位的非环戊二烯基配位体。 本发明的前体可用于形成微电子存储器件结构的接触，并且在特定方面，用于在形成气体环境中的沉积条件下，在相关联的电介质上不沉积而选择性地涂覆铜金属化。

    Barrier structures for integration of high K oxides with Cu and Al electrodes
    55.
    发明授权
    Barrier structures for integration of high K oxides with Cu and Al electrodes 失效
    用于将高K氧化物与Cu和Al电极结合的阻挡结构

    公开(公告)号：US06900498B2

    公开(公告)日：2005-05-31

    申请号：US09681609

    申请日：2001-05-08

    申请人： Gregory T. Stauf ,  Bryan C. Hendrix ,  Jeffrey F. Roeder ,  Ing-Shin Chen

    发明人： Gregory T. Stauf ,  Bryan C. Hendrix ,  Jeffrey F. Roeder ,  Ing-Shin Chen

    IPC分类号： H01L21/02 ,  H01L21/28 ,  H01L27/108

    CPC分类号： H01L28/75 ,  H01L21/28291 ,  H01L28/55

    摘要： An integrated circuit barrier structure disposed between high dielectric constant metal oxide and Cu or Al electrodes, for preventing diffusion of species such as oxygen, bismuth, or lead from the high dielectric constant metal oxide into the Cu or Al electrodes. Such barrier structure also protects the Cu or Al electrodes against oxidization during deposition of the high dielectric constant metal oxide. The barrier structure can be formed as (1) a single layer of Pt, Ir, IrO2, Ir2O3, Ru, RuO2, CuO, Cu2O, Al2O3, or a binary or ternary metal nitride, e.g., TaN, NbN, HfN, ZrN, WN, W2N, TiN, TiSiN, TiAlN, TaSiN, or NbAlN, or (2) double or triple layers of such materials, e.g., Pt/TiAlN, Pt/IrO2, Pt/Ir, Ir/TiAlN, Ir/IrO2, IrO2/TiAlN, IrO2/Ir, or IrO2/Ir2O3/Ir. Such barrier structures enable Cu or Al electrodes to be used in combination with high dielectric constant metal oxides in microelectronic structures such as ferroelectric stack and trench capacitors, non-volatile ferroelectric memory cells, and dynamic random access memory (DRAM) cells.

    摘要翻译： 设置在高介电常数金属氧化物和Cu或Al电极之间的集成电路阻挡结构，用于防止诸如氧，铋或铅的物质从高介电常数金属氧化物扩散到Cu或Al电极中。 这种阻挡结构还保护Cu或Al电极在沉积高介电常数金属氧化物期间免受氧化。 阻挡结构可以形成为（1）单层Pt，Ir，IrO 2，Ir 2 O 3，Ru，RuO CuO，Cu 2 O，Al 2 O 3 3，或二元或三元金属氮化物，例如 ，TaN，NbN，HfN，ZrN，WN，W 2 N，TiN，TiSiN，TiAlN，TaSiN或NbAlN，或（2）这种材料的双层或三层，例如Pt / TiAlN ，Pt / IrO 2，Pt / Ir，Ir / TiAlN，Ir / IrO 2，IrO 2 / TiAlN，IrO 2 Ir或IrO 2 / Ir 2 O 3 / Ir。 这种阻挡结构使得Cu或Al电极能够与诸如铁电堆和沟槽电容器，非易失性铁电存储器单元和动态随机存取存储器（DRAM）单元的微电子结构中的高介电常数金属氧化物组合使用。

    Stress control of thin films by mechanical deformation of wafer substrate
    56.
    发明授权
    Stress control of thin films by mechanical deformation of wafer substrate 失效
    通过晶片衬底的机械变形对薄膜进行应力控制

    公开(公告)号：US06514835B1

    公开(公告)日：2003-02-04

    申请号：US09676283

    申请日：2000-09-28

    申请人： Bryan C. Hendrix ,  Jeffrey F. Roeder ,  Steven M. Bilodeau

    发明人： Bryan C. Hendrix ,  Jeffrey F. Roeder ,  Steven M. Bilodeau

    IPC分类号： H01L2120

    CPC分类号： H01L41/257 ,  C23C14/50 ,  C23C14/541 ,  H01L21/302 ,  H01L21/31691 ,  H01L41/314

    摘要： A method of improving the physical and/or electrical and/or magnetic properties of a thin film material formed on a substrate, wherein the properties of the thin film material are stress-dependent, by selectively applying force to the substrate during the film formation and/or thereafter during the cooling of the film in the case of a film formed at elevated temperature, to impose through the substrate an applied force condition opposing or enhancing the retention of stress in the product film. The method of the invention has particular utility in the formation of ferroelectric thin films which are grown at temperature above the Curie temperature, and which may be placed in tension during the cooling of the film to provide ferroelectric domains with polarization in the plane of the film.

    摘要翻译： 一种改善形成在基底上的薄膜材料的物理和/或电学和/或磁性质的方法，其中薄膜材料的性质是依赖于应力的，通过在成膜期间选择性地对基底施加力，以及 /或之后在膜的冷却过程中，在高温下形成的膜的情况下，通过与衬底施加相反或增强产品膜中的应力保持的施加力条件。 本发明的方法在形成在高于居里温度的温度下生长的铁电薄膜具有特别的用途，并且可以在薄膜冷却期间放置张力以在薄膜的平面中提供具有极化的铁电畴 。

    HIGH-K PEROVSKITE MATERIALS AND METHODS OF MAKING AND USING THE SAME
    57.
    发明申请
    HIGH-K PEROVSKITE MATERIALS AND METHODS OF MAKING AND USING THE SAME 审中-公开
    高K薄膜材料及其制造和使用方法

    公开(公告)号：US20140134823A1

    公开(公告)日：2014-05-15

    申请号：US14128043

    申请日：2012-06-19

    申请人： Bryan C. Hendrix ,  Steven M. Bilodeau ,  Ing-Shin Barry Chen ,  Jeffrey F. Roeder ,  Gregory T. Stauf

    发明人： Bryan C. Hendrix ,  Steven M. Bilodeau ,  Ing-Shin Barry Chen ,  Jeffrey F. Roeder ,  Gregory T. Stauf

    IPC分类号： H01L49/02 ,  H01L27/108

    CPC分类号： H01L28/55 ,  C23C16/409 ,  C23C16/45531 ,  H01L21/02197 ,  H01L21/0228 ,  H01L27/108

    摘要： High-k materials and devices, e.g., DRAM capacitors, and methods of making and using the same. Various methods of forming perovskite films are described, including methods in which perovskite material is deposited on the substrate by a pulsed vapor deposition process involving contacting of the substrate with perovskite material-forming metal precursors. In one such method, the process is carried out with doping or alloying of the perovskite material with a higher mobility and/or higher volatility metal species than the metal species in the perovskite material-forming metal precursors. In another method, the perovskite material is exposed to elevated temperature for sufficient time to crystallize or to enhance crystallization of the perovskite material, followed by growth of the perovskite material under pulsed vapor deposition conditions. Various perovskite compositions are described, including: (Sr, Pb)TiO3; SrRuO3 or SrTiO3, doped with Zn, Cd or Hg; Sr(Sn,Ru)O3; and Sr(Sn,Ti)O3.

    摘要翻译： 高k材料和器件，例如DRAM电容器，以及制造和使用它们的方法。 描述了形成钙钛矿薄膜的各种方法，包括其中通过脉冲气相沉积工艺将钙钛矿材料沉积在基底上的方法，包括使基底与形成钙钛矿的金属前体接触。 在一种这样的方法中，该方法通过钙钛矿材料的掺杂或合金化与具有比形成钙钛矿材料的金属前体中的金属物质更高的迁移率和/或更高的挥发性金属物质进行。 在另一种方法中，将钙钛矿材料暴露于升高的温度足够的时间以结晶或增强钙钛矿材料的结晶，随后在脉冲气相沉积条件下生长钙钛矿材料。 描述了各种钙钛矿组合物，包括：（Sr，Pb）TiO 3; SrRuO3或SrTiO3，掺杂Zn，Cd或Hg; Sr（Sn，Ru）O3; 和Sr（Sn，Ti）O 3。

    Precursor compositions for ALD/CVD of group II ruthenate thin films
    58.
    发明授权
    Precursor compositions for ALD/CVD of group II ruthenate thin films 有权
    用于II组钌酸盐薄膜的ALD / CVD的前体组合物

    公开(公告)号：US08524931B2

    公开(公告)日：2013-09-03

    申请号：US12523704

    申请日：2007-03-12

    申请人： Chongying Xu ,  Bryan C. Hendrix ,  Thomas M. Cameron ,  Jeffrey F. Roeder ,  Matthias Stender ,  Tianniu Chen

    发明人： Chongying Xu ,  Bryan C. Hendrix ,  Thomas M. Cameron ,  Jeffrey F. Roeder ,  Matthias Stender ,  Tianniu Chen

    IPC分类号： C07F15/00 ,  C03C17/10

    CPC分类号： C07F17/02

    摘要： Precursor compositions useful for atomic layer deposition (ALD) and chemical vapor deposition (CVD) of strontium ruthenium oxide (SrRuO3) thin films, e.g., in the manufacture of microelectronic devices, as well as processes of making and using such precursors, and precursor supply systems containing such precursor compositions in packaged form. Cyclopentadienyl compounds of varied type are described, including cyclopentadienyl as well as non cyclopentadienyl ligands coordinated to ruthenium, strontium or barium central atoms. The precursors of the invention are useful for forming contacts for microelectronic memory device structures, and in a specific aspect for selectively coating copper metallization without deposition on associated dielectric, under deposition conditions in a forming gas ambient.

    摘要翻译： 用于原子层沉积（ALD）和氧化钌氧化物（SrRuO 3）薄膜的化学气相沉积（CVD）的前体组合物，例如在微电子器件的制造中，以及制备和使用这些前体的方法以及前体供应 含有包装形式的前体组合物的体系。 描述了不同类型的环戊二烯基化合物，包括环戊二烯基以及与钌，锶或钡中心原子配位的非环戊二烯基配位体。 本发明的前体可用于形成微电子存储器件结构的接触，并且在特定方面，用于在形成气体环境中的沉积条件下，在相关联的电介质上不沉积而选择性地涂覆铜金属化。

    PRECURSORS FOR SILICON DIOXIDE GAP FILL
    60.
    发明申请
    PRECURSORS FOR SILICON DIOXIDE GAP FILL 有权
    硅二氧化硅填料的前身

    公开(公告)号：US20100164057A1

    公开(公告)日：2010-07-01

    申请号：US12665929

    申请日：2008-06-27

    申请人： William Hunks ,  Chongying Xu ,  Bryan C. Hendrix ,  Jeffrey F. Roeder ,  Steven M. Bilodeau ,  Weimin Li

    发明人： William Hunks ,  Chongying Xu ,  Bryan C. Hendrix ,  Jeffrey F. Roeder ,  Steven M. Bilodeau ,  Weimin Li

    IPC分类号： H01L29/06 ,  C09D7/00 ,  H01L21/762

    CPC分类号： H01L21/02211 ,  H01L21/02123 ,  H01L21/02164 ,  H01L21/02216 ,  H01L21/02222 ,  H01L21/02263 ,  H01L21/31604 ,  H01L21/31608 ,  H01L29/0649

    摘要： A full fill trench structure comprising a microelectronic device substrate having a high aspect ratio trench therein and a full filled mass of silicon dioxide in the trench, wherein the silicon dioxide is of a substantially void-free character and has a substantially uniform density throughout its bulk mass. A corresponding method of manufacturing a semiconductor product is described, involving use of specific silicon precursor compositions for use in full filling a trench of a microelectronic device substrate, in which the silicon dioxide precursor composition is processed to conduct hydrolysis and condensation reactions for forming the substantially void-free and substantially uniform density silicon dioxide material in the trench. The fill process may be carried out with a precursor fill composition including silicon and germanium, to produce a microelectronic device structure including a GeO2/SiO2 trench fill material. A suppressor component, e.g., methanol, may be employed in the precursor fill composition, to eliminate or minimize seam formation in the cured trench fill material.

    摘要翻译： 一种全填充沟槽结构，其包括其中具有高纵横比沟槽的微电子器件衬底和沟槽中的完整填充质量的二氧化硅，其中二氧化硅具有基本上无空隙的特性，并且在其整个体积中具有基本均匀的密度 质量 描述了制造半导体产品的相应方法，其涉及使用特定的硅前体组合物，用于完全填充微电子器件衬底的沟槽，其中二氧化硅前体组合物被处理以进行水解和缩合反应，以形成基本上 在沟槽中的无空隙和基本均匀的密度二氧化硅材料。 填充过程可以用包括硅和锗的前体填充组合物进行，以产生包括GeO 2 / SiO 2沟槽填充材料的微电子器件结构。 可以在前体填充组合物中使用抑制剂组分，例如甲醇，以消除或最小化固化沟槽填充材料中的接缝形成。