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120 条记录 (耗时 0.038 秒)

    Gas distribution in deposition chambers
    51.
    发明授权
    Gas distribution in deposition chambers 有权
    沉积室中的气体分布

    公开(公告)号：US06251187B1

    公开(公告)日：2001-06-26

    申请号：US09433086

    申请日：1999-11-03

    申请人： Shijian Li ,  Fred C. Redeker ,  Tetsuya Ishikawa

    发明人： Shijian Li ,  Fred C. Redeker ,  Tetsuya Ishikawa

    IPC分类号： C23C1600

    CPC分类号： C23C16/507 ,  C23C16/4405 ,  C23C16/455 ,  C23C16/5096 ,  C23C16/517 ,  H01J37/3244

    摘要： An improved deposition chamber (2) includes a housing (4) defining a vacuum chamber (18) which houses a substrate support (14). A set of first nozzles (34) have orifices (38) opening into the vacuum chamber in a circumferential pattern spaced apart from and generally overlying the periphery (40) of the substrate support. One or more seconds nozzle (56, 56a), positioned centrally above the substrate support, inject process gases into the vacuum chamber to improve deposition thickness uniformity. Deposition thickness uniformity is also improved by ensuring that the process gases are supplied to the first nozzles at the same pressure. If needed, enhanced cleaning of the nozzles can be achieved by slowly drawing a cleaning gas from within the vacuum chamber in a reverse flow direction through the nozzles using a vacuum pump (84).

    摘要翻译： 改进的沉积室（2）包括限定容纳衬底支撑件（14）的真空室（18）的壳体（4）。 一组第一喷嘴（34）具有以与基板支撑件的周边（40）间隔开并且通常覆盖基板支撑件的周边（40）的圆周图案而开口进入真空室的孔口（38）。 位于基板支架上方中心的一个或多个秒喷嘴（56,56a）将工艺气体注入真空室以改善沉积厚度均匀性。 通过确保将工艺气体以相同的压力供应到第一喷嘴，也提高了沉积厚度均匀性。 如果需要，可以通过使用真空泵（84）通过喷嘴沿反向流动方向从真空室内缓慢地抽取清洁气体来实现喷嘴的增强清洁。

    DETERMINING A LEGITIMATE ACCESS POINT RESPONSE
    54.
    发明申请
    DETERMINING A LEGITIMATE ACCESS POINT RESPONSE 有权
    确定一个良好的访问点响应

    公开(公告)号：US20160149935A1

    公开(公告)日：2016-05-26

    申请号：US14900202

    申请日：2013-07-04

    申请人： Yongqiang LIU ,  Shijian LI ,  Jun Qing XIE ,  HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    发明人： Yongqiang Liu ,  Shijian Li ,  Jun Qing Xie

    IPC分类号： H04L29/06 ,  H04W12/10

    CPC分类号： H04W12/08 ,  H04L47/27 ,  H04L47/34 ,  H04L63/10 ,  H04L63/126 ,  H04L63/1416 ,  H04W12/10 ,  H04W12/12 ,  H04W48/14 ,  H04W84/12

    摘要： A first request is sent from a station to an access point. The station receives a first response from the access point that includes a first sequence number, and stores the first sequence number. The station sends a second request to the access point and sets a waiting period for receiving a response from the access point. The station receives a second response from the access point and a third response from a second access point during the waiting period. The second response includes a second sequence number and the third response includes a third sequence number. The station determines that the second response is a legitimate response by comparing the second and third sequence numbers to the first sequence number.

    摘要翻译： 第一个请求从站点发送到接入点。 站从接入点接收包括第一序列号的第一响应，并存储第一序列号。 该站向接入点发送第二个请求，并设置从接入点接收响应的等待时间。 在等待期间，站接收来自接入点的第二响应和来自第二接入点的第三响应。 第二响应包括第二序列号，第三响应包括第三序列号。 通过将第二和第三序列号与第一序列号进行比较，站确定第二响应是合法响应。

    Methods and apparatuses for three dimensional integrated circuits
    55.
    发明授权
    Methods and apparatuses for three dimensional integrated circuits 有权
    三维集成电路的方法和装置

    公开(公告)号：US08673769B2

    公开(公告)日：2014-03-18

    申请号：US11821051

    申请日：2007-06-20

    申请人： John Boyd ,  Fritz Redeker ,  Yezdi Dordi ,  Hyungsuk Alexander Yoon ,  Shijian Li

    发明人： John Boyd ,  Fritz Redeker ,  Yezdi Dordi ,  Hyungsuk Alexander Yoon ,  Shijian Li

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/44 ,  H01L21/76898 ,  H01L23/48 ,  H01L23/481 ,  H01L25/50 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Methods and apparatuses for fabricating three-dimensional integrated circuits having through hole vias are provided. One aspect of the present invention is a method of gapfill for through hole vias for three-dimensional integrated circuits. The method comprises providing a semiconductor wafer having a plurality of holes for through hole vias and depositing a conformal metal layer to partially fill the holes to leave open voids. The method also includes purging the voids and cleaning the surface of the voids and using a dry deposition process to fill or close the voids. Another aspect of the present invention is an electronic device structure for a three-dimensional integrated circuit.

    摘要翻译： 提供了具有通孔的三维集成电路的制造方法和装置。 本发明的一个方面是用于三维集成电路的通孔通孔的间隙填充方法。 该方法包括提供具有用于通孔通孔的多个孔的半导体晶片，并且沉积保形金属层以部分填充孔以留下开孔。 该方法还包括清除空隙并清洁空隙的表面，并使用干式沉积工艺填充或封闭空隙。 本发明的另一方面是一种用于三维集成电路的电子设备结构。

    Methods and systems for low interfacial oxide contact between barrier and copper metallization
    56.
    发明授权
    Methods and systems for low interfacial oxide contact between barrier and copper metallization 有权
    屏障和铜金属化之间的低界面氧化物接触的方法和系统

    公开(公告)号：US08053355B2

    公开(公告)日：2011-11-08

    申请号：US12828082

    申请日：2010-06-30

    申请人： Fritz Redeker ,  John Boyd ,  Yezdi Dordi ,  Hyungsuk Alexander Yoon ,  Shijian Li

    发明人： Fritz Redeker ,  John Boyd ,  Yezdi Dordi ,  Hyungsuk Alexander Yoon ,  Shijian Li

    IPC分类号： H01L21/4763

    CPC分类号： C25D7/123 ,  C23C18/1653 ,  C23C28/023 ,  C23C28/322 ,  C23C28/34 ,  C23C28/341 ,  H01L21/28562 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76873 ,  H01L21/76874 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The present invention relates to methods and systems for the metallization of semiconductor devices. One aspect of the present invention is a method of depositing a copper layer onto a barrier layer so as to produce a substantially oxygen free interface therebetween. In one embodiment, the method includes providing a substantially oxide free surface of the barrier layer. The method also includes depositing an amount of atomic layer deposition (ALD) copper on the oxide free surface of the barrier layer effective to prevent oxidation of the barrier layer. The method further includes depositing a gapfill copper layer over the ALD copper. Another aspect of the present invention is a system for depositing a copper layer onto barrier layer so as to produce a substantially oxygen-free interface therebetween. In one embodiment, the integrated system includes at least one barrier deposition module. The system also includes an ALD copper deposition module configured to deposit copper by atomic layer deposition. The system further includes a copper gapfill module and at least one transfer module coupled to the at least one barrier deposition module and to the ALD copper deposition module. The transfer module is configured so that the substrate can be transferred between the modules substantially without exposure to an oxide-forming environment.

    摘要翻译： 本发明涉及用于半导体器件金属化的方法和系统。 本发明的一个方面是将铜层沉积在阻挡层上以在其间产生基本上无氧的界面的方法。 在一个实施例中，该方法包括提供阻挡层的基本上无氧化物的表面。 该方法还包括在阻挡层的无氧化物表面上沉积一定量的原子层沉积（ALD）铜，以有效地防止阻挡层的氧化。 该方法还包括在ALD铜上沉积间隙填充铜层。 本发明的另一方面是一种用于在阻挡层上沉积铜层以在其间产生基本上无氧的界面的系统。 在一个实施例中，集成系统包括至少一个阻挡层沉积模块。 该系统还包括配置为通过原子层沉积沉积铜的ALD铜沉积模块。 该系统还包括铜间隙填充模块和耦合到至少一个阻挡层沉积模块和ALD铜沉积模块的至少一个传输模块。 转移模块被配置为使得基板可以在基本上不暴露于氧化物形成环境的基础之间传递。

    Methods, apparatuses, and systems for fabricating three dimensional integrated circuits
    57.
    发明授权
    Methods, apparatuses, and systems for fabricating three dimensional integrated circuits 有权
    用于制造三维集成电路的方法，装置和系统

    公开(公告)号：US08034409B2

    公开(公告)日：2011-10-11

    申请号：US11958025

    申请日：2007-12-17

    申请人： Shijian Li ,  Fritz Redeker ,  Yezdi Dordi

    发明人： Shijian Li ,  Fritz Redeker ,  Yezdi Dordi

    IPC分类号： C23C16/00

    CPC分类号： H01L21/70 ,  C23C16/045 ,  C23C16/4586 ,  H01L21/67017 ,  H01L21/677 ,  H01L21/6838 ,  H01L21/68714 ,  H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/12044 ,  Y10T24/44 ,  H01L2924/00012 ,  H01L2924/00

    摘要： The present invention pertains to methods, apparatuses, and systems for fabricating three-dimensional integrated circuits. One embodiment of the method comprises providing a wafer or other substrate having a plurality of through holes. In addition, the method includes supporting the wafer or other substrate with a wafer or other substrate holder mounted in a process chamber. The method further includes generating a pressure differential between the front side of the wafer or other substrate and the back side of the wafer or other substrate while the wafer or other substrate is supported on the wafer or other substrate holder so that the pressure differential causes fluid flow through the through holes. Also, the method includes establishing process conditions in the process chamber for at least one process to fabricate integrated circuits. Embodiments of a system and embodiments of an apparatus according to the present invention are also presented.

    摘要翻译： 本发明涉及用于制造三维集成电路的方法，装置和系统。 该方法的一个实施例包括提供具有多个通孔的晶片或其它基板。 此外，该方法包括用安装在处理室中的晶片或其它衬底保持器来支撑晶片或其它衬底。 该方法还包括在晶片或其它基板被支撑在晶片或其它基板保持器上的同时，在晶片或其它基板的前侧与晶片或其它基板的背面之间产生压差，使得压力差导致流体 流过通孔。 此外，该方法包括在处理室中建立用于制造集成电路的至少一个工艺的工艺条件。 还提供了根据本发明的系统和实施例的装置的实施例。

    Methods and Solutions for Preventing the Formation of Metal Particulate Defect Matter Upon a Substrate After a Plating Process
    58.
    发明申请
    Methods and Solutions for Preventing the Formation of Metal Particulate Defect Matter Upon a Substrate After a Plating Process 审中-公开
    电镀工艺后基体上金属微粒缺陷形成的方法与解决方案

    公开(公告)号：US20100062164A1

    公开(公告)日：2010-03-11

    申请号：US12206509

    申请日：2008-09-08

    申请人： Shijian Li ,  Artur K. Kolics ,  Tiruchirapalli N. Arunagiri

    发明人： Shijian Li ,  Artur K. Kolics ,  Tiruchirapalli N. Arunagiri

    IPC分类号： B05D3/10 ,  C09K3/00 ,  C25D3/02

    CPC分类号： C23C18/50 ,  C23C18/1689 ,  C25D5/48

    摘要： Methods and solutions for preventing the formation of metal particulate defect matter upon a substrate after plating processes are provided. In particular, solutions are provided which are free of oxidizing agents and include a non-metal pH adjusting agent in sufficient concentration such that the solution has a pH between approximately 7.5 and approximately 12.0. In some cases, a solution may include a chelating agent. In addition or alternatively, a solution may include at least two different types of complexing agents each offering a single point of attachment for binding metal ions via respectively different functional groups. In any case, at least one of the complexing agents or the chelating agent includes a non-amine or non-imine functional group. An embodiment of a method for processing a substrate includes plating a metal layer upon the substrate and subsequently exposing the substrate to a solution comprising the aforementioned make-up.

    摘要翻译： 提供了用于防止在电镀工艺之后在基板上形成金属颗粒缺陷物质的方法和解决方案。 特别地，提供了不含氧化剂的溶液，并且包括足够浓度的非金属pH调节剂，使得溶液的pH在约7.5至约12.0之间。 在一些情况下，溶液可以包括螯合剂。 另外或替代地，溶液可以包括至少两种不同类型的络合剂，其各自提供用于通过分别不同的官能团结合金属离子的单个附着点。 在任何情况下，至少一种络合剂或螯合剂包括非胺或非亚胺官能团。 用于处理衬底的方法的实施例包括将金属层电镀在衬底上，随后将衬底暴露于包含上述组成的溶液中。