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公开(公告)号:US20230234835A1
公开(公告)日:2023-07-27
申请号:US18100846
申请日:2023-01-24
Applicant: Analog Devices, Inc.
Inventor: Xin Zhang , Jianglong Zhang , Li Chen , John C. Cowles , Michael Judy , Shafi Saiyed
IPC: B81B7/00 , H01L23/00 , H01L23/498 , B81C1/00
CPC classification number: B81B7/0048 , H01L23/562 , H01L23/49827 , B81C1/00666
Abstract: Packaging of microfabricated devices, such as integrated circuits, microelectromechanical systems (MEMS), or sensor devices is described. The packaging is 3D heterogeneous packaging in at least some embodiments. The 3D heterogeneous packaging includes an interposer. The interposer includes stress relief platforms. Thus, stresses originating in the packaging do not propagate to the packaged device. A stress isolation platform is an example of a stress relief feature. A stress isolation platform includes a portion of an interposer coupled to the remainder of the interposer via stress isolation suspensions. Stress isolation suspensions can be formed by etching trenches through the interposer.
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62.
公开(公告)号:US20230228883A1
公开(公告)日:2023-07-20
申请号:US18188316
申请日:2023-03-22
Applicant: Analog Devices, Inc.
Inventor: Charles MATHY , Peter Cho , Sefa Demirtas
CPC classification number: G01S17/894 , G01J1/42 , G01B11/22 , G01B11/0608 , G06T7/60 , G06T5/002 , G06T5/20 , G01J2001/4266 , G06T2207/10028 , G06T2207/20192 , G06T2207/20068
Abstract: A sensor system that obtains and processes time-of-flight data (TOF) is provided. A TOF sensor obtains raw data describing various surfaces. A processor applies an averaging filter to the raw data to smooth the raw data for increasing signal-to-noise ratio (SNR) of flat surfaces represented in the raw data, performs a depth compute process on the raw data, as filtered, to generate distance data, generates a point cloud based on the distance data, and identifies the Z-planes in the point cloud.
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公开(公告)号:US20230228853A1
公开(公告)日:2023-07-20
申请号:US18154688
申请日:2023-01-13
Applicant: Analog Devices, Inc.
Inventor: Noe QUINTERO
IPC: G01S7/4863 , G01S7/481
CPC classification number: G01S7/4863 , G01S7/4816
Abstract: Technologies described herein include a programmable power module for a light detection and ranging (LiDAR) system. In some aspects, the programmable power module includes circuitry that supplies a bias voltage to a photodetector array, and a programmable interface comprising a serial interface and multiple configurable ports. Each one of the multiple configurable ports is configured as one of a digital-to-analog converter (DAC) output port, an analog-to-digital converter (ADC) input port, a digital output port, or a digital input port. The serial interface can be configured to receive program code defining a control voltage that causes the circuitry to set the bias voltage. A first configurable port of the multiple configurable ports can be connected to the circuitry and can be configured as a first DAC output port that outputs the control voltage to the circuitry.
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64.
公开(公告)号:US20230224639A1
公开(公告)日:2023-07-13
申请号:US18068244
申请日:2022-12-19
Applicant: Analog Devices, Inc.
Inventor: Boris LERNER , Gina G. AQUILANO
IPC: H04R3/12 , G10K11/175
CPC classification number: H04R3/12 , G10K11/175
Abstract: Systems, devices, and methods related to audio systems for providing personalized audio zones are provided. An example audio system includes a first speaker to transmit an ultrasonic signal modulated by a first portion of a first audio signal. The audio system further includes a second speaker to transmit a second portion of the first audio signal, where the second portion is in a lower frequency band than the first portion. The audio system further includes a noise canceller to at least attenuate a second audio signal, where the second audio signal is in a lower frequency band than the first portion of the first audio signal.
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公开(公告)号:US11695093B2
公开(公告)日:2023-07-04
申请号:US16679549
申请日:2019-11-11
Applicant: Analog Devices, Inc.
Inventor: Shrenik Deliwala , Ryan Michael Iutzi
IPC: H01L33/06 , H01L33/58 , H01L33/64 , H01L31/0352 , H01L31/0232 , H01L31/024
CPC classification number: H01L33/06 , H01L31/024 , H01L31/02327 , H01L31/035236 , H01L33/58 , H01L33/644
Abstract: A device emitting mid-infrared light that comprises a semiconductor substrate of GaSb or closely related material. The device can also comprise epitaxial heterostructures of InAs, GaAs, AlSb, and related alloys forming light emitting structures cascaded by tunnel junctions. Further, the device can comprise light emission from the front, epitaxial side of the substrate.
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公开(公告)号:US20230198734A1
公开(公告)日:2023-06-22
申请号:US17644693
申请日:2021-12-16
Applicant: Analog Devices, Inc.
Inventor: Michael St. Germain , John Kenney
Abstract: Apparatus and methods for multiphase clock generation are provided herein. In certain embodiments, a multiphase clock generator includes a first clock buffer that generates a first output clock signal based on a first input clock signal, a second clock buffer that generates a second output clock signal based on a second input clock signal, and a first clock interpolation circuit that generates a third output clock signal based on interpolating the first input clock signal and the second input clock signal. The first clock interpolation circuit generates the third output clock signal based on multiplying the first input clock signal by a first adjustable current to generate a first multiplied current, multiplying the second input clock signal by a second adjustable current to generate a second multiplied current, combining the first multiplied current and the second multiplied current to generate a combined current, and integrating the combined current.
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公开(公告)号:US20230170861A1
公开(公告)日:2023-06-01
申请号:US18057597
申请日:2022-11-21
Applicant: Analog Devices, Inc.
Inventor: Christopher J. DAY
CPC classification number: H03F3/245 , H03G3/3042 , H03F2200/129 , H03F2200/451 , H03G2201/103 , H03G2201/307
Abstract: Systems and methods that integrate a directional coupling function with directivity that does not have output loss are disclosed. For example, a power amplifier circuit arrangement includes an input terminal to receive an input signal; amplifier circuitry including a first amplifier stage, a second amplifier stage, and a virtual ground node, where an input of the first amplifier stage is coupled to the input terminal, an output of the first amplifier stage is coupled to an input of the second amplifier stage via the virtual ground node, and an output of the second amplifier stage is coupled to the input of the first amplifier stage via feedback circuitry; an output terminal coupled to the output of the second amplifier stage, the output terminal to output an amplified signal; and a directional coupler terminal coupled to the virtual ground node.
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公开(公告)号:US20230170313A1
公开(公告)日:2023-06-01
申请号:US18059916
申请日:2022-11-29
Applicant: Analog Devices, Inc.
Inventor: Clement Joseph Wagner , Micah Galletta O'Halloran
IPC: H01L23/00 , H01L23/498 , H01L21/48 , H01L21/56
CPC classification number: H01L23/562 , H01L23/49822 , H01L21/4857 , H01L21/563 , H01L2224/16225 , H01L24/16
Abstract: A laminate substrate panel may include an upper layer at or near a top surface of the panel. The laminate substrate panel may include a lower layer at or near a bottom surface of the panel. The laminate substrate panel may also include an array of functional laminate cells, each functional laminate cell of the array having a first upper pattern in the upper layer and a first lower pattern in the lower layer. The laminate substrate panel may also include a dummy laminate cell adjacent the array of functional laminate cells, the dummy laminate cell having a second upper pattern in the upper layer and a second lower pattern in the lower layer, the second upper and lower patterns configured to compensate for at least one of an opposing layer area density mismatch and a material density in at least one of the first upper and lower patterns.
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公开(公告)号:US11658621B2
公开(公告)日:2023-05-23
申请号:US16829768
申请日:2020-03-25
Applicant: ANALOG DEVICES, INC.
Inventor: Ralph D. Moore , Jesse Bankman
CPC classification number: H03F3/185 , H03F3/45183 , H03F3/45201 , H03G1/0088 , H03G3/301 , H03F2203/45288 , H03F2203/45488 , H03F2203/45506
Abstract: Provided herein are apparatus and methods for a multi-stage signal-processing circuit. The signal-processing circuit can include multiple configurable stages that can be cascaded and configured to process an input signal. Control circuitry can be used to select an output of the configurable stages. Serial data can be recovered with good signal integrity using a signal monitor with the configurable stages by virtually placing the signal monitor on a buffered output node.
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公开(公告)号:US11656193B2
公开(公告)日:2023-05-23
申请号:US17346049
申请日:2021-06-11
Inventor: Yosef Stein , Seth S. Kessler , Haim Primo
IPC: G01N27/20
CPC classification number: G01N27/20
Abstract: Aspects of the present application allow for measurement of a calibrated resistance for a resistive film in a sensing element, such that effects from contact resistance and background resistance drifts due to factors such as temperature, strain or aging can be reduced or eliminated. In some embodiments, by taking a plurality of two-terminal resistance measurements between various pairs of electrodes on a resistive film, a contact-resistance-independent resistance of a reference portion of the resistive film can be determined. Further, a contact-resistance-independent resistance of a sensing portion of the resistive film can be determined based on a plurality of two-terminal resistance measurements between pairs of electrodes. The resistance of the reference portion can be removed from the measured resistance of the sensing portion, such that variations in the reference portion resistance that are not caused by a sensed environmental condition may be compensated.
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