公开(公告)号：US20150017348A1

公开(公告)日：2015-01-15

申请号：US14311154

申请日：2014-06-20

Applicant: ASM INTERNATIONAL N.V.

Inventor： Sean T. Barry ,  Yamile A.M. Wasslen ,  Antti H. Rahtu

IPC: C23C16/18 ,  C23C16/513 ,  C23C16/455

CPC classification number: C23C16/45553 ,  C23C16/18 ,  C23C16/32 ,  C23C16/34 ,  C23C16/45525 ,  C23C16/45527 ,  C23C16/45536 ,  C23C16/513

Abstract: Atomic layer deposition (ALD) type processes for producing metal containing thin films comprise feeding into a reaction space vapor phase pulses of metal containing cyclopentadienyl precursors as a metal source material. In preferred embodiments the metal containing cyclopentadienyl reactant comprises a metal atom that is not directly bonded to an oxygen or halide atom. In other embodiments the metal atom is bonded to a cyclopentadienyl compound and separately bonded to at least one ligand via a nitrogen atom. In still other embodiments the metal containing cyclopentadienyl compound comprises a nitrogen-bridged ligand.

Abstract translation: 用于制备含金属薄膜的原子层沉积（ALD）型方法包括将含有环戊二烯基前体的金属脉冲作为金属源材料进料到反应空间中。 在优选的实施方案中，含金属环戊二烯基反应物的金属原子不直接键合到氧或卤素原子上。 在其它实施方案中，金属原子键合到环戊二烯基化合物上，并通过氮原子分别与至少一个配体结合。 在其它实施方案中，含有环戊二烯基化合物的金属包含氮桥连配体。

公开(公告)号：US20140087076A1

公开(公告)日：2014-03-27

申请号：US13950049

申请日：2013-07-24

Applicant: ASM International N.V.

Inventor： Suvi P. Haukka ,  Marko J. Tuominen ,  Antti Rahtu

IPC: C23C16/08 ,  C23C16/18

CPC classification number: C23C16/08 ,  C23C16/0218 ,  C23C16/18 ,  C23C16/45525 ,  H01L21/28562

Abstract: The invention relates generally to processes for enhancing the deposition of noble metal thin films on a substrate by atomic layer deposition. Treatment with gaseous halides or metalorganic compounds reduces the incubation time for deposition of noble metals on particular surfaces. The methods may be utilized to facilitate selective deposition. For example, selective deposition of noble metals on high-k materials relative to insulators can be enhanced by pretreatment with halide reactants. In addition, halide treatment can be used to avoid deposition on the quartz walls of the reaction chamber.

Abstract translation: 本发明一般涉及通过原子层沉积来增强在衬底上沉积贵金属薄膜的方法。 使用气态卤化物或金属有机化合物进行处理减少了在特定表面上沉积贵金属的孵育时间。 该方法可用于促进选择性沉积。 例如，可以通过用卤化物反应物预处理来提高贵金属在高k材料上相对于绝缘体的选择性沉积。 此外，可以使用卤化物处理以避免沉积在反应室的石英壁上。

公开(公告)号：US20130196502A1

公开(公告)日：2013-08-01

申请号：US13708863

申请日：2012-12-07

Applicant: ASM International. N.V.

Inventor： Suvi P. Haukka ,  Antti Niskanen

IPC: H01L21/768

CPC classification number: H01L21/7685 ,  C23C16/04 ,  C23C16/14 ,  C23C16/45536 ,  C23C16/45553 ,  H01L21/02068 ,  H01L21/28518 ,  H01L21/28562 ,  H01L21/28568 ,  H01L21/3105 ,  H01L21/76826 ,  H01L21/76849 ,  H01L21/76864 ,  H01L21/76867 ,  H01L21/76883 ,  H01L21/76886 ,  H01L21/76889 ,  H01L23/53238

Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on copper instead of insulating or dielectric materials. In some embodiments, a first precursor forms a layer on the first surface and is subsequently reacted or converted to form a metallic layer. The deposition temperature may be selected such that a selectivity of above about 50% or even about 90% is achieved.

Abstract translation: 金属层可以相对于基板的第二表面选择性沉积在衬底的一个表面上。 在一些实施例中，金属层选择性地沉积在铜上而不是绝缘或介电材料。 在一些实施方案中，第一前体在第一表面上形成一层，随后反应或转化以形成金属层。 可以选择沉积温度使得达到高于约50％或甚至约90％的选择性。

公开(公告)号：US20130115763A1

公开(公告)日：2013-05-09

申请号：US13667541

申请日：2012-11-02

Applicant: ASM International. N.V.

Inventor： Noboru Takamure ,  Atsuki Fukazawa ,  Hideaki Fukuda ,  Antti Niskanen ,  Suvi Haukka ,  Ryu Nakano ,  Kunitoshi Namba

IPC: H01L21/26 ,  H01L21/31

CPC classification number: H01L21/02321 ,  H01L21/02129 ,  H01L21/02164 ,  H01L21/02208 ,  H01L21/02219 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/2225 ,  H01L21/2255 ,  H01L21/324 ,  H01L29/66803

Abstract: The present disclosure relates to the deposition of dopant films, such as doped silicon oxide films, by atomic layer deposition processes. In some embodiments, a substrate in a reaction space is contacted with pulses of a silicon precursor and a dopant precursor, such that the silicon precursor and dopant precursor adsorb on the substrate surface. Oxygen plasma is used to convert the adsorbed silicon precursor and dopant precursor to doped silicon oxide.

公开(公告)号：US20130065352A1

公开(公告)日：2013-03-14

申请号：US13669550

申请日：2012-11-06

Applicant: ASM INTERNATIONAL N.V.

Inventor： Chris G. M. de Ridder ,  Klaas P. Boonstra ,  Adriaan Garssen ,  Frank Huussen

IPC: H01L31/0216

CPC classification number: H01L21/67303 ,  C23C16/45546 ,  C23C16/4587 ,  F27B17/0025 ,  F27D5/0037 ,  H01L21/67109 ,  H01L21/67313 ,  H01L21/67757 ,  H01L31/1864 ,  H01L31/1876 ,  Y02E10/547 ,  Y02P70/521

Abstract: A method for processing solar cells comprising: providing a vertical furnace to receive an array of mutually spaced circular semiconductor wafers for integrated circuit processing; composing a process chamber loading configuration for solar cell substrates, wherein a size of the solar cell substrates that extends along a first surface to be processed is smaller than a corresponding size of the circular semiconductor wafers, such that multiple arrays of mutually spaced solar cell substrates can be accommodated in the process chamber, loading the solar cell substrates into the process chamber; subjecting the solar cell substrates to a process in the process chamber.

Abstract translation: 一种用于处理太阳能电池的方法，包括：提供垂直炉以接收用于集成电路处理的相互间隔开的圆形半导体晶片阵列; 构成用于太阳能电池基板的处理室装载构造，其中沿着待处理的第一表面延伸的太阳能电池基板的尺寸小于圆形半导体晶片的对应尺寸，使得相互间隔开的太阳能电池基板的多个阵列 可以容纳在处理室中，将太阳能电池基板装载到处理室中; 对太阳能电池基板进行处理室中的处理。

公开(公告)号：US20040104439A1

公开(公告)日：2004-06-03

申请号：US10430811

申请日：2003-05-05

Applicant: ASM International N.V.

Inventor： Suvi Haukka ,  Hannu Huotari

IPC: H01L029/76

CPC classification number: H01L21/28185 ,  H01L21/28088 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28238 ,  H01L21/823828 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: A method of manufacturing a high performance MOS device and transistor gate stacks comprises forming a gate dielectric layer over a semiconductor substrate; forming a barrier layer over the gate dielectric layer by an ALD type process; and forming a gate electrode layer over the barrier layer. The method enables the use of hydrogen plasma, high energy hydrogen radicals and ions, other reactive radicals, reactive oxygen and oxygen containing precursors in the processing steps subsequent to the deposition of the gate dielectric layer of the device. The ALD process for forming the barrier layer is performed essentially in the absence of plasma and reactive hydrogen radials and ions. This invention makes it possible to use oxygen as a precursor in the deposition of the metal gates. The barrier film also allows the use of hydrogen plasma in the form of either direct or remote plasma in the deposition of the gate electrode. Furthermore, the barrier film prevents the electrode material from reacting with the gate dielectric material. The barrier layer is ultra thin and, at the same time, it forms a uniform cover over the entire surface of the gate dielectric.

Abstract translation: 制造高性能MOS器件和晶体管栅极堆叠的方法包括在半导体衬底上形成栅极电介质层; 通过ALD型工艺在所述栅极介质层上形成阻挡层; 以及在阻挡层上形成栅电极层。 该方法能够在沉积器件的栅极电介质层之后的处理步骤中使用氢等离子体，高能氢自由基和离子，其它反应性基团，活性氧和含氧前体。 用于形成阻挡层的ALD工艺基本上在不存在等离子体和反应性氢的径向和离子的情况下进行。 本发明使得可以在金属栅极的沉积中使用氧作为前体。 阻挡膜还允许在栅电极的沉积中使用直接或远程等离子体形式的氢等离子体。 此外，阻挡膜防止电极材料与栅极电介质材料反应。 阻挡层是超薄的，并且同时在栅电介质的整个表面上形成均匀的覆盖层。

公开(公告)号：US10858738B2

公开(公告)日：2020-12-08

申请号：US16366202

申请日：2019-03-27

Applicant: ASM International N.V.

Inventor： Chris G. M. de Ridder ,  Lucian C. Jdira ,  Bartholomeus Hans Louis Lindeboom

IPC: C23C16/46 ,  C23C16/458

Abstract: A wafer boat cooldown device comprising a bottom plate and a rotatable table that is rotatable between a number of index positions. The rotatable table comprises at least two wafer boat positions for supporting a wafer boat. A vertically extending wall structure is mounted on the rotatable table and creates, at each wafer boat position, a wafer boat chamber having a gas supply area and a gas discharge area. The wafer boat cooldown device further comprises a plenum chamber which extends under the bottom plate. The plenum chamber accommodates at least one gas/liquid heat exchanger.

公开(公告)号：US20200335342A1

公开(公告)日：2020-10-22

申请号：US16908241

申请日：2020-06-22

Applicant: ASM International N.V.

Inventor： Suvi Haukka ,  Viljami J. Pore ,  Antti Niskanen

IPC: H01L21/205 ,  H01L21/02 ,  C23C16/30 ,  C23C16/455 ,  C30B25/14 ,  C30B29/40

Abstract: Atomic layer deposition (ALD) processes for forming thin films comprising InN are provided. The thin films may find use, for example, in light-emitting diodes.

公开(公告)号：US20200181769A1

公开(公告)日：2020-06-11

申请号：US16709108

申请日：2019-12-10

Applicant: ASM International N.V.

Inventor： Tom E. Blomberg ,  Eva E. Tois ,  Robert Huggare ,  Jan Willem Maes ,  Vladimir Machkaoutsan ,  Dieter Pierreux

IPC: C23C16/34 ,  C23C16/455 ,  C23C16/40 ,  C23C16/36

Abstract: Methods are disclosed herein for depositing a passivation layer comprising fluorine over a dielectric material that is sensitive to chlorine, bromine, and iodine. The passivation layer can protect the sensitive dielectric layer thereby enabling deposition using precursors comprising chlorine, bromine, and iodine over the passivation layer.

公开(公告)号：US10344378B2

公开(公告)日：2019-07-09

申请号：US15599187

申请日：2017-05-18

Applicant: ASM International N.V.

Inventor： Timo Hatanpaa ,  Jaakko Niinisto ,  Mikko Ritala ,  Markku Leskela ,  Suvi Haukka

IPC: C01G25/02 ,  C23C16/40 ,  C23C16/455 ,  C01G23/07 ,  C01G27/02

Abstract: Methods are provided herein for forming transition metal oxide thin films, preferably Group IVB metal oxide thin films, by atomic layer deposition. The metal oxide thin films can be deposited at high temperatures using metalorganic reactants. Metalorganic reactants comprising two ligands, at least one of which is a cycloheptatriene or cycloheptatrienyl (CHT) ligand are used in some embodiments. The metal oxide thin films can be used, for example, as dielectric oxides in transistors, flash devices, capacitors, integrated circuits, and other semiconductor applications.